Ultrafast photonic ATM switch with optical output buffers

An ultrafast photonic asynchronous transfer mode (ATM) (ULPHA) switch based on a time-division broadcast-and-select network with optical output buffers is presented. The ULPHA switch has an ultra-high throughput and excellent traffic characteristics, since it utilizes ultrashort optical pulses for cell signals and avoids cell contentions by novel optical output buffers. Feasibility studies show that an 80×80 ULPHA switch with 1-Gb/s input/output is possible by applying the present technology, and that more than 1 Tb/s is possible by making a three-stage network using such switches. As an experimental demonstration, 4-bit 40-Gb/s optical cells were generated and certain cells were selected at an output on a self-routing basis. With its high throughput and excellent traffic considerations, the ULPHA switch is a strong candidate for a future large-capacity optical switching node     

Large-scale WDM star-based photonic ATM switches

This paper describes the large-scale photonic asynchronous transfer mode (ATM) switching systems being developed in NTT Laboratories. It uses wavelength division multiplexing (WDM) techniques to attack 1 TB/s throughput. The architecture is a simple star with modular structure and effectively combines optical WDM techniques and electrical control circuits. Recent achievements in important key technologies leading to the realization of large-scale photonic ATM switches based on the architecture are described. We show that we can obtain a 320 Gb/s system that can tolerate the polarization and wavelength dependencies of optical devices. Our experiments using rack-mounted prototypes demonstrate the feasibility of our architecture. The experiments showed stable system operation and high-speed WDM switching capability up to the total optical bandwidth of 12.8 nm, as well as successful 10 Gb/s 4×4 broadcast-and-select and 2.5 Gb/s 16×16 wavelength-routing switch operations     

An ultrafast photonic ATM switch based on bit-interleavemultiplexing

An optical ATM switch is proposed in which cells from individual input channels are time-division multiplexed in a bit-interleave manner. This switch can easily handle multicast switching because it is based on a broadcast-and-select network. Compared to an alternative switch that uses a cell-interleave time-division multiplexing scheme, the proposed optical switch has a much simpler structure. It does not need a cell compressor at each input and a cell expander at each output, which greatly reduces hardware complexity. Feasibility analyzes showed that a 64×64 photonic ATM switch with 2.5 Gb/s input/output is possible using the proposed technology. In an experimental demonstration, 4 b cells were selected from a 55 Gb/s bit-interleave multiplexed cell stream by using a new nonlinear optical fiber switch. With its high switch throughput, our switch is a strong candidate for future large-capacity optical switching nodes     

Broadcast-and-select photonic ATM switch with frequency divisionmultiplexed output buffers

A photonic ATM switch has been developed with frequency division multiplexed (FDM) output buffers. The switch has a broadcast-and-select network architecture using fixed-frequency-channel transmitters and a passive star configuration. Although it has a simple structure, it can provide either broadcast or multicast switching. The output buffers, which resolve cell contentions, are comprised of fiber delay lines that can easily handle signal speed of over 10 Gb/s. Experimental switching of two-multiplexed 10 Gb/s cells with a 2.8-dB power penalty demonstrated high-speed switching     

640-Gb/s high-speed ATM switching system based on 0.25-μm CMOS,MCM-C, and optical WDM interconnection

A 640-Gb/s high-speed ATM switching system that is based on the technologies of advanced MCM-C, 0.25-μm CMOS, and optical wavelength-division-multiplexing (WDM) interconnection is fabricated for future broadband backbone networks. A 40-layer, 160×114 mm ceramic MCM forms the basic ATM switch module with 80-Gb/s throughput. It consists of 8 advanced 0.25-μm CMOS LSIs and 32 I/O bipolar LSIs. The MCM has a 7-layer high-speed signal line structure having 50-Ω strip lines, high-speed signal lines, and 33 power supply layers formed using 50-μm thick ceramic layers to achieve high capacity. A uniquely structured closed-loop-type liquid cooling system for the MCM is used to cope with its high power dissipation of 230 W. A three-stage ATM switch is made using the optical WDM interconnection between high-performance MCMs. For WDM interconnection, newly developed compact 10-Gb/s, 8-WDM optical transmitter and receiver modules are used. These modules are each only 80×120×20 mm and dissipate 9.65 W and 22.5 W, respectively. They have a special chassis for cooling, which contains high-performance heat-conductive plates and micro-fans. An optical WDM router based on an arrayed waveguide router is used for mesh interconnection of boards. The optical WDM interconnect has 640-Gb/s throughput and simple interconnection     

An optical packet switch based on WDM technologies

Dense wavelength-division multiplexing (DWDM) technology offers tremendous transmission capacity in optical fiber communications. However, switching and routing capacity lags behind the transmission capacity, since most of today's packet switches and routers are implemented using slower electronic components. Optical packet switches are one of the potential candidates to improve switching capacity to be comparable with optical transmission capacity. In this paper, we present an optically transparent asynchronous transfer mode (OPATM) switch that consists of a photonic front-end processor and a WDM switching fabric. A WDM loop memory is deployed as a multiported shared memory in the switching fabric. The photonic front-end processor performs the cell delineation, VPI/VCI overwriting, and cell synchronization functions in the optical domain under the control of electronic signals. The WDM switching fabric stores and forwards cells from each input port to one or more specific output ports determined by the electronic route controller. We have demonstrated with experiments the functions and capabilities of the front-end processor and the switching fabric at the header-processing rate of 2.5 Gb/s. Other than ATM, the switching architecture can be easily modified to apply to other types of fixed-length payload formats with different bit rates. Using this kind of photonic switch to route information, an optical network has the advantages of bit rate, wavelength, and signal-format transparencies. Within the transparency distance, the network is capable of handling a widely heterogeneous mix of traffic, including even analog signals.     

WDM knockout switch with multi-output-port wavelength-channelselectors

This paper proposes the photonic knockout switch that uses wavelength division multiplexing (WDM). The proposed switch uses two types of WDM switching: broadcast-and-select (B and S) switching and wavelength routing. To extend the size of the knockout switch concentrator, a multi-output-port wavelength-channel selector is used, which enables us to reduce the number of optical gates and wavelength routers. Simple and distributed contention control becomes possible in the optical domain through the use of the wavelength-routing switch. In this switch, coherent crosstalk is a serious problem. We measured the bit error rates of a four-output-port wavelength-channel selector. The power penalty due to the presence of coherent crosstalk is less than 1 dB     

Breakthrough technologies for the high-performance electrical ATMswitching system

A high-performance electrical asynchronous transfer mode (ATM) switching system is described with the goal of Tb/s ATM switching. The first step system was to use advanced Si-bipolar very large scale integrated (VLSI) technologies and the multichip technique. 1.0 μm bipolar SST technologies and Cu-polyimide multilayer MCM realized a 160 Gb/s throughput ATM system. The performance limitations of the 160 Gb/s system were power supply/cooling and module interconnection. The new ATM switching system, named OPTIMA-1, adopted optical interconnection/distribution to overcome the limitations and achieve 640 Gb/s. The system uses high-performance complementary metal-oxide-semiconductor (CMOS) devices and optical wavelength division multiplexing (WDM) interconnection. Combining OPTIMA-1 with optical cell-by-cell routing functions, i.e., photonic packet routing, can realize variable bandwidth links for 5 Tb/s ATM systems. This paper first reviews high-performance electrical ATM (packet) switching system architecture and hardware technologies. In addition, system limitations are described. Next, the important breakthrough technology of optical WDM interconnection is highlighted. These technologies are adopted to form OPTIMA-1, a prototype of which is demonstrated. The key technologies of the system are advanced 80 Gb/s CMOS/MCM, electrical technologies, and 10 Gb/s, 8 WDM, 8×8 optical interconnection. Details of implementation technologies are also described. Optical cell-by-cell (packet-by-packet) routing is now being studied. From the architectural viewpoint, dynamic link bandwidth sharing will be adopted. In addition, an AWG that performs cell-by-cell routing and a distributed large scale ATM system are realized. Optical routing achieves the 5 Tb/s needed in future B-ISDN ATM backbone systems     

All-Optical Data Vortex Node Using an MZI-SOA Switch Array

We propose and demonstrate a new structure of a Data Vortex switch node for all-optical routing of wavelength-division-multiplexing (WDM) 10-Gb/s optical packets. The proposed node consists of two Mach-Zehnder interferometers with integrated semiconductor optical amplifier: an optical and gate and a high-speed optical switch. In the experiment, WDM 10-Gb/s data packets are successfully routed with 1-dB power penalty at a bit-error rate of 10^-9.     

A photonic front-end processor in a WDM ATM multicast switch

Dense wavelength-division multiplexing (DWDM) technology has provided tremendous transmission capacity in optical fiber communications. However, switching and routing capacity is still far behind transmission capacity. This is because most of today's packet switches and routers are implemented using electronic technologies. Optical packet switches are the potential candidate to boost switching capacity to be comparable with transmission capacity. In this paper, we present a photonic asynchronous transfer mode (ATM) front-end processor that has been implemented and is to be used in an optically transparent WDM ATM multicast (3M) switch. We have successfully demonstrate the front-end processor in two different experiments. One performs cell delineation based on ITU standards and overwrites VCI/VPI optically at 2.5 Gb/s. The other performs cell synchronization, where cells from different input ports running at 2.5 Gb/s are phase-aligned in the optical domain before they are routed in the switch fabric. The resolution of alignment is achieved to the extent of 100 ps (or 1/4 bit). An integrated 1×2 Y-junction semiconductor optical amplifier (SOA) switch has been developed to facilitate the cell synchronizer     

Terahipas: a modular and expandable terabit/second hierarchicallymultiplexing photonic ATM switch architecture

A terabit/second hierarchically multiplexing photonic asynchronous transfer mode (ATM) switch network architecture, called Terahipas, is proposed. It combines the advantages of photonics (a large bandwidth for transport of cells) and electronics (advanced logical functions for controlling, processing, and routing). It uses a hierarchical photonic multiplexing structure in which several tens of channels with a relatively low bit rate, say 2.4 Gb/s, are first time-multiplexed on an optical highway by shrinking the interval between optical pulses, then a number of optical highways are wavelength-multiplexed (or space-division multiplexed). As a result, the switch capacity can be expanded from the order of 100 Gb/s to the order of 10 Tb/s in a modular fashion. A new implementation scheme for cell buffering is used for eliminating the bottleneck when receiving and storing concurrent optical cells at bit rates as high as 100 Gb/s. This new architecture can serve as the basis of a modular, expandable, high-performance ATM switching system for future broad band integrated service digital networks (B-ISDN's)     

A smart photonic ATM switch architecture with compression strategy

Generally, the limitations of optical delay line and link capacity limit the switching efficiency in the photonic asynchronous transfer mode (ATM) switch. Under the constraints, a smart photonic ATM switch designed for high-speed optical backbone network should have some fast switching strategies so that the congestion can be avoided or reduced. In this paper, we mill propose a novel smart photonic ATM switch architecture with a novel compression strategy. In the smart architecture, while more than two frames are destined for the same destination, the losers will be queued and compressed to reduce the degree of congestion. Therefore, not only the total switching time (TST) can be reduced but also the scarce buffer is able to store more incoming cells. To meet the high-speed switching performance, a simple and efficient compression decision algorithm (CDA) is proposed. The timing of employing compression strategy and the saturated performance of proposed strategy are analyzed. Simulation results show that compared to the conventional photonic ATM switch without compression strategy, the proposed strategy offers a much better performance in terms of queueing delay     

Payload-envelope detection and label-detection integrated photonic circuit for asynchronous variable-length optical-packet switching with 40-gb/s RZ payloads and 10-gb/s NRZ labels

A photonic integrated circuit that performs 40-Gb/s payload-envelope detection (PED) and 10-Gb/s label detection for asynchronous variable-length optical-packet switching is demonstrated. The circuit consists of an InP photonic integrated device combined with electronic GaAs and InP devices on a carrier. Asynchronous variable-length optical packets with 40-Gb/s return-to-zero (RZ) payloads and 10-Gb/s non-RZ (NRZ) labels are processed by the circuit. The circuit outputs a PED electrical signal that represents the temporal location of the payload and a 10-Gb/s electrical signal representing the optical label. The optical label is detected error free. The PED signal has a rise/fall time of 3-ns and 150-ps jitter. The PED signal was also used to erase and rewrite the optical labels error free.     

新型光缓存器和2×622Mb／s ATM光交换系统

本文给出一种新型的光缓存器的结构，以解决在ＡＴＭ光交换中的信元碰撞问题。这种缓存器由光纤延迟线、光波导开关阵及非线性半导体光放大器构成。文中还报告了一种用于交换各用户不同速率的信元（可达６２２Ｍｂ／ｓ）的ＡＴＭ光交换实验系统，系统的总容量为１．２Ｇｂ／ｓ。     

Transparent ultra-long-haul DWDM networks with "broadcast-and-select" OADM/OXC architecture

We describe an experimental realization of ultra-long-haul (ULH) networks with dynamically reconfigurable transparent optical add-drop multiplexers (OADMs) and optical cross-connects (OXCs). A simple new approach to dispersion management in ULH dense-wavelength-division-multiplexing (DWDM) transparent optical networks is proposed and implemented, which enables excellent transmission performance while avoiding dispersion compensation on a connection-by-connection basis. We demonstrate "broadcast-and-select" node architectures that take full advantage of this method. Our implementation of signal leveling ensures minimum variations of path-averaged power among the wavelength-division-multiplexing (WDM) channels between the dynamic gain-equalizing nodes and results in uniform nonlinear and spontaneous-emission penalties across the WDM spectrum. We achieve 80/spl times/10.7-Gb/s DWDM networking over 4160 km (52 spans/spl times/80 km each) of all-Raman-amplified symmetric dispersion-managed fiber and 13 concatenated OADMs or 320/spl times/320 wavelength-port OXCs with 320-km node spacing. The WDM channels use 50-GHz grid in C band and the simple nonreturn-to-zero (NRZ) modulation format. The measured Q values exhibit more than a 1.8-dB margin over the forward-error correction threshold for 10/sup -15/ bit-error-rate operation. We compare these results with point-to-point transmission of 80/spl times/10-Gb/s NRZ WDM signals over 4160 km without OADM/OXC and provide detailed characterization of penalties due to optical signal-to-noise-ratio degradation, filter concatenation, and crosstalk.     

A 100-Gb/s throughput ATM switch MCM with a 320-channel paralleloptical I/O interface

For an ATM switch system, we have developed a 100-Gb/s input/output (I/O) throughput optical I/O interface ATM switch multichip module (MCM) that has 320-ch optical I/O ports. This MCM is fabricated using ceramic (MCM-C) technology and very-small highly-parallel O/E and E/O optical converters. It uses 0.25-μm complementary metal oxide semiconductors (CMOS) ATM switch large scale integrations (LSIs) and has a total I/O throughput of up to 160 Gb/s. A prototype module with total I/O throughput of 100 Gb/s has been partially assembled using eight optical I/O interface blocks, each composed of a 40-ch O/E converter and a 40-ch E/O converter; the data rate per channel is from dc to 700 Mb/s. Using this module we developed an optical I/O interface ATM switch system and confirmed the operation of the optical interface     

A fully implemented 12 /spl times/ 12 data vortex optical packet switching interconnection network

A fully functional optical packet switching (OPS) interconnection network based on the data vortex architecture is presented. The photonic switching fabric uniquely capitalizes on the enormous bandwidth advantage of wavelength division multiplexing (WDM) wavelength parallelism while delivering minimal packet transit latency. Utilizing semiconductor optical amplifier (SOA)-based switching nodes and conventional fiber-optic technology, the 12-port system exhibits a capacity of nearly 1 Tb/s. Optical packets containing an eight-wavelength WDM payload with 10 Gb/s per wavelength are routed successfully to all 12 ports while maintaining a bit error rate (BER) of 10/sup -12/ or better. Median port-to-port latencies of 110 ns are achieved with a distributed deflection routing network that resolves packet contention on-the-fly without the use of optical buffers and maintains the entire payload path in the optical domain.     

Experimental characteristics of optical crosspoint switch matrix and its applications in optical packet switching

This paper presents the experimental results of the switching performances of the fast reconfigurable optical crosspoint switch (OXS) matrix. This paper demonstrates unicast optical packet switching for a 10-Gb/s payload at various modulation formats and a 155-Mb/s nonreturn-to-zero label. Reconfigurable time as fast as 2 ns is achieved because of the optimized control circuit and device fabrication. The power and wavelength dependence for the payload and the capability of multihop operation are investigated as well. The functionalities of the OXS acting as an optical switch and an optical buffer are demonstrated in the optical network node experiment. Very good switching property is obtained for the OXS, which clearly validates OXS as a potential technique for future high-speed Internet-protocol-over-wavelength-division-multiplexing networks.     

Scalable optoelectronic ATM networks: the iPOINT fully functionaltestbed

Our prototype of a fully-functional asynchronous transfer mode (ATM) switch validates the design of a 128 Gb/s optoelectronic ATM switch. Optoelectronics, rather than all optical components, are used to simultaneously address all of the specific requirements mandated by the ATM protocol. In this paper, we present the Illinois pulsar-based optical interconnect (iPOINT) testbed, and present our results obtained for the prototype switch in a working environment consisting of an optical network of Sun SPARC Stations and other local and wide-area ATM switches