CuxSiyO阻变存储器单粒子和总剂量辐照效应

对CuxSiyO结构的阻变存储器(RRAM)进行了总剂量(TID)以及单粒子辐照(SEE)实验.总剂量实验中,1T1R样品分别接受总剂量为1,2和3 kGy (SiO2)的60Co γ射线辐射.样品中没有出现低阻在辐照后翻转的现象.单粒子辐照实验中,16 kbit RRAM阵列样品分别接受线性能量转移(LET)值最高达75 MeV的4种离子束的辐射.样品中没有出现低阻在辐照后翻转的现象.除一组无翻转外,存储单元的高阻到低阻的翻转率皆在0.06％左右.实验结果证实了RRAM中已经形成的导电通道不会受辐照影响,因此不存在低阻翻转为高阻的现象.     

面向航空环境的多时钟单粒子翻转故障注入方法

随着新型电子器件越来越多地被机载航电设备所采用,单粒子翻转(Single Event Upset, SEU)故障已经成为影响航空飞行安全的重大隐患。首先,针对由于单粒子翻转故障的随机性,该文对不同时刻发生的单粒子翻转故障引入了多时钟控制,构建了SEU故障注入测试系统。然后模拟真实情况下单粒子效应引发的多时间点故障,研究了单粒子效应对基于FPGA构成的时序电路的影响,并在线统计了被测模块的失效数据和失效率。实验结果表明,对于基于FPGA构建容错电路,采用多时钟沿三模冗余(Triple Modular Redundancy, TMR) 加固技术可比传统TMR技术提高约1.86倍的抗SEU性能;该多时钟SEU故障注入测试系统可以快速、准确、低成本地实现单粒子翻转故障测试,从而验证了SEU加固技术的有效性。     

高速A/D转换器单粒子效应实时评估系统和方法研究

提出了一种在线实时检测评估高速A/D转换器(ADC)的单粒子效应的测试方法。基于该方法搭建了部分模块可复用的单粒子效应测试评估系统。系统由时钟生成模块、待测ADC模块、D/A转换器(DAC)转换输出模块、FPGA控制模块与上位机模块构成。对待测ADC模块进行重构,可完成对不同ADC器件的测试评估,提升了模块可复用性和测试效率。该系统通过监测电源引脚的电流变化、ADC内部寄存器值翻转情况、经过高速DAC转换输出的模拟波形,可实时测试评估ADC器件的单粒子锁定(SEL)、单粒子翻转(SEU)、单粒子瞬态(SET)、单粒子功能中断(SEFI)等效应。基于该系统对自主研发的具有JESD204B接口的12位2.6 GS/s高速ADC进行了单粒子效应试验。试验分析表明,该系统能准确高效评估高速ADC器件的单粒子效应。     

一种单粒子效应加固输入接口电路的设计

提出一种新颖的单粒子效应加固输入接口电路,采用组合逻辑延迟后运算处理的方案。该电路基于华润上华600 V BCD 0.8 μm工艺进行电路设计和流片,并在中科院国家空间科学中心完成单粒子辐照测试。仿真测试结果表明,提出的输入接口电路可以有效免疫线性能量传递值(LET)在80 MeV·cm2/mg以下单粒子翻转(SEU)事件,特别是对多个节点同时发生单粒子翻转事件的情况,提出的电路抗单粒子翻转可靠性较高。     

针对中子单粒子效应的计算机防护架构设计

大气中子能够诱发电子器件发生显著的单粒子效应,导致电子设备发生存储单元的状态变化,或使电子器件发生单粒子翻转等故障。文章针对航空电子设备特别是计算机系统提出中子单粒子效应(SEE)防护设计架构,并通过辐照实验进行验证,计算机防护架构设计能有效减缓单粒子效应对其带来的危害影响,确保航空电子系统的可靠性和安全性要求。     

SRAM型FPGA单粒子翻转测试及加固技术研究

SRAM型FPGA空间应用日益增多,只有针对其特点设计相应的单粒子试验的测试程序才能系统、准确地获取该类芯片的单粒子翻转特性,为抗辐射加固设计提供依据.阐述了单粒子翻转的静态和动态的测试方法.静态测试包括硬件设计和配置位回读程序的设计;动态测试主要针对CLB(配置逻辑单元)和BRAM(块存储器)两部分进行了相应的软件测...     

超大规模FPGA的单粒子效应脉冲激光测试方法

建立了一种28 nm HPL硅工艺超大规模SRAM型FPGA的单粒子效应测试方法。采用静态测试与动态测试相结合的方式,通过ps级脉冲激光模拟辐照实验,对超大规模FPGA进行单粒子效应测试。对实验所用FPGA的各敏感单元(包括块随机读取存储器、可配置逻辑单元、可配置存储器)的单粒子闩锁效应和单粒子翻转极性进行了研究。实验结果证明了测试方法的有效性,揭示了多种单粒子闩锁效应的电流变化模式,得出了各单元的单粒子效应敏感性区别。针对块随机读取存储器、可配置逻辑单元中单粒子效应翻转极性的差异问题,从电路结构方面进行了机理分析。     

微小卫星单粒子闩锁防护技术研究

对于在轨微小卫星而言,单粒子闩锁(Single Event Latchup,SEL)是最具破坏性的单粒子效应之一,其后果轻则损坏器件,重则使在轨卫星失效。首先介绍了SEL发生机理,分析并总结现有抗SEL的关键技术。其次提出了空间单粒子闩锁防护措施并设计了一种可恢复式抗SEL电源接口电路,实现对卫星星上设备的防闩锁及过流保护。最后利用脉冲激光模拟单粒子效应技术对具有飞行经验的芯片进行实验测试。实验结果表明,该电路能够准确地检测SEL的发生,有效解除SEL效应,保证系统运行稳定可靠。     

DICE加固结构触发器的重离子实验研究

摘 要：基于0.18μm工艺平台,对双互锁存储单元（Double Interlocked Storage Cell,DICE）结构的触发器电路进行重粒子试验,重点验证单粒子效应（Single Event Effect,SEE）中的单粒子翻转（Single Event Upset,SEU）对体硅CMOS工艺器件及电路的影响。对比分析不同频率、不同驱动能力、不同版图结构和不同电压这四种情况下的辐照数据,验证电路抗辐照性能的有效性。实验结果表明：在实际工作中合理考虑DICE触发器的工作频率、工作电压、版图面积、节点驱动等因素,可满足航空航天应用的需求。     

SRAM型FPGA单粒子翻转模拟系统研究

SRAM型FPGA在空间辐照环境下,容易受到单粒子效应的影响,导致FPGA存储单元发生位翻转,翻转达到一定程度会导致功能错误。为了评估FPGA对单粒子效应的敏感程度和提高FPGA抗单粒子的可靠性,对实现故障注入的关键技术进行了研究,对现有技术进行分析,设计了单粒子翻转效应敏感位测试系统,利用SRAM型FPGA部分重配置特性,采用修改FPGA配置区数据位来模拟故障的方法,加速了系统的失效过程,实现对单粒子翻转敏感位的检测和统计,并通过实验进行验证,结果表明:设计合理可行,实现方式灵活,成本低,为SRAM型FPGA抗单粒子容错设计提供了有利支持。     

Experimental study on the single event effects in pulse width modulators by laser testing

This paper presents single event effect (SEE) characteristics of UC1845AJ pulse width modulators (PWMs) by laser testing. In combination with analysis to map PWM circuitry in the microchip dies, the typical SEE response waveforms for laser pulses located in different circuit blocks of UC1845AJ are obtained and the SEE mechanisms are analyzed. The laser SEE test results show that there are some differences in the SEE mechanisms of different circuit blocks, and phase shifts or changes in the duty cycles of few output pulses are the main SEE behaviors for UC1845AJ. In addition, a new SEE behavior which manifests as changes in the duty cycles of many output pulses is revealed. This means that an SEE hardened design should be considered.     

脉冲激光模拟单粒子锁定试验研究

This paper introduces major characteristics of the single event latchup（SEL） in CMOS devices.We accomplish SEL tests for CPU and SRAM devices through the simulation by a pulse laser.The laser simulation results give the energy threshold for samples to undergo SEL.SEL current pulses are measured for CMOS devices in the latchup state,the sensitive areas in the devices are acquired,the major traits,causing large scale circuits to undergo SEL,are summarized,and the test equivalence between a pulse laser and ions is also analyzed.     

Experimental study on the single event latchup simulated by a pulse laser

This paper introduces major characteristics of the single event latchup (SEL) in CMOS devices. We accomplish SEL tests for CPU and SRAM devices through the simulation by a pulse laser. The laser simulation results give the energy threshold for samples to undergo SEL. SEL current pulses are measured for CMOS devices in the latchup state, the sensitive areas in the devices are acquired, the major traits, causing large scale circuits to undergo SEL, are summarized, and the test equivalence between a pulse laser and ions is also analyzed.     

复杂数字电路中的单粒子效应建模综述

单粒子效应产生的软错误是影响航天电子系统可靠性的主要因素之一。对其进行建模是研究单粒子效应机理和电路加固技术的有效方法。介绍了深亚微米及以下工艺中影响模型准确性的几种效应机制,包括脉冲展宽机制、电荷共享机制和重汇聚机制等。重点分析了单粒子瞬态、单粒子翻转的产生模型和单粒子瞬态的传播模型。阐述了基于重离子和脉冲激光的模型验证方法。最后,分析了单粒子效应随特征尺寸的变化趋势,并提出了未来单粒子效应建模技术的发展方向。     

Analysis of single event transient pulse-width in 65 nm commercial radiation-hardened logic cell

With the critical charge reduced to generate a single event effect (SEE) and high working frequency for a nanometer integrated circuit, the single event effect (SET) becomes increasingly serious for high performance SOC and DSP chips. To analyze the radiation-hardened method of SET for the nanometer integrated circuit, the n⁺ guard ring and p⁺ guard ring have been adopted in the layout for a 65 nm commercial radiation-hardened standard cell library. The weakest driving capacity inverter cell was used to evaluate the single event transient (SET) pulse-width distribution. We employed a dual-lane measurement circuit to get more accurate SET''s pulse-width. Six kinds of ions, which provide LETs of 12.5, 22.5, 32.5, 42, 63, and 79.5 MeV·cm²/mg, respectively, have been utilized to irradiate the SET test circuit in the Beijing Tandem Accelerator Nuclear Physics National Laboratory. The testing results reveal that the pulse-width of most SETs is shorter than 400 ps in the range of LET_eff from 12.5 MeV·cm²/mg to 79.5 MeV·cm²/mg and the pulse-width presents saturation tendency when the effective linear energy transfer (LET_eff) value is larger than 40 MeV·cm²/mg. The test results also show that the hardened commercial standard cell''s pulse-width concentrates on 33 to 264 ps, which decreases by 40% compared to the pulse-width of the 65 nm commercial unhardened standard cell.     

功率VDMOSFET单粒子效应研究

阐述了空间辐射环境下n沟功率VDMOSFET发生单粒子栅穿(SEGR)和单粒子烧毁(SEB)的物理机理。研究了多层缓冲局部屏蔽抗单粒子辐射的功率VDMOSFET新结构及相应硅栅制作新工艺。通过对所研制的漏源击穿电压分别为65V和112V两种n沟功率VDMOS-FET器件样品进行锎源252Cf单粒子模拟辐射实验,研究了新技术VDMOSFET的单粒子辐射敏感性。实验结果表明,两种器件样品在锎源单粒子模拟辐射实验中的漏源安全电压分别达到61V和110V,验证了新结构和新工艺在提高功率VDMOSFET抗单粒子效应方面的有效性。     

星载环境下可重构技术分析

针对卫星在宇宙空间运行易受到各种高能粒子辐射,产生的单粒子现象会影响卫星正常工作的问题,通过总结传统的抗单粒子效应的几种方法、可重构技术的发展与分类,分析研究了星载可重构系统设计方法用来抗空间环境辐射效应。通过硬件平台的动态重构可以有效克服单粒子效应的影响,实现远程故障维修、硬件可升级、可靠性提高和成本降低等目标。     

The investigation on sensitive mapping of memory cell in microprocessor

The single event effects of the sensitivity of a circuit are investigated on a 32-bit microprocessor with a five-stage instruction pipeline by pulsed laser test. The investigation on sensitive mapping of the memory cell is illustrated and then the comparison between the sensitive mapping and the layout of the circuit is made. A comparison result indicates that the area of the sensitive node in sensitive mapping is just the location of the drain in the layout. Therefore, SEE sensitivity in sensitive mapping fits well with that in the physical layout of functional units, which can directly and objectively indicate the size and distribution of sensitive areas. The investigation of sensitive mapping is a meaningful way to verify the hardened effect and provide a reference for improving hardened design by combining with the physical layout.     

铁电存储单元单粒子效应的仿真与研究

运用电路仿真研究了单粒子瞬态脉冲效应对铁电存储单元存储特性的影响。结合单粒子对MOS器件的影响,用电流模拟单粒子对存储单元的影响且进行仿真分析。仿真结果表明脉冲电流峰值越高,时间越长,铁电存储单元越容易翻转。经分析得出了铁电电容翻转是由瞬态电流脉冲产生的单位面积电荷量决定,最后解释了翻转的原因。