Negative base current and impact ionization phenomena inAlGaAs/GaAs HBTs

Impact ionization phenomena in the collector region of AlGaAs/GaAs heterojunction bipolar transistors give rise to base current reduction and reversal. These phenomena can be characterized by extracting the M-1 coefficient, which can be evaluated by measuring base current changes. Measurements of M-1 are affected at low current densities by the presence of the collector-base junction reverse current I_CBO. At high current densities, three effects contribute to lower the measured M-1 value: voltage drops due to collector (R_C) and base (R_B) parasitic resistances, device self-heating, and lowering of the base-collector junction electric field due to mobile carriers. By appropriately choosing the emitter current value, parasitic phenomena are avoided and the behavior of M-1 as a function of the collector-base voltage V_CB in AlGaAs/GaAs HBTs is accurately characterized     

Co-integration of resonant tunneling and double heterojunctionbipolar transistors on InP

The authors report the first co-integration of resonant tunneling and heterojunction bipolar transistors. Both transistors are produced from a single epitaxial growth by metalorganic molecular beam epitaxy, on InP substrates. The fabrication process yields 9-μm²-emitter resonant tunneling bipolar transistors (RTBTs) operating at room temperature with peak-to-valley current ratios (PVRs) in the common-emitter transistor configuration, exceeding 70, at a resonant peak current density of 10 kA/cm², and a differential current gain at resonance of 19. The breakdown voltage of the In_0.53Ga_0.47As-InP base/collector junction, V_CBO, is 4.2 V, which is sufficient for logic function demonstrations. Co-integrated 9-μm²-emitter double heterojunction bipolar transistors (DHBTs) with low collector/emitter offset voltage, 200 mV, and DC current gain as high as 32 are also obtained. On-wafer S-parameter measurements of the current gain cutoff frequency (f_T) and the maximum frequency of oscillation (f_max) yielded f _T and f_max values of 11 and 21 GHz for the RTBT and 59 and 43 GHz for the HBT, respectively     

Parasitic energy barriers in SiGe HBTs

Parasitic energy barriers can easily be introduced during processing. Measurements and calculations of experimental n-p-n HBTs (heterojunction bipolar transistors) are presented, showing that a parasitic conduction-band barrier at the base-collector junction reduces the collector current and the cutoff frequency. A simple analytical model explains the f_T degradation, caused by the reduction of the collector current and a pileup of minority carriers in the base. With the model the effective height and width of the barrier can also be derived from the measured collector current enhancement factor I_C(SiGe)/I_C(Si)     

Experimental values for the hole diffusion coefficient andcollector transit velocity in P-n-p AlGaAs/GaAs HBTs

The diffusion coefficient (D_h) and a value for the collector velocity (v_h) of holes in AlGaAs/GaAs P-n-p HBTs (heterojunction bipolar transistors) were obtained from high-frequency measurements on structures with different base and collector widths. Quantities for D_h and v _h of 5.6 cm²/s and 5.5×10⁶ cm/s, respectively, were obtained by plotting the total emitter-collector delay versus inverse emitter current and extrapolating the data to infinite emitter current to obtain the base and collector transit delays. An f_t and f_max as high as 15 and 29 GHz, respectively, were obtained for non-self-aligned (1-μm emitter mesa/base contact separation) devices with a 2.6-μm×10-μm emitter     

An NMOS input merged bipolar/sidewall-MOS transistor with a bypasssidewall MOS transistor (NBiBMOS transistor)

The concept of merging a vertical n-p-n bipolar and two sidewall NMOS transistors into an NMOS input merged bipolar/sidewall-MOS transistor with a bypass sidewall NMOS transistor structure (NBiBMOS transistor) is described. The output current of this structure, unlike that of NBiMOS transistors, is significant even when the output voltage (V_CE or V_DE) is less than the turn-on voltage of the n-p-n bipolar transistor (V_BE=~0.8 V). This structure, when used in BiCMOS logic gates, will allow the output voltage to swing all the way to 0.0 V rather than to 0.8 V. The feasibility of this concept was demonstrated by fabricating and DC characterizing the NBiBMOS transistor structures, which occupy ~1.2 times the area of a single n-p-n bipolar transistor. The NBiBMOS transistor has a higher drive capability than that of a structure consisting of an NBiMOS and a separate bypass transistor, because the body-source junction of the bypass NMOS transistor is forward biased     

Scaling in npn and pnp heterostructure bipolar transistors

Calculating the cutoff frequency f_T of bipolar transistors from the emitter-to-collector delay neglects the heavy influence of parasitic reactances on the frequency response of realistic transistors. A more complete equivalent circuit modelling reveals that the speed advantage of npn against pnp heterojunction bipolar transistors of common geometry, base width, and doping profile decreases as the transistor is scaled up in size. For power applications, the f_T of InP/GaInAs pnp devices may even surpass that of npn transistors     

High-low polysilicon-emitter SiGe-base bipolar transistors

Self-aligned heterojunction bipolar transistors with a high-low emitter profile consisting of a heavily doped polysilicon contact on top of a thin epitaxial emitter cap have been fabricated. The low doping in the single-crystal emitter cap allows a very high dopant concentration in the base with low emitter-base reverse leakage and low emitter-base capacitance. The thin emitter cap is contacted by heavily doped polysilicon to reduce the emitter resistance, the base current, and the emitter charge storage. A trapezoidal germanium profile in the base ensures a small base transit time and adequate current gain despite high base doping. The performance potential of this structure was simulated and demonstrated experimentally in transistors with near-ideal characteristics, very small reverse emitter-base leakage current, and 52-GHz peak f_max, and in unloaded ECL and NTL ring oscillators with 24- and 19-ps gate delays, respectively     

Improved circuit technique to reduce hfe degradation inbipolar output drivers

h_fe degradation in bipolar transistors caused by reverse V_be stress decreases the reliability of BiCMOS circuits. In this paper, we present an improved circuit technique to limit reverse V_be, and thus significantly increase BiCMOS reliability. The technique also reduces the base-emitter breakdown voltage constraint on BiCMOS technology design     

Collector/emitter offset voltage in double-heterojunction bipolar transistors

Double-heterojunction bipolar transistors (DHBT) can exhibit a large collector/emitter offset voltage at zero collector current which will adversely affect digital switching circuits. It is shown that this effect results from insufficient grading at the base/collector heterojunction. A GaAlAs/GaAs DHBT grown by MBE having a 130 ? compositional grading at the emitter/base and base/collector junction showed no sign of the collector/emitter offset voltage.     

Process integration and device performance of a submicrometerBiCMOS with 16-GHz ft double poly-bipolar devices

Submicrometer-channel CMOS devices have been integrated with self-aligned double-polysilicon bipolar devices showing a cutoff frequency of 16 GHz. n-p-n bipolar transistors and p-channel MOSFETs were built in an n-type epitaxial layer on an n⁺ buried layer, and n-channel MOSFETs were built in a p-well on a p⁺ buried layer. Deep trenches with depths of 4 μm and widths of 1 μm isolated the n-p-n bipolar transistors and the n- and p-channel MOSFETs from each other. CMOS, BiCMOS, and bipolar ECL circuits were characterized and compared with each other in terms of circuit speed as a function of loading capacitance, power dissipation, and power supply voltage. The BiCMOS circuit showed a significant speed degradation and became slower than the CMOS circuit when the power supply voltage was reduced below 3.3 V. The bipolar ECL circuit maintained the highest speed, with a propagation delay time of 65 ps for C_L=0 pF and 300 ps for C_L=1.0 pF with a power dissipation of 8 mW per gate. The circuit speed improvements in the CMOS circuits as the effective channel lengths of the MOS devices were scaled from 0.8 to 0.4 μm were maintained at almost the same ratio     

Electron space-charge effects on high-frequency performance ofAlGaAs/GaAs HBTs under high-current-density operation

The high-frequency characteristics of AlGaAs/GaAs heterojunction bipolar transistors (HBTs) under high-current-density biasing condition are investigated in conjunction with the electron space charge in the collector depletion layer. A significant increase in cutoff frequency f_t and maximum oscillation frequency f_max at the early stage of the base push-out was observed in HBTs with a lightly doped n-type collector structure, and is attributed to the collector depletion layer widening and the enhancement of the velocity overshoot effect caused by the increasing electron density     

Transistor design for predictable power gain at maximum frequency

Equations which define the neutral base width, collector doping, and epitaxial collector thickness of a bipolar transistor giving a specified unilateral power gain at the highest frequency, possible are derived. Emitter-base capacitance, emitter delay, emitter stripe width, base doping, and the operating base-collector voltage are assumed to be known and fixed. The hybrid-π equivalent circuit is assumed valid up to the transition frequency f_t. Peak f_max (maximum oscillation frequency) is examined as a function of the collector doping. Maximizing f_max at all costs leads to a design with an f_t which approaches zero. In designing a transistor, the two figures of merit must be traded off against each other. A simple expression giving maximum f_max/f_t is derived and used to define the transistor design which gives some specified power gain at the highest possible frequency     

An accurate analytical BiCMOS delay expression and its applicationto optimizing high-speed BiCMOS circuits

A scheme for optimizing the overall delay of BiCMOS driver circuits is proposed in this paper. Using this optimization scheme, it is found that the delay is minimized when the maximum collector current of the bipolar transistors is equal to the onset of high current effects. Using this assumption, an accurate BiCMOS delay expression is derived in terms of the bipolar and MOS device parameters. The critical device parameters are then identified and their influence on the circuit speed discussed. An overall circuit delay expression for optimizing BiCMOS buffers is derived and a comparison made with CMOS buffers. It is shown that BiCMOS circuits have a speed advantage of 1.7 or an area advantage of about 5 for 2-μm feature sizes. In order to predict the future performance of BiCMOS circuits, a figure of merit is derived from the delay expression. Using the figure-of-merit expression, it is seen that future BiCMOS circuits can keep the speed advantage over CMOS circuits down to submicrometer dimensions under constant load capacitance assumption     

Effect of hot-electron injection of high-frequency characteristicsof abrupt In0.52(Ga1-xAlx)0.48As/InGaAs HBT's

The effect of hot-electron injection energy (E_i) into the base on the high-frequency characteristics of In_0/52(Ga_1-xAl_x)_0.48 As/InGaAs abrupt heterojunction bipolar transistors (HBTs) is investigated by changing the composition of the emitter. There exists an optimum E_i at which a maximum current gain cutoff frequency (ft) is obtained. Analysis of hot-electron transport in the base and collector by Monte Carlo simulation is carried out to understand the above phenomenon. The collector transit time (τ_c ) increases with E_i, because electrons with higher energy transfer from the Γ valley into the upper L and X valleys. At first, the base transit time (τ_b ) decreases with E_i at the low E_i region. However, τ_b does not decrease monotically with E_i, because of the nonparabolicity in the energy-band structure of InGaAs. Consequently, there exists a minimum in the sum of τ_b and τ_c , in other words a maximum f_t, at an intermediate value of E_i     

Resolving degradation mechanisms in ultra-high performance N-p-nheterojunction bipolar transistors

The conduction band barrier caused by base dopant outdiffusion is investigated for MBE-grown Al_xGa_1-xAs/GaAs N-p-n linearly graded heterojunction bipolar transistors (HBTs). The change of the B-E heterojunction conduction band barrier can be directly revealed by a novel technique based on the diffusion-thermionic emission current model. This is accomplished by measuring the inverted collector current ratio at two different heterojunction reverse biases. In addition, this ratio is found to correlate with an anomalous base current component measured at low temperature. The heterojunction potential barrier and the anomalous base current component are attributed to beryllium redistribution during MBE growth and forward current stress. This suggests that the diffusion and incorporation of beryllium dictate V _BE uniformity and long-term reliability of HBTs     

Numerical simulation and comparison of Si BJTs andSi1-xGex HBTs

Using the Monte Carlo method for the solution of the Boltzmann transport equation, the authors analyze the low-field carrier mobilities of strained layer and bulk Si and Si_1-xGe_x alloys. Strained alloy layers exhibit higher low-field mobility compared with bulk Si at doping levels >10¹⁸ cm^-3 and for a Ge mole fraction x⩽0.2, while the unstrained alloy bulk low-field mobility is always lower than that of Si for any doping level or mole fraction. These mobilities are then used in a two-dimensional drift-diffusion equation solver to simulate the performance of Si BJTs (bipolar junction transistors) and Si_1-xGe_x HBTs (heterojunction bipolar transistors). The substitution of a Si_0.8 Ge_0.2 layer for the base region leads to a significant improvement in current gain, turn-on voltage, and high-frequency performance. Maximum unity current gain frequency f_T increases two times over that of an Si BJT if the bulk alloy mobility is used for the alloy base layer; it increases three times if strained-layer mobility is used. Maximum frequency of oscillation also improves, but not as dramatically as f_T     

An AlGaAs/GaAs heterostructure-emitter bipolar transistor

An AlGaAs/GaAs heterostructure-emitter bipolar transistor using separate carrier injection and confinement is discussed. A common-emitter current gain of 28 with BV_CEO=15 V was obtained at a base doping level of 1×10¹⁹/cm³ . No spacer layer was inserted in the structure. This transistor combines the merits of homojunction transistors and regular heterostructure bipolar transistors (HBTs) and is simple to fabricate     

On the thermionic-diffusion theory of minority transport inheterostructure bipolar transistors

The theory of the minority-carrier transport in heterostructure bipolar transistors (HBT) is reconsidered with a particular emphasis on the difference between the cases of abrupt and graded emitter-base junctions and the role in the former case of the quasi-Fermi level discontinuity at the interface. Exact analytical formulas are derived for the current-voltage characteristics of a double-heterojunction HBT, valid for arbitrary levels of injection and base doping, including the degenerate case. The theory is applied to the static characterization of HBT which compares the forward and reverse dependences I_C (V_EB) and I_E(V _CB). It is shown that these characteristics coincide in the low-injection limit if both the emitter-base and the collector-base diodes have ideality factors close to unity. The ratio of base currents in the reverse and forward modes of operation can be used to determine the abrupt emitter-base conduction band discontinuity and estimate the scattering length in the base     

Current gain-Early voltage products in heterojunction bipolartransistors with nonuniform base bandgaps

The tradeoff between common-emitter current gain (β) and Early voltage (V_A) in heterojunction bipolar transistors (HBTs) where the bandgap varies across the base has been studied. The Early voltage depends exponentially on the difference between the bandgap at the collector side of the base and the largest bandgap in the base, allowing very high Early voltages with only very thin narrow bandgap regions. Using Si/Si_1-xGe_x/Si HBTs with a two-layer stepped base, βV_A products of over 100000 V have been achieved for devices with a cutoff frequency expected to be about 30 GHz