Intelligent scheduling approaches for a wafer fabrication factory

The production system of a wafer fabrication factory is a very complicated process. Job scheduling in a wafer fabrication factory is a very difficult task. To solve this problem, two intelligent scheduling rules are proposed in this study. The intelligent scheduling rules are modified from the well-known fluctuation smoothing rules with some innovative treatments. To evaluate the effectiveness of the proposed methodology, production simulation was also applied in this study. According to experimental results, the proposed methodology outperformed some existing approaches by reducing the average cycle time and cycle time standard deviation, the most important objectives of job scheduling in a wafer fabrication factory.     

Application of a genetic algorithm in solving the capacity allocation problem with machine dedication in the photolithography area

Wafer fabrication is a complicated manufacturing process with high process capability. Hence, maximizing machine capacity to meet customer deadlines is a very important issue in this field. This study proposes an integer programming model and a heuristic algorithm approach to solve the loading balance problem for the photolithography area in the semiconductor manufacturing industry. Considering process capability, machine dedication, and reticle constraints, we aim to minimize the difference in loading between machines. Process capability means that each product must be processed in machines that meet the process specification. Machine dedication means that if the first critical layer of a wafer is assigned to a certain machine, then the following critical layers of such wafer must be processed in this certain machine to ensure wafer quality. This research compares the results of two methods and finds the best parameter settings of the genetic algorithm (GA). The computational performance results of the GA shows that we can find the near-optimal solution within a reasonable amount of time. Finally, this research analyzes machine capability and reticle flexibility to determine the best percentage that can be used as reference for application in the semiconductor industry.     

Collaborative decision making algorithm for selection of optimal wire saw in photovoltaic wafer manufacture

The yield of the wafer slicing process has the greatest impact on manufacturing costs in the fabrication of photovoltaic (PV) cells. Hence, it is critical to identify the correct type of wire saw for this process. This paper employs the analytic hierarchy process (AHP) and the technique for order preference by similarity to ideal solution (TOPSIS) to construct a collaborative decision model for predicting the yield of a wire saw. The evaluation criteria for establishing the model are derived on the basis of a literature review and the opinions of experts with experience in PV wafer manufacturing. The evaluation weights are determined by the AHP and the optimal machine is identified by the TOPSIS. Finally, process capability indices are presented to demonstrate and verify the feasibility and effectiveness of the proposed method.     

基于Flou集的模糊叠置分析模型

利用Flou集描述模糊区域,基于Flou集给出了一种栅格图层的模糊叠置分析模型。该模型可以实现普通模糊叠置和加权模糊叠置,而采用Flou集,可以有效地避免用模糊集表示模糊区域,处理模糊对象内部元素之间及模糊对象与其他空间对象之间关系时遇到的困难,而且符合人们用分明区域的方式描述不确定区域的认知习惯。实例表明,该模型能够较好地解决Flou集表示的图层间的模糊叠置分析问题。     

Reticle Design for Minimizing Multiproject Wafer Production Cost

Multiproject wafer (MPW) production cost is sensitive to how the chips are arranged in a reticle. In this paper, we propose a methodology for exploring the reticle floorplan design space to minimize MPW production cost. Experimental results show that our methodology often achieves double-digit cost savings. A study using MPW for volume production shows that the volume cutoff points range from a few thousand dice to tens of thousands of dice. Note to Practitioners-This paper proposes a methodology for minimizing MPW production cost via better chip placement in a reticle (called reticle floorplanning). Our methodology consists of an effective reticle floorplanning method, two simulated wafer dicing methods, two cost estimation models, and a procedure for calculating the cost assumed by each project. A design service company or a foundry can use our methodology to reduce MPW production cost and, thus, provides a more affordable and expedient service to its customers. The reticle floorplanning method and simulated wafer dicing methods employed here are the state-of-the-art. A practitioner should adapt these methods to other MPW problems such as dealing with multitechnology process, placing multiple instances of the same design in a reticle, etc. The cost models should also be revised accordingly. The cost data given in this paper should be used only for reference as mask tooling and wafer fabrication costs constantly change. The cost model proposed for calculating the production cost assumed by each project can serve as a basis for developing a fairer pricing model. The study of using MPW for low to medium-volume production is also very useful. It may help a customer deliver its product earlier to market using a low-cost fabrication program. The problem addressed in this paper becomes much simpler if the side-to-side wafer dicing constraint is removed.     

UNISON analysis to model and reduce step-and-scan overlay errors for semiconductor manufacturing

Semiconductor industry has been one of the most complicated industries driven by Moore’s Law for continuous technology evolution. In order to meet the requirements of high resolution and alignment accuracy, the lithography equipments have been advanced from step-and-repeat system to step-and-scan system. As the tolerance of linewidths is becoming tight and slight, overlay errors must be controlled within the tolerance to maintain the yield. In particular, overlay errors can be compensated by modifying the corresponding equipment setup parameters. However, little research has been done to deal with overlay errors of the step-and-scan system. This study aimed to develop a modeling and decision analysis framework in which the overlay error model for step-and-scan system was constructed and the optimal sampling strategy for measuring and compensating the overlay errors was thus designed. Furthermore, we validated the proposed model and sampling strategy by empirical studies conducted in a fab. We compared the proposed sampling strategy with alternative sampling strategies including the existing sampling strateg based on the model adequacy of R-squares and the model effectiveness of residual errors. The results demonstrated the practical viability of the proposed approach.     

Multi-objective real-time dispatching for integrated delivery in a Fab using GA based simulation optimization

In a wafer fabrication Fab, the “integrated delivery”, which integrates the automated material handling system (AMHS) with processing tools to automate the material flow, is difficult to implement due to the system complexity and uncertainty. The previous dispatching studies in semiconductor manufacturing have mainly focused on the tool dispatching. Few studies have been done for analyzing combinatorial dispatching rules including lot dispatching, batch dispatching and automated guided vehicle (AGV) dispatching. To handle this problem, a GA (genetic algorithm) based simulation optimization methodology, which consists of the on-line scheduler and the off-line scheduler, is presented in this paper. The on-line scheduler is used to monitor and implement optimal combinatorial dispatching rules to the semiconductor wafer fabrication system. The off-line scheduler is employed to search for optimal combinatorial dispatching rules. In this study, the response surface methodology is adopted to optimize the GA parameters. Finally, an experimental bay of wafer fabrication Fab is constructed and numerical experiments show that the proposed approach can significantly improve the performance of the “integrated delivery system” compared with the traditional single dispatching rule approach.     

An intelligent system for wafer bin map defect diagnosis: An empirical study for semiconductor manufacturing

Wafer bin maps (WBMs) that show specific spatial patterns can provide clue to identify process failures in the semiconductor manufacturing. In practice, most companies rely on experienced engineers to visually find the specific WBM patterns. However, as wafer size is enlarged and integrated circuit (IC) feature size is continuously shrinking, WBM patterns become complicated due to the differences of die size, wafer rotation, the density of failed dies and thus human judgments become inconsistent and unreliable. To fill the gaps, this study aims to develop a knowledge-based intelligent system for WBMs defect diagnosis for yield enhancement in wafer fabrication. The proposed system consisted of three parts: graphical user interface, the WBM clustering solution, and the knowledge database. In particular, the developed WBM clustering approach integrates spatial statistics test, cellular neural network (CNN), adaptive resonance theory (ART) neural network, and moment invariant (MI) to cluster different patterns effectively. In addition, an interactive converse interface is developed to present the possible root causes in the order of similarity matching and record the diagnosis know-how from the domain experts into the knowledge database. To validate the proposed WBM clustering solution, twelve different WBM patterns collected in real settings are used to demonstrate the performance of the proposed method in terms of purity, diversity, specificity, and efficiency. The results have shown the validity and practical viability of the proposed system. Indeed, the developed solution has been implemented in a leading semiconductor manufacturing company in Taiwan. The proposed WBM intelligent system can recognize specific failure patterns efficiently and also record the assignable root causes verified by the domain experts to enhance troubleshooting effectively.     

Cycle time analysis of dual-arm cluster tools for wafer fabrication processes with multiple wafer revisiting times

For some wafer fabrication processes, the wafers need to visit some processing modules for a number of times, which is referred to as the revisiting process. With wafer revisiting, it is very complicated to analyze the cycle time of a dual-arm cluster tool. Due to the fact that atomic layer deposition (ALD) process is a typical revisiting process in the semiconductor industry, study is conducted on cycle time analysis of dual-arm cluster tools for the ALD process with multiple revisiting times. The system is modeled by a type of Petri net. With this model, it is revealed that the system may never reach a steady state. Based on this finding, a method is presented to analyze the cycle time and analytical expressions are derived to calculate the cycle time for different cases. Several illustrative examples are given to show the applications of the proposed approach.     

A fuzzy back propagation network ensemble with example classification for lot output time prediction in a wafer fab

Lot output time prediction is a critical task to a wafer fabrication plant (wafer fab). To further enhance the accuracy of wafer lot output time prediction, the concept of clustering is applied to Chen’s fuzzy back propagation network (FBPN) approach in this study by pre-classifying wafer lots before predicting their output times with several FBPNs that have the same topology. Each wafer lot category has a corresponding FBPN that is applied to predict the output times of all lots belonging to the category. In choosing the learning examples of each category, whether a wafer lot can be unambiguously classified or not and the accuracy of predicting the output time of the lot are simultaneously taken into account. To validate the effectiveness of the proposed methodology and to make comparison with some existing approaches, the actual data in a wafer fab were collected. According to experimental results, the prediction accuracy of the proposed methodology was significantly better than those of some existing approaches in most cases by achieving a 19–52% (and an average of 38%) reduction in the root-mean-square-error (RMSE). On the other hand, compared with the fuzzy c-means (FCM)-BPN-ensemble approach, the performance of the proposed methodology in the efficiency respect was indeed improved.     

A self-adaptive agent-based fuzzy-neural scheduling system for a wafer fabrication factory

A self-adaptive agent-based fuzzy-neural system is constructed in this study to enhance the performance of scheduling jobs in a wafer fabrication factory. The system integrates dispatching, performance evaluation and reporting, and scheduling policy optimization. Unlike in the past studies a single pre-determined scheduling algorithm is used for all agents, in this study every agent develops and modifies its own scheduling algorithm to adapt it to the local conditions. To stabilize the performance of the self-adaptive agent-based fuzzy-neural scheduling system, some treatments have also been taken. To evaluate the effectiveness of the proposed methodology and to make comparison with some existing approaches, production simulation is also applied in this study to generate some test data. According to experimental results, the self-adaptive agent-based fuzzy-neural system did improve the performance of scheduling jobs in the simulated wafer fabrication factory, especially with respect to the average cycle time and cycle time standard deviation.     

Meet In the Middle Cross-Layer Adaptation for Audiovisual Content Delivery

This paper describes a new architecture and implementation of an adaptive streaming system (e.g., television over IP, video on demand) based on cross-layer interactions. At the center of the proposed architecture is the meet in the middle concept involving both bottom-up and top-down cross layer interactions. Each streaming session is entirely controlled at the RTP layer where we maintain a rich context that centralizes the collection of (i) instantaneous network conditions measured at the underlying layers (i.e.: link, network, and transport layers) and (ii) user- and terminal-triggered events that impose new real-time QoS adaptation strategies. Thus, each active multimedia session is tied to a broad range of parameters, which enable it to coordinate the QoS adaptation throughout the protocol layers and thus eliminating the overhead and preventing counter-productiveness among separate mechanisms implemented at different layers. The MPEG-21 framework is used to provide a common support for implementing and managing the end-to-end QoS of audio/video streams. Performance evaluations using peak signal to noise ratio (PSNR) and structural similarity index (SSIM) objective video quality metrics show the benefits of using the proposed Meet In the Middle cross-layer design compared to traditional media delivery approaches.     

Scheduling cluster tools in wafer fabrication using candidate list and simulated annealing

This paper presents a new method for scheduling cluster tools in semiconductor fabrication. A cluster tool consists of a group of single-wafer chambers organized around a wafer transport device, or robot. Cluster fabrication system considered in this paper consists of serial cluster tools. Due to constraints imposed by multiple routes of each wafer type and machines with no buffer, it is difficult to find an optimal or near-optimal schedule. In order to determine the sequence of the operations to be released and the assignment of the machine to each operation, the proposed method uses a job requirement table with random keys as a solution representation. Simulated annealing seeks the optimal or near-optimal sequence and machine assignment of the operations. In this paper, the scheduling objective is to find a schedule with minimum makespan. A Gantt chart is obtained as the final schedule. To handle the constraints, the proposed method uses a candidate list. To determine which operation can be scheduled in considering the constraints, a negotiation procedure between the operations in the candidate list and a current state of the system is introduced. To show the effectiveness of the proposed method, scheduling example of a real cluster fabrication system is presented. Scheduling results are compared with those obtained by using several dispatching rules. From the experimental results, it is shown that the proposed method is promising.     

Enhancing the yield competitiveness of a semiconductor fabrication factory with dynamic capacity re-allocation

To improve the yield competitiveness of a semiconductor fabrication factory, a dynamic capacity re-allocation mechanism is proposed in this study. At first, a systematic procedure is established for evaluating the yield competitiveness of a semiconductor fabrication factory by considering the yield learning models of all its products. Subsequently, an efficient mechanism is proposed to re-allocate capacity/resources among products, so as to enhance the competitiveness of the whole factory. To demonstrate the applicability of the proposed methodology, it was applied to the practical data of three products. Experimental results showed that after capacity re-allocation, all the three products became yield competitive. Besides, the capacity re-allocation plan established by the proposed methodology was both efficient and practical.     

Raising the hit rate for wafer fabrication by a simple constructive heuristic

The rate of on-time delivery, namely hit rate, is a very significant performance measurement index for semiconductor wafer fabrication. This study proposes an efficient simple constructive heuristic (SCH), called slack multiplied uncompleted ratio (SMUR), for raising the hit rate in wafer fabs. Effectiveness of the proposed SMUR heuristic is verified by conducting simulation experiments based on a well known model from the relevant literature. The results indicate that the proposed SMUR heuristic is a state-of-the-art SCH for the current problem by comparing the obtained results to the best available SCHs in the relevant literature. Since the proposed SMUR heuristic is easy to implement and decreases the computational burden, this study successfully develops a practical approach which will hopefully encourage practitioners to apply it to real world problems.     

稳态调度下单臂组合设备时间延迟分析与优化

在半导体晶圆制造过程中,驻留时间延迟过长对晶圆质量具有消极影响.本文研究单臂组合设备稳态调度中如何合理地分配机械手等待时间,抵消驻留时间延迟的问题.首先,采用Petri网模型描述晶圆制造过程,分析了单臂组合设备稳态调度的时间特性,获得了稳态下工序驻留时间延迟计算表达式.其次,通过解构机械手等待时间对驻留时间延迟的影响机理,提出了一种机械手等待时间分配优先级规则.进一步,将虚拟瓶颈工序用于辅助分配机械手等待时间,结合优先级规则,提出了一种单臂组合设备稳态调度启发式算法.最后,通过例子验证了算法的可行性与有效性.与传统拉式策略和尽早加工策略对比,该算法能有效地减少单臂组合设备稳态调度下的驻留时间延迟并能满足晶圆制造的严格要求.     

Machine path generation for the SIS process

Because of the differences in the nature of rapid prototyping (RP) processes, there is no standard machine path code for them. Each RP process, based on its characteristics and requirements, uses the standard CAD file format to extract the required data for the process. Selective inhibition of sintering (SIS) is a new layered fabrication method based on powder sintering. Like other RP systems, SIS needs a specialized machine path generator to create an appropriate machine path file. Machine path (i.e., boundary path and hatch path) should produce the printing pattern that enables the SIS machine user to easily remove the fabricated part from the surrounding material. A new machine path algorithm, which generates appropriate boundary and hatch paths for the SIS process is proposed. The new machine path generator provides the ability to process CAD models of any size and complexity, the ability for machine path verification before sending the file to the SIS machine, and the ability to fix the possible STL files disconnection errors. In this system, very large STL files can be processed in a relatively small computer memory. The system has been successfully tested on STL files as large as 200 MB. The generated path files have been used in fabrication of several parts by the SIS process.     

无线通信网络安全态势识别方法研究

当前,网络安全态势识别方法只能获取网络层的安全态势感知要素,导致无线通信网络安全态势识别误差偏大。对此,提出基于深度自编码网络的无线通信网络安全态势识别方法。引入受限玻尔兹曼机逐层训练深度自编码网络,利用深度自编码网络前向传播的方式,提取服务、主机、网络三层的安全态势感知要素。在此基础上,将网络态势分为环境、威胁、资产三个因子,通过三方博弈方法计算三个因子效益,得到网络安全态势值,以此实现无线通信网络安全态势识别。试验结果表明,研究方法绝对误差平均值与试验对比方法相比分别小0.112和0.106,识别精度更高。该方法的实际应用效果更好,可以满足无线通信网络安全态势识别需求。     

An effective fuzzy collaborative forecasting approach for predicting the job cycle time in wafer fabrication

Predicting the cycle time of each job in a factory is an important task to the factory. However, it is not easy to deal with the uncertainty in the job cycle time. To cope with this problem and to effectively predict the job cycle time, an effective fuzzy collaborative forecasting approach is proposed in this study. The main difference between the proposed methodology and the existing methods is that the proposed methodology generates a fuzzy cycle time forecast in an effective way. In addition, the proposed method utilizes each round of fuzzy artificial neural network training to generate the upper and lower bounds of the job cycle time. The upper and lower bounds then serve as the basis for the subsequent collaboration. We collected the data of 120 jobs from a wafer fabrication factory to assess the effectiveness of the proposed method. The analysis results showed that the proposed fuzzy collaborative forecasting approach was indeed more efficient and accurate than some existing methods.     

Joining the blunt and the pointy end of the spear: towards a common framework of joint action,human–machine cooperation,cooperative guidance and control,shared, traded and supervisory control

To introduce this special issue of shared and cooperative control, we will look into history of tools in cooperation between humans and aim to unify the plethora of related concepts and definitions that have been proposed in recent years, such as shared control, human–machine cooperation and cooperative guidance and control. Concretely, we provide definitions to relate these concepts and sketch a unifying framework of shared and cooperative control that sees the different concepts as different perspectives or foci on a common design space of shared intentionality, control and cooperation between humans and machines. One working hypothesis which the article explores is that shared control can be understood as cooperation at the control layer, while human–machine cooperation can include shared control, but can also extend towards cooperation at higher layers, e.g., of guidance and navigation, of maneuvers and goals. The relationship between shared control and human–machine cooperation is compared to the relationship between the sharp, pointy tip and the (blunt) shaft of a spear. Shared control is where cooperation comes sharply into effect at the control layer, but to be truly effective it should be supported by cooperation on all layers beyond the operational layer, e.g., on the tactical and strategic layer. A fourth layer addresses the meta-communication about the cooperation and supports the other three layers in a traversal way.