A 3–10 GHz Ultra Wideband Receiver LNA in 0.13 \mu m CMOS

A fully integrated low-power, low-complexity ultra wideband (UWB) 3–10 GHz receiver front-end in standard 130 nm CMOS technology is proposed for UWB radar sensing applications. The receiver front-end consists of a full UWB band low-noise amplifier and an on-chip diplexer. The on-chip diplexer has a 1 dB insertion loss and provides a \(-\) 30 dB isolation. The diplexer switch was co-designed with the receiver input matching network to optimize the power matching while simultaneously achieving good noise matching performance. The receiver low-noise amplifier provides a 3–10 GHz bandwidth input matching and a power gain of 17 dB. The overall receiver front-end consumes an average power of 13 mW. The core area of the transceiver circuit is 500 \(\mu \) m by 700 \(\mu \) m.     

A dual-band direct-conversion RF front-end for WiMedia UWB receiver

This paper describes a direct-conversion RF front-end designed for a dual-band WiMedia UWB receiver. The front-end operates in band group BG1 and BG3 frequencies. It includes multi-stage LNAs, down-conversion mixers, a polyphase filter for quadrature local oscillator (LO) signal generation, and LO buffers. The UWB receiver is targeted for a mobile handset, where several other radios can be simultaneously on. Therefore, special attention was paid on minimizing the interference from different wireless systems. The front-end achieves approximately 26-dB gain and 4.9–5.6-dB noise figure (NF) across three sub-bands of BG1. In BG3 mode it obtains 23–26-dB gain and 6.9–7.7-dB NF. The front-end consumes 48.1 and 42.7 mA from a 1.2-V supply voltage in BG1 and BG3 operation modes, respectively. The chip was implemented in a 0.13-μm CMOS.     

A self-duty-cycled 7.2–8.5 GHz IR-UWB receiver for low power and low data rate applications

A self-duty-cycled non-coherent impulse radio-ultra wideband receiver targeted at low-power and low-data-rate applications is presented. The receiver is implemented in a 130 nm CMOS technology and works in the 7.2–8.5 GHz UWB band, which covers the IEEE 802.15.4a and 802.15.6 mandatories high-band channels. The receiver architecture is based on a non-coherent RF front-end (high gain LNA and pulse detector) followed by a synchronizer block (clock and data recovery or CDR function and window generation block), which enables to shut down the power-hungry LNA between pulses to strongly reduce the receiver power consumption. The main functions of the receiver, i.e. the RF front-end and the CDR block, were measured stand-alone. A maximum gain of 40 dB at 7.2 GHz is measured for the LNA. The RF front-end achieves a very low turn-on time (<1 ns) and an average sensitivity of ?92 dBm for a 10^?3 BER at a 1 Mbps data rate. A root-mean-square (RMS) jitter of 7.9 ns is measured for the CDR for a power consumption of 54 µW. Simulation results of the fully integrated self-duty-cycled 7.2–8.5 GHz IR-UWB receiver (that includes the measured main functions) confirm the expected performances. The synchronizer block consumes only 125 µW and the power consumption of the whole receiver is 1.8 mW for a 3% power duty-cycle (on-window of 30 ns).     

An approach to ultrawideband pulse generation and distribution over optical fiber

We propose a novel approach to generating and distributing ultrawideband (UWB) pulse signals over optical fiber. The proposed system consists of a single-wavelength laser source, an electrooptic phase modulator (EOPM), a length of single-mode fiber (SMF), and a photodetector (PD). The combination of the EOPM, the SMF link, and the PD forms an all-optical microwave bandpass filter, which is used to generate a UWB signal with a spectrum meeting the regulation of the Federal Communication Commission. Gaussian doublet pulses are obtained at the receiver front-end, which can provide several gigahertz bandwidths for applications in high-bit-rate UWB wireless communications. Experimental results measured in both temporal and frequency domains are presented.     

Dual-Antenna RF CMOS Front-End for Interferer Removal in Ultra-Wideband Systems

Many ultra-wideband (UWB) systems are challenged by strong jammers and narrowband interferers. Using two antennas, we demonstrate a robust UWB radio frequency (RF) front-end design in a 0.25 μm mixed-signal complementary metal oxide semiconductor (CMOS) technology. The proposed realization is capable of adaptively removing a high-power, narrowband interferer early in the receiver chain avoiding front-end saturation and preserving UWB signal power. The early interferer removal resulting in interferer-free demodulation is based on the least mean squares (LMS) algorithm and achieved through a novel combiner low-noise amplifier and noise optimized filtering. Circuit level RF simulations of the proposed circuitry indicate a maximum improvement in signal-to-interference ratio of 39.6 dB.     

提高接收机无虚假响应动态范围的研究

复杂的电磁环境要求侦察接收机同时具有高的灵敏度和高的动态范围,侦察接收机中的虚假响应制约着接收机动态范围的提高。侦察接收机中的射频模拟前端由放大器、滤波器及混频器等多级模块构成,其产生的虚假响应是实现大动态接收机的技术瓶颈之一。工程上要有效提高接收系统的无虚假响应动态范围,需要针对接收机射频模拟前端采取优化系统设计、采用高性能器件、提高线性度等很多措施。     

CMOS超宽带低噪声放大器的设计

由于超宽带技术能够在短距离内传输几百兆的数据,帮助人们摆脱对导线的依赖,因此使得大带宽数据的无线传输从几乎不可能变为现实。尽管目前超宽带技术的标准还没有统一,但是低噪声放大器终归是其接收机中一个不可或缺的重要模块。文章介绍了一种基于0.18μmCMOS工艺、适用于超宽带无线通信系统接收前端的低噪声放大器。结合计算机辅助设计,该超宽带低噪声放大器输入、输出均实现良好的阻抗匹配,在3GHz～10GHz的频带范围内实现了增益G=29±1dB,噪声系数小于4dB。在1.8V工作电压下放大器的直流功耗约为35mW。     

Equivalent system model and equalization of differential impulse radio UWB systems

A discrete-time equivalent system model is derived for differential and transmitted reference (TR) ultra-wideband (UWB) impulse radio (IR) systems, operating under heavy intersymbol-interference (ISI) caused by multipath propagation. In the systems discussed, data is transmitted using differential modulation on a frame-level, i.e., among UWB pulses. Multiple pulses (frames) are used to convey a single bit. Time hopping and amplitude codes are applied for multi user communications, employing a receiver front-end that consists of a bank of pulse-pair correlators. It is shown that these UWB systems are accurately modeled by second-order discrete-time Volterra systems. This proposed nonlinear equivalent system model is the basis for developing optimal and suboptimal receivers for differential UWB communications systems under ISI. As an example, we describe a maximum likelihood sequence detector with decision feedback, to be applied at the output of the receiver front-end sampled at symbol rate, and an adaptive inverse modeling equalizer. Both methods significantly increase the robustness in presence of multipath interference at tractable complexity.     

一种带有改进的25%占空比本振产生电路的WCDMA/GSM高线性度接收机射频前端分析与设计

本文提出了一种满足WCDMA/GSM系统要求的全集成接收机射频前端。WCDMA模式下无需声表面波滤波器。为了提高包括IP3和IP2指标在内的线性度性能,射频前端包括电容减敏的多栅低噪声放大器、带有本文提出的IP2校准电路的电流模式无源混频器以及似Tow-Thomas结构的双二阶可重构跨阻放大器。本文提出了一种新的低功耗、低相噪、可产生四相25%占空比本振信号的多模分频器。同时,本文通过采用带有片上电阻的恒定gm偏置电路,减小工艺和温度对转换增益的影响。本文中的射频前端电路集成在一个0.13um CMOS工艺下实现的带有片上频率综合器的接收机中。测试结果显示,在这个高线性度射频前端的帮助下,对于所有的模式和频带,接收机可以获得-6dBm的IIP3和至少 60dBm的IIP2。     

A Transceiver Front-End for Ultra-Wide-Band Applications

An integrated pulse based ultra-wide-band (UWB) transceiver front-end is presented in this paper. The pulse generator produces Gaussian modulated pulses satisfying Federal Communication Commission spectral mask with possibility for binary-phase shift keying modulation. The generated pulses have a bandwidth of 2 GHz from 3.1 to 5.1 GHz. The receiver front-end consists of an UWB low-noise amplifier (LNA). The transmit and receive paths are chosen by a transmit/receive (T/R) switch. The pulse generator, T/R switch and the LNA are integrated on a single chip and fabricated using 0.25-mum SiGe:C BiCMOS technology. The integrated circuit components are designed fully differential. The off-chip antenna and bandpass filter are single ended and connected to the T/R switch through a hybrid coupler     

A Low-Cost and Low-Power CMOS Receiver Front-End for MB-OFDM Ultra-Wideband Systems

This paper presents an RF receiver front-end for MB-OFDM-based ultra-wideband (UWB) systems. The receiver occupies only 0.35 mm² in a 0.18 mum CMOS process and consists of a low-noise amplifier, downconverter and a bandpass filter. There are no on-chip inductors and the receiver requires no off-chip matching components. The measured receiver gain is 21 dB, noise figure is less than 6.6 dB, input IIP₃ is -5.6 dBm, and the receiver consumes 19.5 mA from a 2.3 V supply. The receiver covers all the MB-OFDM bands from 3.1 to 8 GHz     

Design and measurements of a RF front-end for Bi-band simultaneous reception

In this paper, we explore spectrum field band simultaneous receivers, with a special emphasis on only one aspect of these systems – the radio front-end. We propose, to validate in the lab, a receiver scheme for the simultaneous down-conversion of two signals in different bands. Obviously, the dedicated scheme is intended for practical use in an integrated circuit. In this work, the chosen receiver is implemented with discrete components. A test set is evaluated and compared to simulations; it contains mostly standard lab equipment, processing signals, according to the receiver scheme; this receiver presents merits and it is worth demonstrating in an integrated circuit.In order to give credit to the use of this type of receiver, the EDA model and results have to be validated by measurement. Therefore, based on the receiver architecture dedicated to an 802.11/UMTS simultaneous dual-channel processing, we design and fabricate a prototype. Firstly, we measure the intrinsic metrics of this prototype in terms of noise figure, gain, linearity, phase and gain mismatch between the two branches of the quadrature mounted mixers. In the present work, we demonstrate that, for instance, as NF and IIP3 change with the RF front-end gain with the improvement of the RF front-end performance, the linearity and the noise requirements are well handled. Afterwards, these metrics are injected in the EDA receiver model and simulations are done in order to evaluate the BER evolution.     

A 5 GHz 7.2 dB NF low power direct conversion receiver front-end with balun LNA

A 5GHz low power direct conversion receiver radio frequency front-end with balun LNA is presented. A hybrid common gate and common source structure balun LNA is adopted,and the capacitive cross-coupling technique is used to reduce the noise contribution of the common source transistor.To obtain low l/f noise and high linearity,a current mode passive mixer is preferred and realized.A current mode switching scheme can switch between high and low gain modes,and meanwhile it can not only perform good linearity but save power consumption at low gain mode.The front-end chip is manufactured on a 0.13-μm CMOS process and occupies an active chip area of 1.2 mm~2.It achieves 35 dB conversion gain across 4.9-5.1 GHz,a noise figure of 7.2 dB and an IIP3 of -16.8 dBm,while consuming 28.4 mA from a 1.2 V power supply at high gain mode.Its conversion gain is 13 dB with an IIP3 of 5.2 dBm and consumes 21.5 mA at low gain mode.     

超高频射频识别阅读器的高线性低噪声前端

根据超高频段射频识别的协议要求、结合论文所提出的正交直接变频无线收发机架构,对阅读器接收路径所需的系统噪声系数、输入线性度要求做出分析。给出了同时具有低噪声系数、高线性度特点的三级紧凑式射频前端,该电路能够承受标签背散射机制所引起的大信号带内自阻塞干扰。电路采用IBM 0.18μm CMOS 7RF工艺制作,当从3.3V的电源电压上抽取6.9mA电流时,该射频前端可以获得13dBm的输入线性度与23 dB的最大噪声系数。     

A low power 3-5 GHz CMOS UWB receiver front-end

A novel low power RF receiver front-end for 3-5 GHz UWB is presented. Designed in the 0.13μm CMOS process, the direct conversion receiver features a wideband balun-coupled noise cancelling transconductance input stage, followed by quadrature passive mixers and transimpedance loading amplifiers. Measurement results show that the receiver achieves an input return loss below-8.5 dB across the 3.1-4.7 GHz frequency range, max-imum voltage conversion gain of 27 dB, minimum noise figure of 4 dB, IIP3 of-11.5 dBm, and IIP2 of 33 dBm. Working under 1.2 V supply voltage, the receiver consumes total current of 18 mA including 10 mA by on-chip quadrature LO signal generation and buffer circuits. The chip area with pads is 1.1 × 1.5 mm2.     

高速超宽带并行检测接收机的设计

在介绍一种基于TH-PPM调制方式的超宽带通信系统的基础上,深入讨论了一种并行检测接收机方案并分析了其工作原理.结合实测数据验证了此接收机方案能在高传输速率的情况下取得较好的超宽带信号接收效果.     

Optical receiver for VHF multichannel video transmission

Optical receivers for multichannel TV transmission in the VHF band are analyzed and tested from the viewpoints of linearity, sensitivity, and frequency response. Photodiodes and avalanche photodiodes are compared for use as a front-end detector. Optimization of the preamplifiers is studied in terms of both configurations and biasing conditions. Improvement of frequency characteristics, using a Percival coil, is also investigated. It is concluded that a receiver using a photodiode can attain as high a sensitivity as and a greater linearity (around 5 dB) than one using an avalanche photodiode     

Heuristic receiver for implantable UWB applications

High data rate implantable wireless systems come with many challenges, chief among them being low power operation and high linearity. A low noise amplifier (LNA) designed for this application must include high gain, low noise figure (NF) and better linearity at low power consumption within the required frequency band. The down converter also requires a passive mixer to achieve low power and better linearity. In this paper, design is based on an Impulse Response (IR) Ultra-wideband (UWB) receiver operating at (3.1–5) GHz implemented in 0.25 μm CMOS Silicon on Sapphire (SOS). This paper reports the design and measurement of a UWB receiver with a designed and measured linearity of 17 dBm, a gain of 30.5 dB and a minimum NF of 4.5 dB, which make it suitable for implantable radio applications.     

Antenna Link Transfer Function Factorization Applied to Optimized Channel Design

A channel broadband factored model is developed and numerically verified with a method of moment (MoM) technique for design of optimized UWB links with real, dispersive antennas. In this study, two-antenna link transfer functions are decomposed into port-load and full-wave dependent components based on general linearity and reciprocity in electromagnetics. Specifically, the port-related components account for antenna termination to the transmitter generator and front-end receiver circuits as antenna loads. In turn, the wave portion, which is associated with link transmission impedance, involves all geometrical factors like antenna shapes and their positioning/pointing in space that account collectively for radiation, propagation and reception. As a result, any link of fixed geometry can be full-wave numerically simulated just once for a suitable set of reference generator/load impedances. Then, all variations in link performance caused by variable port terminations are easily predicted by manipulating the full-wave data obtained for the case of reference antenna port loads. This approach provides some useful physical insights and an optimized co-design procedure for transmitter and receiver impedances to meet several significant performance-related design objectives, such as: i) maximized link energy transmission efficiency; ii) maximum amplitude of received signals; iii) minimized time confinement for signal energy at receiver loads; iv) flatness of magnitude of link transfer functions; and v) minimized group delay deviation. The major results are numerically illustrated for a number of useful far-field line-of-sight link cases with flat and solid dipole antennas operating in up to 3:1 bands and ideally aligned in terms of their gain and polarization matching. Numerical results are given in a normalized form and scalable to any band of interest.     

A dual-band RF front-end for WCDMA and GSM applications

An RF front-end for dual-band dual-mode operation is presented. The front-end consumes 22.5 mW from a 1.8-V supply and is designed to be used in a direct-conversion WCDMA and GSM receiver. The front-end has been fabricated in a 0.35-μm BiCMOS process and, in both modes, can use the same devices in the signal path except the LNA input transistors. The front-end has a 27-dB gain control range, which is divided between the LNA and quadrature mixers. The measured double-sideband noise figure and voltage gain are 2.3 dB, 39.5 dB, for the GSM and 4.3 dB, 33 dB for the WCDMA, respectively. The linearity parameters IIP3 and IIP2 are -19 dBm, +35 dBm for the GSM and -14.5 dBm and +34 dBm for the WCDMA, respectively