A novel, bias-dependent, small-signal model of the dual-gate MESFET

A dual-gate MESFET from NEC (NE25000) has been measured and modeled. S-parameters and drain-to-source currents calculated from the model are in good agreement with measured data. The model consists of a cascode of two intrinsic, single-gate, nonlinear FET-models embedded in a network representing the device parasitics. A step-by-step procedure has been used to determine the 47 parameters of the model. DC-measurements were used to find starting values for some of the parameters of the nonlinear models. The parasitic capacitances were determined from three-port S-parameters measured at V_DS=0 V, I_DS=0 A and V(G₁S)=V(G₂S)=-4.0V. The parasitic inductances and resistances were determined from S-parameters measured at the same bias-point but with forward-biased gates, and from DC-measurements. The final model-optimization was done by simultaneously fitting the model to drain-to-source currents and three-port S-parameters measured at several different, active bias-points (V_DS >0)     

A new extraction method to determine bias-dependent source seriesresistance in GaAs FET's

A new method is proposed to determine bias-dependent source resistances for GaAs field-effect transistors (FET's). This method, which is a cold-FET measurement technique, utilizes the relations between the real part of the two-port impedances transformed from the measured S-parameters and their algebraic derivatives. It is based on the fact that the algebraic derivatives of the two-port resistances result in the simple form at the normal cold-FET condition. A bias-independent gate resistance is extracted at the pinched-off cold-FET condition to fulfill necessary and sufficient conditions in extraction. The proposed method is a direct measurement because only algebraic calculation is required, and it is general enough to need only one assumption of the laterally symmetric channel-doping profile. The deleterious results of dispersion (frequency dependence) and negative value in source resistances at the pinched-off cold-FET condition are explained by the effects of the leakage current and the on-wafer pad parasitics, respectively. The problem of deviation of α₂₁ and α₁₂ from 0.5 at the normal cold-FET condition is also resolved by deembedding the on-wafer pad parasitics. This method allows one to extract bias-dependent source resistances for GaAs FET's     

New method for measuring transfer impedance and transfer admittanceof shields using a triaxial cell

Two performance parameters of a cable or connector shield are its surface transfer impedance Z_T and its surface transfer admittance Y_T. A new method for measuring these properties is presented. The use of two different terminations for the cable or conductor under test (CUT) allows one to determine both Z_T and Y_T. Through characterization of the inner and outer transmission lines of the triaxial cell, using time domain reflectrometry, Z_T and Y_T can be determined in amplitude as well as in phase. The phase is obtained by de-embedding the measured S-parameters up to the CUT. The de-embedding of the measurements also allows one to extend the frequency range up to 3 GHz. To illustrate this method a solid shield with a circular aperture and a coaxial cable with a braided shield have been measured and compared, respectively, with theoretical predictions and published results     

Accurate small-signal modeling of HFET's for millimeter-waveapplications

In this paper we discuss the small-signal modeling of HFET's at millimeter-wave frequencies. A new and iterative method is used to extract the parasitic components. This method allows calculation of a π-network to model the heterojunction field-effect transistor (HFET) pads, thus extending the validity of the model to higher frequencies. Formulas are derived to translate this π-network into a transmission line. A new and general cold field-effect transistor (FET) equivalent circuit, including a Schottky series resistance, is used to extract the parasitic resistances and inductances. Finally, a new and compact set of analytical equations for calculation of the intrinsic parameters is presented. The real part of Y₁₂ is accounted for in these equations and its modeling is discussed. The accounting of Re(Y₁₂ ) improves the S-parameter modeling. Model parameters are extracted for an InAlAs/InGaAs/InP HFET from measured S-parameters up to 50 GHz, and the validity of the model is evaluated by comparison with measured data at 75-110 GHz     

Direct parameter-extraction method for HBT small-signal model

An accurate and broadband method for the direct extraction of heterojunction bipolar transistor (HBT) small-signal model parameters is presented in this paper. This method differs from previous ones by extracting the equivalent-circuit parameters without using special test structures or global numerical optimization techniques. The main advantage of this method is that a unique and physically meaningful set of intrinsic parameters is extracted from the measured S-parameters for the whole frequency range of operation. The extraction procedure uses a set of closed-form expressions derived without any approximation. An equivalent circuit for the HBT under a forward-bias condition is proposed for extraction of access resistances and parasitic inductances. An experimental validation on a GaInP/GaAs HBT device with a 2×25 μm emitter was carried out, and excellent results were obtained up to 30 GHz. The calculated data-fitting residual error for three different bias points over 1-30 GHz was less then 2%     

Efficient detection of resonances in anechoic chambers using thematrix pencil method

In a previous paper we have presented a method for evaluating the performance of anechoic chambers by analyzing the S-parameters of a system comprising two antennas facing each other in an anechoic chamber using the matrix pencil method. In this work, we present an improvement of this resonance detection technique using only the transmission parameter S₂₁. The propagating components of the transmission parameter S₂₁ are derived over small frequency intervals using the matrix pencil method and then removed from S₂₁ in a two-level decomposition procedure. The resonances are clearly identified from the residual signal. Two examples of resonance detection in two different anechoic chambers illustrate the proposed method     

A new pinched-off cold-FET method to determine parasiticcapacitances of FET equivalent circuits

A new pinched-off cold FET method to extract the parasitic capacitances of FETs is proposed in this paper. The method is based on a physically meaningful depletion-layer model and the theoretical analysis of the two-port network for the pinched-off cold FETs. The parasitic gate capacitance (C_pg) and the parasitic drain capacitance (C _pd) of FETs are extracted using the linear regression technique associated with the frequency responses of Y-parameters. The extraction method can be applied to the small-signal equivalent-circuit modeling of the FETs including MESFETs, heterojunction FETs, and high-electron-mobility transistors. According to the new analytical method, the simulated S-parameters exhibit great agreement with the measured S-parameters for the equivalent-circuit models of FETs     

Accurate RF extraction method for resistances and inductances of sub-0.1 /spl mu/m CMOS transistors

An accurate RF method using a linear regression of high-frequency Z-parameter equations at zero gate voltage is developed to extract resistances and inductances of sub-0.1 /spl mu/m MOSFETs. Good agreement between the measured and modelled S-parameters is observed up to 30 GHz, verifying the accuracy of the RF method.     

A new parameter extraction technique for small-signal equivalentcircuit of polysilicon emitter bipolar transistors

We propose a new parameter extraction method for advanced polysilicon emitter bipolar transistors. This method is based on the predetermination of equivalent circuit parameters using the analytical expressions of de-embedded Z-parameters of these devices. These parameter values are used as initial values for the parameter extraction process using optimization. The entire device equivalent circuit, containing RF probe pad and interconnection circuit parameters extracted by test structures, is optimized to fit measured S-parameters for eliminating de-embedding errors due to the imperfection of pad and interconnection test structures. The equivalent circuit determined by this method shows excellent agreement with the measured S-parameters from 0.1 to 26.5 GHz     

太赫兹平面肖特基二极管参数模型

根据太赫兹平面肖特基二极管物理结构,在理想二极管SPICE参数模型的基础上建立了二极管小信号等效电路模型。依据该二极管等效电路模型设计了基于共面波导（CPW）去嵌方法的二极管S参数在片测试结构,并对其在0.1~50 GHz、75~110 GHz频率范围内进行了高频小信号测试,利用测试结果提取了高频下二极管电路模型中各部分电容、电阻以及电感参数。将相应的高频下电容与电阻参数分别与低频经验公式电容值和直流I-V测试提取的电阻值进行了对比,并利用仿真手段对高频参数模型进行了验证。完整的参数模型以及测试手段相较于理想二极管SPICE模型和传统的参数提取方法可以更为准确地表征器件在高频下的工作状态。该建模思路可用于太赫兹频段非线性电路的优化设计。     

A new method to determine the source resistance of FET frommeasured S-parameters under active-bias conditions

A new method is proposed to evaluate the source resistance R_S directly from the S-parameters of a field-effect transistor biased in the active region. The method is based on the fact that the real part of the feedback admittance is mainly caused by the source and the gate resistance. This enables the analytical calculation of R_S at any measured frequency with high accuracy. Taking the ratio of R_G with regard to R_S as the only optimizing parameter, it is possible to calculate quickly an equivalent circuit the elements of which do not depend on starting values. The equivalent circuit fits the measured S-parameters very well and allows a physical interpretation of the calculated elements. By application of the new method in accordance with theoretical considerations one can observe for the first time from RF-measurements a bias-dependence of the source resistance that has been assumed to be constant up to now     

Comparison of radio-frequency and microwave superconductingproperties of YBaCuO dedicated to magnetic resonance imaging

Properties of YBaCuO thin films are evaluated in two distinct frequency ranges using different patterns made during the same process on LaAlO₃ substrate. Microwave superconducting properties in the range 1-45 GHz are determined by S-parameters measurement of a superconducting coplanar waveguide in the range 53-95 K. We obtain a surface resistance of 0.4 mΩ at 10.8 GHz and 77 K. Radio-frequency properties are obtained by measuring the Q-factor of a superconducting resonator (YBCO multiturn transmission lines separated by a sapphire sheet) dedicated to surface magnetic resonance imaging. At 52 MHz and 77 K we measure a Q-factor of 33180. The extraction of the radio-frequency surface resistance from Q-factor measurements in the 64-95 K range takes into account external loss mechanisms and nonuniform normal current distribution and leads to a 0.0093-μΩ surface resistance at 52 MHz and 77 K, in good agreement with the value extrapolated from microwave measurements assuming an ω² frequency dependence. The evaluation of λ₀ is carried out by using several models for X_L(t). Least squares fits to data in the microwave and radio-frequency domain are performed using the Gorter-Casimir expression for X_L(t) and give the same λ₀ value for both devices     

New method to determine intrinsic and extrinsic base-collectorcapacitances of HBT's using the Miller effect

A new method to determine intrinsic and extrinsic base-collector capacitances of HBT's using the Miller effect is presented. The measured S-parameters of an HBT are calibrated and transformed into the ABCD-parameters. The fictitious input and output resistances are added to the HBT and total ABCD-parameters are calculated. The added output resistance degrades the frequency response of the overall network due to the Miller effect, which is used to extract intrinsic and extrinsic base-collector capacitances. The advantage of this method is that it does not require any special test structure     

Analog/RF Performance of Multichannel SOI MOSFET

In this paper, for the first time, we present a detailed RF experimental and simulation study of a 3-D multichannel SOI MOSFET (MCFET). Being different from the conventional planar technology, the MCFET features a total of three self-aligned TiN/HfO₂ gate stacks fabricated on top of each other, allowing current to flow through the three undoped ultrathinned silicon bodies (UTBs). In other words, the operation of the MCFET is theoretically based on two UTB double-gate SOIs and a single-gate UTB fully depleted SOI (FDSOI) at the bottom. Using on-wafer S-parameters, the RF/analog figures-of-merit of an MCFET with a gate length of 50 nm are extracted and discussed. Thanks to the enormous transconductance (gm) and very low output conductance, the RF/analog performances of MCFET-voltage gain (A _VI) and early voltage (V _EA) are superior compared with that of the single-gate UTB-FDSOI. However, these advantages diminish in terms of transition frequency (fT), due to the large total input gate capacitances (C _GG). This inspires the introduction of spacer engineering in MCFET, aiming at improving both C _GG and fT. The sensitivity of the spacer length to the RF/analog performances is experimentally analyzed, and the performance optimization is validated using ac simulation. This paper concludes that optimized MCFETs are a serious contender to the mainstream MOSFETs including FinFETs for realizing future low-power analog applications.     

An approach to determining an equivalent circuit for HEMTs

A simple way to determine a small-signal equivalent circuit of High Electron Mobility Transistors (HEMTs) is proposed. Intrinsic elements determined by a conventional analytical parameter transformation technique are described as functions of extrinsic elements. Assuming that the equivalent circuit composed of lumped elements is valid over the whole frequency range of the measurements, the extrinsic elements are iteratively determined using the variance of the intrinsic elements as an optimization criterion. Measurements of S-parameters up to 62.5 GHz at more than 100 different bias points confirmed that the HEMT equivalent circuit is consistent for all bias points     

一个适用于RFIC设计的RF MOSFET源漏电阻可缩放模型

提出了一个可用于0.18 μm CMOS工艺RF-MOSFET的源漏电阻的可缩放模型.采用了一种直接基于S参数测量的方法来准确提取端口的寄生电阻,该模型充分考虑了各种版图尺寸,如沟道长度,沟道宽度和栅极指头数目等参数的可缩放性.此后,该模型通过不同尺寸的共源连接RF MOSFET的测量和仿真的直流、小信号S参数特性比对,曲线达到了较好的吻合,表明我们的模型是精确而且有效的.     

An approach to determine small-signal model parameters for InP-based heterojunction bipolar transistors

A new method for the extraction of the small-signal model parameters of InP-based heterojunction bipolar transistors (HBT) is proposed. The approach is based on the combination of the analytical and optimization technology. The initial values of the parasitic pad capacitances are extracted by using a set of closed-form expressions derived from cutoff mode S-parameters without any test structure, and the intrinsic elements determined by using the analytical method are described as functions of the parasitic elements. An advanced design system is then used to optimize only the parasitic parameters with very small dispersion of initial values. Good agreement is obtained between simulated and measured results for an InP HBT with 5/spl times/5 /spl mu/m/sup 2/ emitter area over a wide range of bias points up to 40 GHz.     

Frequency-Thermal Characterization of On-Chip Transformers With Patterned Ground Shields

Extensive studies on the performance of on-chip CMOS transformers with and without patterned ground shields (PGSs) at different temperatures are carried out in this paper. These transformers are fabricated using 0.18-mum RF CMOS processes and are designed to have either interleaved or center-tapped interleaved geometries, respectively, but with the same inner dimensions, metal track widths, track spacings, and silicon substrate. Based on the two-port S-parameters measured at different temperatures, all performance parameters of these transformers, such as frequency- and temperature-dependent maximum available gain (G_max), minimum noise figure (NF_min), quality factor (Q₁) of the primary or secondary coil, and power loss (P_loss) are characterized and compared. It is found that: 1) the values of the G_max and Q₁ factor usually decrease with the temperature; however, there may be reverse temperature effects on both G _max and Q₁ factor beyond certain frequency; 2) with the same geometric parameters, interleaved transformers exhibit better low-frequency performance than center-tapped interleaved transformers, whereas the center-tapped configurations possess lower values of NF_min at higher frequencies; and 3) with temperature rising, the degradation in performance of the interleaved transformers can be effectively compensated by the implementation of a PGS, while for center-tapped geometry, the shielding effectiveness of PGS on the performance improvement is ineffective     

An Approach for Determining PHEMT Small-Signal Circuit Model Parameters Up to 110GHz

This paper describes a method to determine the small-signal equivalent circuit model elements for Double Heterojunction δ-doped PHEMTs, which combines the analytical approach and empirical optimization procedure. The PAD capacitances are determined by measuring an open structure which consists of only the pads. Intrinsic elements determined by a conventional analytical parameter transformation technique are described as function of extrinsic elements. Variation ranges of extrinsic elements for optimization are obtained by using coldfet method. An excellent fit between measured and simulated S-parameters in the frequency range of 2-110GHz is obtained for 2×100um gate width (number of gate fingers × unit gate width) DH PHEMT.     

InAlAs/InGaAs/InP基PHEMTs小信号建模及低噪声应用

利用改进的小信号模型对采用100nmInAlAs/InGaAs/InP工艺设计实现的PHEMTs器件进行建模, 并设计实现了一款W波段单片低噪声放大器进行信号模型的验证。为了进一步改善信号模型低频S参数拟合差的精度, 该小信号模型考虑了栅源和栅漏二极管微分电阻, 在等效电路拓扑中分别用Rfs和Rfd表示.为了验证模型的可行性, 基于该信号模型研制了W波段低噪声放大器单片.在片测试结果表明:最大小信号增益为14.4dB@92.5GHz, 3dB带宽为25GHz@85-110GHz.而且, 该放大器也表现出了良好的噪声特性, 在88GHz处噪声系数为4.1dB, 相关增益为13.8dB.与同频段其他芯片相比, 该放大器单片具有宽3dB带宽和高的单级增益.