基于介质集成悬置线的W波段功分器设计北大核心CSCD

介质集成悬置线（SISL）具有低损耗、高品质因数的特点，在毫米波电路设计中具有广阔的应用前景。基于上述特点，本文提出了一种采用SISL结构的W波段功分器，主要由十字型谐振器和输入输出耦合线构成。通过对十字型谐振器进行奇偶模分析，得到了谐振频率与谐振器臂长的关系，功分器工作带宽可以通过调整谐振器臂长来设计。论文提出了端口加载高阻抗线结构，用以提高端口与谐振器之间的耦合，便于实际加工。最后给出了功分器的结构参数，并对其进行仿真优化，仿真结果显示，在77-87GHz频段内回波损耗均小于-10dB，插入损耗小于0.5dB,S21与S31完全重合。     

基于槽线的太赫兹同相和反相功分器设计

根据接地共面波导(GCPW)和槽线的结构特点,首先设计并仿真验证了一种由接地共面波导到槽线的功分器;然后根据槽线横截面的电场分布特性,设计了一种GCPW-槽线-GCPW结构的同相功分器和反相功分器。仿真结果表明,同相功分器在175~225 GHz范围内的插入损耗优于4 dB,回波损耗优于9.6 dB;反相功分器在185~215 GHz范围内的插入损耗优于4 dB,回波损耗优于10.5 dB,幅度不平衡度小于0.24 dB,相位不平衡度小于1.3°。相比其他太赫兹功分器,本文设计的功分器在插入损耗和回波损耗相当的情况下,具有更简单、紧凑和易于集成的结构。     

一种新型微带/槽线混合结构的宽带魔T

提出一种新型宽带平面魔T结构,该魔T基于传统的微带混合环的原理设计而成,为扩展工作频带,采用了微带-槽线混合结构,通过将槽线T接头功分器的反相输出特性与微带T接头功分器的同相输出特性相结合,从而实现两输出端口的宽带和/差输出。测量数据表明该魔T结构可实现超过25%的相对工作带宽(输入端口回波损耗低于-10dB),在工作频带(4.3~5.6GHz)内,其传输插损小于1dB,两对隔离端口的隔离度分别为-30dB和-20dB。     

一种新型混合结构X频段宽带功分器

分析了不对称槽线混合结构T型接头的传输特性,设计了一种由不对称槽线混合桥结构组成的X频段宽带功分器,应用于8~10.3 GHz频段。该功分器主要包括微带-槽线过渡结构和不对称槽线混合桥结构,在实现电磁能量耦合传输的同时还具有良好的功率分配性能。电路没有引入专门的相移电路就可实现可调的相移。电路仿真结果表明,在工作频段内,回波损耗优于-15 dB,插入损耗优于-5 dB,隔离度优于-5.8 dB。测试结果与仿真结果基本吻合,证明了设计的有效性。     

多层LCP基板中宽带槽线耦合结构的设计与实现

槽线耦合结构作为多层电路结构中的核心单元,其特性直接决定整个系统性能的优劣。基于三层LCP基板设计了一款Ka波段宽带微带线-槽线-微带线垂直耦合结构,通过接地层的槽线结构实现了异面微带线间信号传输。仿真结果显示,在23～43.62 GHz的通带内,该结构的插入损耗约为-1 dB,回波损耗优于-16 dB。为进一步改善槽线耦合结构的传输特性,创新性地在四层LCP基板底层加载3 mm×1 mm的开路枝节线,在24.45～41.93 GHz频段内插入损耗约为-0.95 dB,回波损耗优于-21 dB。基于LCP多层板技术,制备了槽线耦合结构,测试结果显示,该结构在23.16～40.35 GHz频率范围之内,插入损耗约为-2 dB,回波损耗优于-14 dB。该研究将为多层LCP基板在微波毫米波射频系统集成方面的应用提供实验依据。     

一种新型双频Wilkinson功分器的设计

为了实现功分器工作在任意两个频率的目的,设计了一种新型功分器.基于奇偶模分析方法,利用微波网络理论推导了电路参数的设计公式,通过求解相应的非线性方程组获取了具体电路参数.制作了一个工作频率为1GHz和2.6 GHz的双频Wilkinson功分器.实物测试结果表明,该功分器在两个中心频率的传输衰减小于3.3dB,端口回波损耗大于21 dB,端口隔离度大于28 dB,在中心频率100 MHz的通带范围内都具有良好性能,验证了设计方法的可靠性.     

一种基于微带与槽线过渡结构的超宽带功分器

提出了一种基于微带与槽线过渡结构的超宽带180°型3 dB功分器,采用扇形过渡结构替代传统的圆形过渡结构,拓展了功分器的工作带宽。该功分器仿真和测试结果吻合良好,在3.1~10.6 GHz频带内实现了插入损耗小于1.5 dB,两输出口的幅度误差小于0.8 dB,相位误差小于1°,输入端口反射系数小于-12 dB。     

基于新型可调谐有源电感的微型宽带功分器

采用0.18 μm RF CMOS工艺,设计了一种基于可调谐有源电感的微型宽带Wilkinson功分器,由正跨导放大器、负跨导放大器、构成反馈回路的Cascode电流镜结构与双重外部电压偏置电路构成,新型有源电感基于回转器原理实现。仿真结果表明,中心工作频率为2 GHz时,功分器的插入损耗小于0.15 dB,输入端口与输出端口的回波损耗均大于36 dB,两输出端口间的隔离度大于39 dB。改变外部偏置电压时,中心工作频率可在1.3~3.0 GHz频率范围内调谐。在1.8 V电源电压下,功耗为4.8 mW,版图尺寸为0.3 mm×0.4 mm。     

170 GHz和340 GHz CSMRs滤波器选频网络研究

为了实现倍频器多谐波输出,满足系统多频率需求,同时减少成本,增加系统集成度,引入了改进紧凑型悬置微带谐振单元（Compact Suspended Microstrip Resonators（CSMRs））滤波器,主要研究并实现了170 GHz和340 GHz双频段分别输出。仿真中分别设计170 GHz和340 GHz探针,引入CSMRs低通滤波器增加170 GHz对高频段的隔离,减小波导高度,提高WR.2.8波导截止频率,增加对300 GHz以下频段抑制,为了测试其输出特性和网络损耗,设计170~340 GHz背靠背模块。仿真结果为低通CSMRs滤波器满足在20~180 GHz通带内反射系数小于-18 dB,在266~520 GHz阻带内抑制度大于20 dB,背靠背结构仿真170 GHz与340 GHz频段反射系数均小于-15 dB,端口隔离大于30 dB,表现出良好的选频特性。测试结果表明:在170 GHz端口通带为150~185 GHz,反射系数小于-10 dB,损耗大于1.2 dB;在340 GHz端口,通带为306~355 GHz,反射系数小于-10 dB,损耗2 dB,两端口隔离度大于10 dB,最好60 dB。     

基于电长度可调的可重构功分器设计

根据分支线耦合器的功率合成效率会受输入功率相位差的影响,通过含变容二极管的π型电路将其级联在3dB Wilkinson功分器的后端,实现原功分器的功率再分配。通过调节变容二极管的偏置电压改变π型电路的等效电长度实现相位差,可实现功分器的分配比例可调。在此原理上,基于ADS软件设计了两款工作频率为2.5GHz的可重构功分器,可分别实现分配比例在0~25dB(约1∶1~300∶1)和-15.5~15.5dB(约1∶35~35∶1)范围内连续可调,且其回波损耗和输出端口间隔离度均优于20dB,适用于射频与微波系统中的实时功率分配与合成。     

悬置微带线的过渡设计

设计了一种新型微带-悬置微带线和波导-悬置微带线的过渡结构。此过渡模型工艺简单、尺寸紧凑、加工精度不高,在较宽的频带范围内实现了较好的过渡特性。这种过渡设计可以改善悬置微带电路的应用范围,同其它电路或系统可以更好地综合应用。通过仿真设计和样品测试,在整个Ka频段,波导-悬置微带线过渡结构插入损耗小于0.75 dB。     

基于柔性LCP基板的SIW带通滤波器设计与实现

液晶高分子聚合物(LCP)以其优异的高频特性而被广泛应用于高频无源器件设计以及封装基板制备.文章利用LCP基板设计并实现了一款结构紧凑、中心频率20 GHz、相对带宽为30％、带内损耗小于2 dB的基片集成波导(SIW)带通滤波器.通过在SIW谐振腔短边垂直方向引入微扰金属通孔,实现了谐振腔主模中心频率从16 GHz上...     

一个微波小型化超宽带高功率分配网络

为了实现微波功率分配领域对超宽带和高功率的双重应用需求,本文呈现了一个小型化超宽带高功率的悬置带线四路功率分配网络。它采用了一种超宽带功率分配结构,避免了传统Wilkinson电路带宽限制,并结合了低阻抗集成传输线的高功率容量的特点,具有小型化、超宽带、高功率、低插损的特点。仿真设计结果表明：在2-18GHz频段内,该结构的插入损耗小于0.6dB,回波损耗优于9.5dB（在2.75-18GHz内回波损耗优于15dB）,端口幅度差小于0.1dB,相位差小于1度。     

165-GHz Transceiver in SiGe Technology

Two D-band transceivers, with and without amplifiers and static frequency divider, transmitting simultaneously in the 80-GHz and 160-GHz bands, are fabricated in SiGe HBT technology. The transceivers feature an 80-GHz quadrature Colpitts oscillator with differential outputs at 160 GHz, a double-balanced Gilbert-cell mixer, 170-GHz amplifiers and broadband 70-GHz to 180-GHz vertically stacked transformers for single-ended to differential conversion. For the transceiver with amplifiers and static frequency divider, which marks the highest level of integration above 100 GHz in silicon, the peak differential down-conversion gain is -3 dB for RF inputs at 165 GHz. The single-ended, 165-GHz transmitter output generates -3.5 dBm, while the 82.5-GHz differential output power is +2.5 dBm. This transceiver occupies 840 mum times 1365 mum, is biased from 3.3 V, and consumes 0.9 W. Two stand-alone 5-stage amplifiers, centered at 140 GHz and 170 GHz, were also fabricated showing 17 dB and 15 dB gain at 140 GHz and 170 GHz, respectively. The saturated output power of the amplifiers is +1 dBm at 130 GHz and 0 dBm at 165 GHz. All circuits were characterized over temperature up to 125degC. These results demonstrate for the first time the feasibility of SiGe BiCMOS technology for circuits in the 100-180-GHz range.     

基于微带双脊间隙波导技术的Ka波段六端口网络电路

面向毫米波高精度雷达探测应用,文中提出了一种基于微带双脊间隙波导技术的六端口网络电路。设计了基 于微带双脊间隙波导的功分器和耦合器电路,提出了微带双脊间隙波导至微带线的新型过渡转换结构,并基于简化的六 端口网络原理框图,将所设计的功分器、耦合器以及过渡转换结构进行有机组合,实现了所设计的Ka 波段六端口网络电 路。实验测试结果表明:在所设计的37.5 GHz~ 42.5 GHz 频率范围内,输入端口1 与四个输出端口间的相位差均 在±2.5°以内,输入端口2与四个输出端口间的相位差均在±5°内,工作中心频率处的输入输出间插入损耗约为7.3 dB。 实验与仿真结果吻合较好。     

High-performance filtering power divider based on air-filled substrate integrated waveguide technology

A filtering power divider based on air-filled substrate-integrated waveguide (AFSIW) technology is proposed in this study. The AFSIW structure is used in the proposed filtering power divider for substantially reducing the transmission losses. This structure occupies a large area because of the use of air as a dielectric instead of typical dielectric materials. A filtering power divider provides power division and frequency selectivity simultaneously in a single device. The proposed filtering power divider comprises three AFSIW cavities. The filtering function is achieved using symmetrical inductive posts. The input and output ports of the proposed circuit are realized by directly connecting coaxial lines to the AFSIW cavities. This transition from the coaxial line to the AFSIW cavity eliminates the additional transitions, such as AFSIW-SIW and SIW-conductor-backed coplanar waveguide, applied in existing AFSIW circuits. The proposed power divider with a second-order bandpass filtering response is fabricated and measured at 5.5 GHz. The measurement results show that this circuit has a minimum insertion loss of 1 dB, 3-dB fractional bandwidth of 11.2%, and return loss exceeding 11 dB.     

Integrated Balanced BPSK and QPSK Modulators for the Ka-Band

Microwave integrated circuit (MIC) balanced biphase-shift-keying (BPSK) and quadri-phase-shift-keying (QPSK) modulators have been achieved in the 27-GHz band. The modulators are fabricated using a combination of microstrip lines and slot lines, viz., tow-sided MIC. The diodes used are beam-lean Schottky-barrier diodes. Balanced BPSK modulation is performed by path-switching and mode transformation from the slot line to microstrip lines. The insertion loss is 2.2 dB at a carrier frequency of 27 GHz. The phase error and the amplitude deviation are less than 1° and 0.5 dB, respectively. The QPSK modulator consists of two BPSK modulators, a power divider, and a branch-line hybrid coupler. The configuration of the modulator is the parallel-connected type. The insertion loss is 6.3 dB at a carrier frequency of 27 GHz. The phase error is less than 2°, and the rise time and fall time of the modulated earner are less than 300 ps. The isolation between the carrier input port and the QPSK modulated earner output port is greater than 25 dB. These modulators can be extended to the millimeter-wave band.     

Broad-band GaAs monolithic equalizing amplifiers formultigigabit-per-second optical receivers

The authors discuss the development of ICs (integrated circuits) for a preamplifier, a gain-controllable amplifier, and main amplifiers with and without a three-way divider for multigigabit-per-second optical receivers using a single-ended parallel feedback circuit, two (inductor and capacitor) peaking techniques, and advanced GaAs process technology. An optical front-end circuit consisting of a GaAs preamplifier and an InGaAs p-i-n photodiode achieves a 3-dB bandwidth of 7 GHz and -12-dBm sensitivity at 10 Gb/s. Moreover, a gain-controllable amplifier obtains a maximum gain of 15 dB, a gain dynamic range of 25 dB, and a 3-dB bandwidth of 6.1 GHz by controlling the source bias of the common-source circuit. Gain, 3-dB bandwidth, and output power of the main amplifier with the three-way divider are 17.4 dB, 5.2 GHz, and 5 dBm, respectively. These ICs can be applied to optical receivers transmitting NRZ signals in excess of 7 Gb/s     

A D‐Band Balanced Subharmonically‐Pumped Resistive Mixer Based on 100‐nm mHEMT Technology

A D‐band subharmonically‐pumped resistive mixer has been designed, processed, and experimentally tested. The circuit is based on a 180° power divider structure consisting of a Lange coupler followed by a λ/4 transmission line (at local oscillator (LO) frequency). This monolithic microwave integrated circuit (MMIC) has been realized in coplanar waveguide technology by using an InAlAs/InGaAs‐based metamorphic high electron mobility transistor process with 100‐nm gate length. The MMIC achieves a measured conversion loss between 12.5 dB and 16 dB in the radio frequency bandwidth from 120 GHz to 150 GHz with 4‐dBm LO drive and an intermediate frequency of 100 MHz. The input 1‐dB compression point and IIP3 were simulated to be 2 dBm and 13 dBm, respectively.