Low-Frequency Series-Resistance Analytical Modeling of Three-Dimensional Metal–Insulator–Metal Capacitors

This paper discusses the optimization of series resistance of nonplanar metal-insulator-metal capacitor, i.e., an original 3-D capacitor with a capacitance density of 35 nF/mm², used in very large scale integration. A fully analytical and physically based model of its series resistance versus material and geometrical parameters has been developed, in excellent agreement with both 3-D numerical simulations and experiments. Based on the modeling results, possible design strategies of series-resistance reduction are suggested; showing a reduction of the series resistance by approximately a factor of four, without any degradation of the capacitance density     

A Novel Approach to Modeling Metal–Insulator–Metal Capacitors Over Vias With Significant Electrical Length

In monolithic-microwave integrated-circuit design, a metal-insulator-metal (MIM) capacitor is one of the key passive components. Some commonly used MIM capacitor models are optimized for series capacitor applications. These conventional models, however, face a challenge as a need for a shunt capacitor application arises. This paper is a solution provider, ushering in a new approach to modeling a shunt capacitor of large electrical length over grounding substrate vias. Our model is derived from a set of design equations that allows asymmetric coupled lines in an inhomogeneous medium to be approximated to symmetric coupled lines in a homogeneous medium. Here we gain a theoretical insight into the rationale behind this approximation. The new approach benefits from: 1) a four-port implementation providing two connections to top and bottom plates and 2) a drastic reduction in mathematical complexity without trading off accuracy or compatibility. Circuit and electromagnetic simulations has proven to be in good agreement with measurements of a test structure of electrical length 558deg at 50 GHz     

High-Performance Metal–Insulator–Metal Capacitors Using Amorphous BaSm2Ti4O12 Thin Film

The dielectric properties of the amorphous BaSm₂Ti₄O₁₂ (BSmT) film with various thicknesses were investigated to evaluate its potential use as a metal-insulator-metal (MIM) capacitor. An amorphous 35-nm-thick BSmT film grown at 300 degC exhibited a high capacitance density of 9.9 fF/mum² at 100 kHz and a low leakage current density of 1.790 nA/cm² at 1 V. The quadratic and linear voltage coefficients of capacitance of the film were 599 ppm/V² and -81 ppm/V at 100 kHz, respectively. The temperature coefficient of capacitance of the film was also low about 236 ppm/degC at 100 kHz. These results confirmed the suitability of the amorphous BSmT film as a high-performance MIM capacitor     

Improved High-Temperature Leakage in High-Density MIM Capacitors by Using a TiLaO Dielectric and an Ir Electrode

We have fabricated high-kappa TaN/Ir/TiLaO/TaN metal-insulator-metal capacitors. A low leakage current of 6.6 times 10^-7 A/cm² was obtained at 125degC for 24-fF/mum2 density capacitors. The excellent device performance is due to the combined effects of the high-kappa TiLaO dielectric, a high work-function Ir electrode, and large conduction band offset.     

Work-Function Tuning of TaN by High-Temperature Metal Intermixing Technique for Gate-First CMOS Process

This letter investigates the feasibility of adjusting the work function (WF) of TaN metal gate by intermixing (InM) of ultra-thin TaN/Metal stacks at high temperature. This could be useful for the integration of dual-WF metal gates in a gate-first CMOS process without exposing gate dielectric during metal-etching process. TaN/Tb and TaN/Ir stacks were studied, and it is found that the WF of TaN can be readily modulated through metal InM in TaN/Tb stack after high-temperature treatment$(sim$1000$^circhboxC)$, which simulates the source/drain dopant activation process in a gate-first CMOS process. Factors affecting the InM process will be discussed. Successful transistor threshold voltage adjustment by$sim$300 mV on high-$kappa$$hboxHfTaON/HfO_2$dielectrics has also been demonstrated in TaN/Tb stack using this technique.     

InGaN–GaN MQW Metal–Semiconductor–Metal Photodiodes With Semi-Insulating Mg-Doped GaN Cap Layers

InGaN-GaN multiple-quantum-well metal-semiconductor-metal photodiodes (PDs) with in situ grown 40-nm-thick unactivated semi-insulating Mg-doped GaN cap layer were successfully fabricated. The dark leakage current of this PD was comparably much smaller than that of conventional PD without the semi-insulating layer, because of a thicker and higher potential barrier of semi-insulating cap layer, and also a smaller number of surface states involved. For the PDs with the semi-insulating Mg-doped GaN cap layers, the responsivity at 380nm was 0.372A/W when biasing at 5 V. In short, incorporating a semi-insulating Mg-doped GaN cap layer into the PDs beneficially leads to the suppression of dark current and a corresponding improvement in the ultraviolet-to-visible rejection ratio     

Characteristic Instabilities in HfAlO Metal–Insulator–Metal Capacitors Under Constant-Voltage Stress

Time-dependent characteristic changes of metal-insulator-metal (MIM) capacitors with HfAlO dielectric prepared by atomic-layer deposition under constant-voltage stress (CVS) were studied. It was found that relative dielectric constant , dielectric loss , temperature coefficient of capacitance , and frequency coefficient of capacitance gradually increase during CVS testing, whereas the voltage dependence of capacitance weakens. It was also found that changes in -value, , and during CVS testing linearly depend on changes in . These three linear relationships are basically explained by a dielectric-response model proposed for a ldquoflat-lossrdquo dielectric. That is, the increases in -value, , and are attributed to the dielectric-loss increase caused by voltage stress. Stress-time dependence of the dielectric-loss increase is expressed very well by a power function. That is, the power exponent obtained by a curve fitting linearly increases with stress voltage and decreases with increasing aluminum concentration in the HfAlO dielectric. This result indicates that aluminum addition into the HfAlO dielectric can improve the characteristic stabilities of a MIM capacitor under voltage stress.     

Amorphous-SiCBN-Based Metal–Semiconductor–Metal Photodetector for High-Temperature Applications

A photodetector (PD) with metal-semiconductor-metal (MSM) structure has been developed using an amorphous SiCBN film. The amorphous SiCBN film was deposited on the silicon substrate using reactive RF magnetron sputtering. The optoelectronic performance of the SiCBN MSM devices has been examined through photocurrent measurements. Temperature effect, with respect to photocurrent ratios, has been studied. The detector sensitivity factor, which is determined through the PD current ratio, was greater than five at room temperature. Furthermore, the device showed an excellent current sensitivity factor that is greater than two even at a higher temperature of 200 ^oC . The improved performance of the device at higher temperatures could open avenues for high-temperature PD applications.     

Linearity Improvement of Microwave FM Oscillators by Harmonic Tuning

A new linearizing method for microwave communication FM oscillators is presented. As a linearizing mechanism the frequency perturbation caused by tuned harmonic(s) is utilized. Analytical formulation of linearity requirements for the general case are given and explicit relations are delivered for the second harmonic-tuned FM oscillator. Linearity and noise loading results are shown, obtained with an experimental 250-mW X band Gunn diode FM oscillator and satisfying CCIR linearity and noise loading requirements for broad-band microwave radio links.     

Improvement of a Class-C Transistor Power Amplifier by Second-Harmonic Tuning

Considerations for the effects of second-harmonic reactive terminations on the performances of a UHF class-C transistor power amplifier are presented. An experimental amplifier circuit design using coupled-TEM-bar transmission lines is described. This circuit can vary the fundamental and the second-harmonic impedance terminations of the amplifier independently. With this amplifier circuit, significant improvement in the performance characteristics of a class-C power amplifier were achieved by presenting proper values of second-harmonic reactive terminations, both at the input and the output of the transistor.     

Work Function Tuning and Material Characteristics of Lanthanide-Incorporated Metal Nitride Gate Electrodes for NMOS Device Applications

A versatile method to tune the work function$Phi_M$of metal nitride$(hboxMN_x)$metal gates by incorporating lanthanide elements for the applications in NMOS devices is demonstrated. By incorporating lanthanide elements such as terbium (Tb), erbium (Er), or ytterbium (Yb) into$hboxMN_x$metal gates such as TaN and HfN, the work function of these$hboxMN_x$can be tuned continuously down to 4.2—4.3 eV even after rapid thermal annealing up to 1000$^circhboxC$, owing to the very low$Phi_M$values of lanthanide elements. Material and electrical properties of lanthanide-$hboxMN_x$are investigated, and the results indicate that N concentration is an important parameter for the resistivity, work function, and thermal stability of lanthanide-$hboxMN_x$metal gates. Therefore, it needs to be carefully optimized in the process. In addition, transistor characteristics with$hboxTa_0.9hboxTb_0.1hboxN_y$on$hboxSiO_2$are also demonstrated, and several issues regarding the process integration of these novel materials are discussed.     

Gated Decap: Gate Leakage Control of On-Chip Decoupling Capacitors in Scaled Technologies

To minimize the leakage power dissipation of present-day on-chip Decaps, we propose a gated decoupling capacitor (GDecap) technique that deactivates a Decap when it is not needed. The application of the proposed GDecap technique on an eight-way clock-gated clustered pipeline showed that on average, 41.7% Decap leakage power was reduced, with negligible $ ({sim 0.037}%)$ worst-case performance degradation, at the 70-nm technology node. GDecap design incurred an area overhead of around 5.36% when compared with a conventional Decap design.      

氦诱生微孔对硅二极管漏电流特性的改善

高剂量的氦离子注入并热处理在硅中形成对金属具有高吸杂作用的微孔。以低金属杂质浓度的硅平面二极管的反向漏电流为指标,研究了吸除的热处理过程对微孔吸杂效果的影响。在适当的热处理温度和冷却条件下,观测到二极管反向漏电流的显著改善,部分样品漏电流可降低3个数量级。     

用正交试验法探索铝电解电容器脉冲电压老练工艺

改进老练工艺是降低铝电解电容器漏电流的重要措施。采用脉冲电压老练能提高铝电解电容器阳极氧化膜的修补效率。用正交试验法快速找到脉冲电压老练中的充、放电时间等工艺参数 ,使产品漏电流常数 K降到 0 .3× 10 - 2 ～ 0 .3× 10 - 4 μA/ (V·μF)。     

Improvement of Impact Ionization Effect and Subthreshold Current in InAlAs/InGaAs Metal–Oxide–Semiconductor Metamorphic HEMT With a Liquid-Phase Oxidized InAlAs as Gate Insulator

The oxidation of InAlAs and its application to InAlAs/InGaAs metal-oxide-semiconductor metamorphic high-electron mobility transistors (MOS-MHEMTs) are demonstrated in this study. After the highly selective gate recessing of InGaAs/InAlAs using citric buffer etchant, the gate dielectric is obtained directly by oxidizing the InAlAs layer in a liquid-phase solution at near room temperature. As compared to its counterpart MHEMT, the fabricated InAlAs/InGaAs MOS-MHEMT exhibits a larger tolerance to gate bias, higher breakdown voltage, lower subthreshold current, improved gate leakage current with the effectively suppressed impact ionization effect, and improved radio-frequency performance. Consequently, the liquid-phase oxidation may also be used to produce gate oxides and as an effective passivation on III-V compound semiconductor devices     

$hboxBaSm_2hboxTi_4hboxO_12$Thin Film for High-Performance Metal–Insulator–Metal Capacitors

A high capacitance density of 4.84$hboxfF/muhboxm^2$and a low leakage current density of 4.28 fA/pF$cdot$V were obtained for a 138-nm-thick crystalline$hboxBaSm_2hboxTi_4hboxO_12$(BST) film. The 100-nm-thick amorphous BST film exhibited a high capacitance density of 3.91$hboxfF/muhboxm^2$and a low leakage current of 1.24 fA/pF$cdot$V. The crystalline BST film had quadratic and linear voltage coefficient of capacitance (VCC) of$-hbox295 hboxppm/V^2$and 684 ppm/V, respectively, and a temperature coefficient of capacitance (TCC) of$-hbox136 hboxppm/^circhboxC$at 100 kHz. The amorphous BST film also showed quadratic and linear VCCs of 48.6$hboxppm/V^2$and$-$738 ppm/V, respectively, with a low TCC of 169$hboxppm/^circhboxC$at 100 kHz.     

钝化处理对GaN基LED反向漏电流特性的改善

通过采用硫代乙酰胺(CH3CSNH2)溶液浸泡和沉积SiNx薄膜对干法刻蚀后的GaN基LED进行了处理.处理后,LED器件在-5V直流电压偏置下的漏电流下降到约1/6.X射线光电子能谱(XPS)分析结果表明,CH3CSNH2溶液处理能阻止GaN表面吸附O杂质,起到钝化的作用.沉积SiNx介质薄膜能有效隔绝LED器件和周围的环境.因此,这种两步方法能钝化干法刻蚀后GaN的侧壁,有效地减小LED器件的漏电流.     

Penalty Function Improvement of Waveguide Solution by Finite Elements

The finite element method is a well-established method for the solution of a wide range of guided wave problems. One drawback associated with the powerful vector formulation is the appearance of spurious or nonphysical solutions. A penalty function method has been introduced to the finite element formulation, to reduce or eliminate spurious solutions. It also improves the quality of the physical field solutions. The method has been applied for the solution of metallic homogeneous and inhomogeneous guides, and integrated optics guides.     

Circuit Modeling of Interdigitated Capacitors Fabricated by High‐K LTCC Sheets

The circuit modeling of interdigitated capacitors fabricated by high‐k low‐temperature co‐fired ceramic (LTCC) sheets was investigated. The s‐parameters of each test structure were measured from 50 MHz to 10 GHz, and the modeling was performed using these measured s‐parameters up to the first resonant frequency. Each test structure was divided into appropriate building blocks. The equivalent circuit of each building block was composed based on the partial element equivalent circuit (PEEC) method. Modeling was executed to optimize the parameters in the equivalent circuit of each building block. The validity of the extracted parameters was verified by the predictive modeling for the test structures with different geometry. After that, Monte Carlo analysis and sensitivity analysis were performed based on the extracted parameters. The modeling methodology can allow a device designer to improve the yield and to save time and cost for the design and manufacturing of devices.     

Work Function Tuning Via Interface Dipole by Ultrathin Reaction Layers Using AlTa and AlTaN Alloys

This letter presents a route for tuning the metal gate effective work function via interface dipoles formed using AlTa and AlTaN alloys. It was found that the AlTa alloy has a higher effective work function (4.45 eV) compared to either Al ($sim$4.1 eV) or Ta (4.2 eV) gates on$hboxSiO_2$at 400$^circhboxC$. This increase in effective work function was attributed to interface dipoles formed at the gate electrode and dielectric interface. The origin of this dipole is attributed to a reaction between the AlTa alloy and the dielectric layer. Similar AlTa effective work function tuning was also observed on high-$k$dielectrics. However, since the AlTa alloy is not thermally stable on$hboxSiO_2$, nitrogen was added to stabilize the electrode. The addition of N stabilizes the equivalent oxide thickness while still allowing for work function tuning under high temperatures. AlTaN alloys were deposited by reactive sputtering and resulted in an effective work function of$sim$5.1 eV after a 1000$^circhboxC$anneal, making them suitable for PMOS gate applications.