扇形分裂漏CMOS磁敏传感器集成电路

介绍了扇形分裂漏磁敏传感器集成电路的设计,并由0．6μm CMOS工艺实现。该集成电路以扇形分裂漏磁敏MOS管作为磁敏传感单元,并包含两次工作模式的开关阵列预处理电路、相关二次取样电路(CDS)和数字控制电路。该传感器集成电路实现了测量磁场的功能,并实现了在屏蔽磁场的工作模式下对噪声信号进行校正的功能,有效地消除了磁敏传感器及其信号处理电路的噪声影响。在工作频率为10 kHz时,磁敏传感器的灵敏度为2．62 V/T。     

长基区晶体管的磁敏感效应

当n~+-i-n~+型晶体管的基区宽度大于载流子扩散长度时,在磁场中它的集电极电流具有很高的磁灵敏度.本文从输运基区载流子连续方程式出发导出了载流子在磁场中的分布,从而导出了集电极电流、电流增益α和β随磁场变化的关系式,并建立了磁灵敏度公式.本文将理论同锗长基区滋晶体管的实验曲线和数据进行了比较,其结果表明理论和实验曲线基本相符合.     

半导体磁敏二极管及其应用

<正> 磁敏晶体管是继霍尔元件之后发展起来的一种新型磁电转换器件,它具有磁灵敏度高、响应快、无触点、输出功率大等特点,因此在电磁测量、工业控制及检测技术方面得到广泛应用。     

在SOI硅片上制造磁敏差分电路

阐述基于SOI硅片制造新型P^＋-I-N^＋双注入磁敏差分电路的设计原理和制造工艺。构成新型P^＋-I-N^＋双注入磁敏差分电路的磁敏三极管的复合区采用MEMS中的各向异性腐蚀技术和喷砂工艺进行设置,给出了这种复合区的复合机理。实验结果表明,此种三极管具有磁灵敏度高和可靠性高的特点。因此由这种新型磁敏三极管构成的差分电路还具有温漂小的优点。     

半导体3-D磁敏器件的设计与分析

本文将普通的双极型IC工艺用干磁敏器件的制作中,成功地研制了一种新型三维磁敏晶体管,并在理论和实验上分析讨论了其灵敏度、线性度和失调等问题.用该方法制作的器件对B_x分量的灵敏度S_(xx)较国外文献报道的高一个数量级.     

基于标准CMOS工艺的扇形磁敏晶体管及其模型

提出一种基于0.6μm n阱标准CMOS工艺的扇形分裂漏磁敏晶体管,给出了器件相对灵敏度的数学模型.模型重点在于研究扇形分裂漏磁敏晶体管几何参数对相对灵敏度的影响.通过计算机数值积分计算和实验测试结果修正完善了器件的数学模型.测试结果表明:研制的器件最大相对灵敏度为3.77%/T,扇形结构有利于提高分裂漏磁敏晶体管的相对灵敏度.     

基于标准CMOS工艺的扇形磁敏晶体管及其模型

提出一种基于0.6μm n阱标准CMOS工艺的扇形分裂漏磁敏晶体管，给出了器件相对灵敏度的数学模型．模型重点在于研究扇形分裂漏磁敏晶体管几何参数对相对灵敏度的影响．通过计算机数值积分计算和实验测试结果修正完善了器件的数学模型．测试结果表明：研制的器件最大相对灵敏度为3.77%/T，扇形结构有利于提高分裂漏磁敏晶体管的相对灵敏度．     

基于扇形霍尔板几何修正因子的分裂漏磁敏场效应晶体管相对灵敏度研究

采用保角变换方法推导出扇形霍尔板的几何修正因子,并根据几何修正因子得到扇形分裂漏场效应晶体管相对灵敏度的解析表达式.通过计算机模拟和实验测试结果的验证,进一步完善了扇形磁敏分裂漏场效应管相对灵敏度的数学模型.相比矩形结构磁敏场效应晶体管,扇形磁敏场效应晶体管具有更高的相对灵敏度.测试所获最大灵敏度为3.77%T-1,根据本文模型,最大相对灵敏度应为3.81%T-1.     

基于扇形霍尔板几何修正因子的分裂漏磁敏场效应晶体管相对灵敏度研究

采用保角变换方法推导出扇形霍尔板的几何修正因子,并根据几何修正因子得到扇形分裂漏场效应晶体管相对灵敏度的解析表达式.通过计算机模拟和实验测试结果的验证,进一步完善了扇形磁敏分裂漏场效应管相对灵敏度的数学模型.相比矩形结构磁敏场效应晶体管,扇形磁敏场效应晶体管具有更高的相对灵敏度.测试所获最大灵敏度为3.77%T-1,根据本文模型,最大相对灵敏度应为3.81%T-1.     

CMOS磁敏/光敏兼容传感器集成电路的设计

研制了一种新型的磁敏传感器和光敏象限传感器兼容的集成电路。该传感器采用0.6μm标准CMOS工艺制造,设计并实现了磁敏传感器、光敏象限传感器及其兼容的信号处理电路的单片集成,并采用有源预处理电路和相关二次采样电路进行磁敏和光敏信号的采集和降噪处理,具有较高的磁场灵敏度(0.0361T-1)感光灵敏度(2V/lx.s),实现了在一个芯片上同时传感磁信号和光信号的功能。     

Transmission-Line Properties of a Strip on a Dielectric Sheet on a Plane

The subject is a strip Iine formed of a strip and a parallel ground plane separated by a dielectric sheet (commonly termed "microstrip"). Building on the author's earlier papers all the significant properties are formulated in explicit form for practical applications. This may mean synthesis and/or analysis. Each formula is a close approximation for all shape ratios, obtained by a gradual transition between theoretical forms for the extremes of narrow and wide strips. The effect of thickness is formulated to a second-order approximation. Then the result is subjected to numerical differentiation for simple evaluation of the magnetic-loss power factor from the skin depth. The transition formulas are tested against derived formulas for overlapping narrow and wide ranges of shape. Some of these formulas are restated from the earlier derivations and others are derived herein. The latter include the second-order approximation for a narrow thin strip, and a close approximation for a narrow or wide square cross section in comparison with a circular cross section. Graphs are given for practical purposes, showing the wave resistance and magnetic loss for a wide range of shape and dielectric. For numerical reading, the formulas are suited for programming on a digital pocket calculator.     

Blocking in a system on a chip

With more and larger functions being implemented on a single piece of silicon, true systems on a chip are being created. At the physical level, this integration derives from progress in process technology. But from the circuit designers' viewpoint, tools and methods are less help than they might be. In effect, to construct a system on a chip means more than the integration of millions of transistors. A set of complicated and rapidly evolving technologies and standards for telecommunications, multimedia, and PCs must be mastered, too. Also, the software content of most electronic systems has been growing for several years and now often accounts for a major part of the final product and hence of the design effort. Since a system on a chip is a system, a design methodology for generating such complex ICs will frequently have to address the software as well as hardware needs. Further more, as the size and complexity of chips has grown, so too has the task of verification. Verifying the design of a chip containing a million gates of logic presents a formidable challenge of its own. The complexity of large designs calls for a shift in the design paradigm to one based on reusable, high-level building blocks. Currently, most functional blocks are created by hand and are seldom used again. Reusable blocks, though, are not enough. To deliver on the promise of more productivity and less time to market, designers need reinforcements-a methodology and tools with which to integrate the blocks efficiently, plus standards that support the creation of reusable blocks, their exchange, and their integration     

Mirrors on a chip

The design, development, and performance of the digital micromirror device (DMD), a spatial light modulator for projection displays, are examined. The DMD covers each memory cell of a CMOS static RAM with a movable micromirror. Electrostatic forces contingent on the data in the cell tilt the mirror either on or off, modulating the light incident on its surface. Light reflected from any on-mirrors passes through a projection lens and creates images on a large screen. Light from the remaining off-mirrors is reflected away from the projection lens and trapped. The standard-resolution version of the DMD corresponds to the National Television System Committee (NTSC) or Phase Alternation Line (PAL) standard. It is a chip about 2.3 cm² covered by 442368 movable mirrors, each 16 μm on a side     

Grid on a chip

There's renewed interest in upgrading power grids to make regions more energy efficient. The same may be needed for the grids that distribute power on modern microprocessors.     

Flywheels on a roll

Superconducting bearings promise to reduce friction by up to two orders of magnitude, auguring flywheels in the 10-kWh class. The author discusses the principles of stable magnetic levitation of permanent magnets using superconductors. The author then discusses the application of the principles to bearings using high temperature superconductors. Key design parameters and application to flywheels are also discussed     

Fusion on a Budget

Do you have a few thousand dollars to spare, some basic machining and welding skills, and the ability to follow directions without getting fingerprints inside your equipment? Then you, too, can build a baby fusion reactor, or fusor, in your garage.     

基于智能手机压电基片上微液滴位置分析章

为了降低微流分析成本,该文提出了基于智能手机检测压电基片上目标微液滴方法,并开发出相应的应用软件,通过分析微液滴颜色信息和几何信息定位目标微液滴位置,结合分析时间获取微液滴输运速度。为验证提出方法的正确性,以5 μL黑色墨水溶液微液滴为研究对象,进行压电基片上微液滴识别和位置分析实验。结果表明,该文所提方法和开发的应用软件可识别和定位压电基片上微液滴,在功率为27.5 dBm时,第2~10 s段内微液滴输运速度为0.416 mm/s。     

Analysis of a coupled slotline on a double-layered substratecontaining a magnetized ferrite

Nonreciprocity in the propagation characteristics of the even and odd modes in magnetized-ferrite-loaded double-layered coupled slotlines is studied. The analysis is based on Galerkin's method applied in the Fourier transform domain. Numerical results are presented for various values of structural parameters. As a result, it is found that the waveguide structures studied have sufficient nonreciprocity in propagation constants for isolators and four port circulators