Viterbi译码器的应用及其硬件设计与实现

维特比译码器是人们广泛采用的卷积码的译码器,在IS-95,GSM,3GPP中都有广泛的应用.文中首先简单说明Viterbi译码算法原理,接着分析Viterbi译码算法设计及伪代码实现,根据TD-SCDMA卷积码编码方案,设计了一种采用软判决方式的维特比译码器,并采用合理的归一化方式,保证了计算路径值的过程中不会发生溢出.仿真表明:改进的译码器具有良好的性能.     

1000 BASE-T收发器中的Viterbi译码算法研究

采用4维8状态网格编码和Viterbi译码相结合的方法，理论上可以获得6dB的编码增益，用于补偿采用PAM-5编码所带来的噪声容限损失。文章给出了针对4维8状态网格编码的Viterbi译码算法的译码过程，并就译码深度、量化精度和溢出处理方法对译码器性能的影响进行了算法仿真，确定出适合1000 BASE-T收发器应用的译码器参数。     

Interleaved convolutional coding for the turbulent atmosphericoptical communication channel

The coding gain of a constraint-length-three, rate one-half convolutional code over a long clear-air atmospheric direct-detection optical communication channel using binary pulse-position modulation signalling is directly measured as a function of interleaving delay for both hard- and soft-decision Viterbi decoding. Maximum coding gains theoretically possible for this code with perfect interleaving and physically unrealizable perfect-measurement decoding were about 7 dB under conditions of weak clear-air turbulence, and 11 dB at moderate turbulence levels. The time scale of the fading (memory) of the channel was directly measured to be tens to hundreds of milliseconds, depending on turbulence levels. Interleaving delays of 5 ms between transmission of the first and second channel bits output by the encoder yield coding gains within 1.5 dB of theoretical limits with soft-decision Viterbi decoding. Coding gains of 4-5 dB were observed with only 100 μs of interleaving delay. Soft-decision Viterbi decoding always yielded 1-2 dB more coding gain than hard-decision Viterbi decoding     

一种高速Viterbi译码器的优化设计及Verilog实现

文章设计了一种高速Viterbi译码器，该设计基于卷积码编码及其Viterbi译码原理，完成了Viterhi译码的核心单元算法的优化，并采用Verilog语言编程实现了卷积码编码器和译码器。仿真和综合的结果表明本文设计的译码器速率达50Mbit／s，同时译码器的电路规模也通过算法得到了优化。     

Improved architectures for the add-compare-select operation in longconstraint length Viterbi decoding

While turbo coding techniques have received much recent attention for their extraordinary coding gains, these techniques inherently suffer latency limitations unacceptable in most telephony applications. Long constraint length (LCL) Viterbi decoding (VD) techniques hold promise for significant coding gains at low latencies. This paper presents two novel architectures for the add-compare-select unit of an LCL VD. The derived bit-serial circuits are shown to be more efficient than traditional bit-serial methods with one solution 24% more efficient than traditional approaches and requiring only 1/2 the I/O. Using these techniques, a hardware Viterbi decoder was designed, built, and tested     

Signal editing: A new approach to upgrade concatenated coding communications

Based on the property that correction coding is more sensitive to the number of errors than the number of erased code symbols, results of an analytical investigation to improve the performance of concatenated coding communications are presented. We propose a new tactic, ‘signal editing’, to estimate and erase unreliable data prior to the final outer decoding process. We show that signal editing has a capability to detect and delete individual erroneous digits that has not been achieved by other methods. As a result, system performance can be markedly improved. Specific recommendations for using the procedure are suggested and discussed. We illustrate how signal editing is implemented in the case of a convolutional code with Viterbi decoding. A new concatenated (or hybrid) coding technique is constructed integrating the code with interleaving and signal editing. Performance improvement is evaluated and analysed. In this study, signal editing is derived from the information available in the Viterbi decoding process. Not limited to convolutional code with Viterbi decoding, signal editing can be applied to other linear codes without any restriction.     

Bootstrap trellis decoding

A new hybrid coding scheme is introduced that bears the same relation to Viterbi decoding as bootstrap hybrid decoding [3] bears to sequential decoding. Bounds on the probability of error are developed and evaluated for some examples. In high-rate regions of interest, the computed exponents are more than three times as large as those for Viterbi decoding. Results of simulations are also presented.     

TD-SCDMA中(2,1,9)卷积编码及其VITERBI译码算法的SIMULINK S-FUNCTION实现

文章提出了TD-SCDMA系统中一种(2,1,9)卷积编码及其Viterbi译码的软件实现方案,在Matlab/Simulink平台中应用S-Function实现了(2,1,9)卷积码的Viterbi译码器功能.测试证明,该Viterbi译码器输出的信息比特误码率在低信噪比下仍能达到0.0583.     

Real-Time Minimal-Bit-Error Probability Decoding of Convolutional Codes

A recursive procedure is derived for decoding of rateR = 1/nbinary convolutional codes which minimizes the probability of the individual decoding decisions for each information bit, subject to the constraint that the decoding delay be limited to Δ branches. This new decoding algorithm is similar to, but somewhat more complex than, the Viterbi decoding algorithm. A "real-time," i.e., fixed decoding delay, version of the Viterbi algorithm is also developed and used for comparison to the new algorithm on simulated channels. It is shown that the new algorithm offers advantages over Viterbi decoding in soft-decision applications, such as in the inner coding system for concatenated coding.     

Viterbi译码的FPGA免回溯实现

卷积码在多种通信领域中广泛应用,Viterbi译码是对卷积码的一种最大似然译码算法。随着卷积码约束度的增加,并行维特比译码所需的硬件资源呈指数增长,限制其硬件实现。介绍了一种串行译码结构的FPGA实现方案,在保证性能译码的前提下有效地节省资源。同时提出了充分利用FPGA的RAM存储单元的免回溯Viterbi解码实现算法,减少了译码时延,这种算法在串行和并行译码中都可以应用。     

Performance of chip coding in FFH SSMA systems

This paper proposes chip coding using convolutional codes for fast frequency-hopping spread-spectrum multiple-access (FFH-SSMA) systems. Its performance is evaluated and compared with that of repetition coding which is most commonly used in FFH systems. In our proposal, an information symbol is encoded by a convolutional code of rate 1/n and n chips are transmitted through a frequency hopper. We consider three models when perfect side information (PSI) is available, no side information (NSI) is available, and the ratio threshold test (RTT) is used. The probability density functions (PDFs) of the received signal are derived for asynchronous hopping systems. The performances of convolutional coding with threshold decoding and Viterbi decoding are presented under the constraint of fixed total bandwidth and information bit rate. In comparison with repetition codes, it is found that convolutional codes drastically enhance the system performance. It is identified that Viterbi decoding with RTT offers the most significant performance improvement     

Performance analysis of stack decoding on block coded modulation schemes using tree diagram

The channel encoder adds redundancy in a structured way to provide error control capability. Modulator converts the symbol sequences from the channel encoder into waveforms which are then transmitted over the channel. Usually channel coder and modulator are implemented independently one after the other. But in a band limited channel better coding gains without sacrificing signal power are achieved when coding is combined with modulation. Block Coded Modulation (BCM) is such a scheme that results from the combination of linear block codes and modulation. In this paper we are proposing a stack decoding of rate 2/3 and rate 1/2 BCM schemes using tree structure and performance is compared with the Viterbi decoding that uses trellis representation. Simulation result shows that at reasonable bit error rate stack decoder performance is just 0.2 to 0.5 dB inferior to that of Viterbi decoding. Since stack decoding is a near optimum decoding scheme and whose decoding procedure is adaptable to noise level, we can consider this method in place of Viterbi decoding which is optimum and its decoding complexity grows exponentially with large code lengths.     

Simulation and performance of the pan-European land mobile radiosystem

The introduction of the European Telecommunications Standards Institute/Groupe Special Mobiles (ETSI/GSM) digital land mobile radio system has required the study and application of advanced transmission techniques, necessary to meet the quality objectives in very demanding environments. In particular, the authors consider the performance of the compact-spectrum constant-envelope modulation chosen by ETSI/GSM, together with concatenated block and convolutional coding, Viterbi adaptive equalization, and soft-decision Viterbi decoding to cope with the severe time- and frequency-selective distortions caused by propagation phenomena, properly modeled for computer simulation. Channel coding and adaptive equalization techniques, supported also by frequency hopping and diversity reception, are fundamental to operate the system with the required quality     

A new transform algorithm for Viterbi decoding

Implementation of the Viterbi decoding algorithm has attracted a great deal of interest in many applications, but the excessive hardware/time consumption caused by the dynamic and backtracking decoding procedures make it difficult to design efficient VLSI circuits for practical applications. A transform algorithm for maximum-likelihood decoding is derived from trellis coding and Viterbi decoding processes. Dynamic trellis search operations are paralleled and well formulated into a set of simple matrix operations referred to as the Viterbi transform (VT). Based on the VT, the excessive memory accesses and complicated data transfer scheme demanded by the trellis search are eliminated. Efficient VLSI array implementations of the VT have been developed. Long constraint length codes can be decoded by combining the processors as the building blocks     

卷积码Viterbi译码器的硬件实现

第三代移动通信系统标准中普遍采用卷积码和Turbo码作为信道编码方案.本文首先阐述了维特比译码算法,然后论述了(2,1,3)卷积码编码电路和维特比译码的单片机实现方案.最后把维特比算法与交织方案相结合,统计结果表明纠错性能有较大改善.     

(2,1,7)卷积编码及其维特比译码算法的软件实现

提出了一种（2，1，7）卷积编码及其维特（Viterbi）译码的软件实现方案，在Matlab环境中应用软件技术实现了（2，1，7）卷积码的Viterbi译码器功能。测试证明，该Viterbi译码算法在低信噪比下的误码率仍能达到10^-6。     

Forward error correction applied to intelsat IDR carriers

Forward error correction (FEC) techniques are applied to INTELSAT intermediate data rate (IDR) services to reduce the transmitted power requirements relative to uncoded systems, thereby increasing the satellite transponder capacity. Properly designed FEC systems reduce data errors in the received digital stream with minimal impact to the protocols, operation and equipment involved with the communication system. This paper discusses the overall system impact of the addition of FEC to the IDR service. The appropriateness of the specific application of convolutional encoding combined with Viterbi decoding techniques is discussed. Basic concepts of convolutional encoding and Viterbi decoding are presented in order to provide understanding of the trade-offs involved in the specification of the coding technique for the IDR service. The details of the IDR FEC specification are presented. The implementation of a system based on a VLSI Viterbi decoder device which conforms to the INTELSAT requirements is described.     

Viterbi-based algorithm for side-match vector quantization overnoisy channels

Side-match vector quantization is a finite-state technique for image coding. This research shows that the side-match vector quantization is an error-propagating code and it is similar to a catastrophic convolutional code. Here, we propose a Viterbi-based algorithm to solve this problem. Various noise detection algorithms are integrated into the Viterbi algorithm (to yield the Viterbi-based algorithm) for a much better performance. According to the simulation of a binary symmetric channel with random bit-error rate (BER) 0.1%-0.01%, the Viterbi-based algorithm provides 2.8-9.6 dB and 2.3-8.4 dB gain compared with the conventional side-match vector quantization decoder and the Viterbi decoder, respectively. In addition, the proposed algorithm requires much fewer computations than the Viterbi algorithm     

Viterbi decoding algorithm for convolutional codes with repeat request

Using the Viterbi decoding algorithm with repeat request for convolutional codes is proposed, and the resulting performance is analyzed by random coding and generating function arguments and by simulation. It is shown that the reliability function of the proposed decoding algorithm is asymptotically twice that of the Viterbi decoding algorithm without repeat request, and that in certain practical situations the proposed algorithm can save about 50 percent in constraint length over the ordinary Viterbi algorithm for a given performance.     

High rate concatenated coding systems using bandwidth efficienttrellis inner codes

High-rate concatenated coding systems with bandwidth-efficient trellis inner codes and Reed-Solomon (RS) outer codes are investigated for application in high-speed satellite communication systems. Two concatenated coding schemes are proposed. In one the inner code is decoded with soft-decision Viterbi decoding, and the outer RS code performs error-correction-only decoding (decoding without side information). In the other the inner code is decoded with a modified Viterbi algorithm, which produces reliability information along with the decoded output. In this algorithm, path metrics are used to estimate the entire information sequence, whereas branch metrics are used to provide reliability information on the decoded sequence. This information is used to erase unreliable bits in the decoded output. An errors-and-erasures RS decoder is then used for the outer code. The two schemes have been proposed for high-speed data communication on NASA satellite channels. The rates considered are at least double those used in current NASA systems, and the results indicate that high system reliability can still be achieved