Electrical properties of MOSFET's with N2O-nitridedLPCVD SiO2 gate dielectrics

Electrical properties of MOSFETs with gate dielectrics of low-pressure chemical-vapor-deposited (LPCVD) SiO₂ nitrided in N₂O ambient are compared to those with control thermal gate oxide. N₂O nitridation of CVD oxide, combines the advantages of interfacial oxynitride growth and the defectless nature of CVD oxide. As a result, devices with N₂O-nitrided CVD oxide show considerably enhanced performance (higher effective electron mobility), improved reliability (reduced charge trapping, interface state generation, and transconductance degradation), and better time-dependent dielectric breakdown (TDDB) properties (t_BD ) compared to devices with control thermal oxide     

Electrical and Reliability Characteristics of 12- Å Oxynitride Gate Dielectrics by Different Processing Treatments

Various ultrathin oxynitride gate dielectrics of similar thickness (~1.2 nm) fabricated by a combination of an in situ steam generated and remote plasma nitridation treatment (RPN), an RPN with rapid thermal NO annealing (RPN-NO), and an RPN with rapid thermal O₂ annealing (RPN-O₂) are reported in this paper. The RPN-NO gate dielectric films show superior interface properties including relatively high nitrogen concentration near the poly-Si/oxide interface and smooth interfaces, excellent electrical characteristics in terms of lower leakage current, better electron and hole channel mobility, higher drive current, and significantly improved reliability such as stress-induced leakage current, hot carrier injection, and negative bias temperature instability, compared to other gate dielectrics fabricated by different processes.     

Plasma-charging effects on submicron MOS devices

Plasma-charging damage on gate dielectrics of MOS devices is an important issue because of shrinking dimension, plasma nonuniformity, and effects on high-k gate dielectrics. A comprehensive study of plasma-charging effects on the electrical properties of MOS devices was investigated in this work. Shunt diodes were used to estimate the charging polarity distribution. For high-frequency application, the 1/f noise was found to be a promising index for assessing plasma-charging damage. Gate oxynitride formed by two-step nitridation was demonstrated to have better electrical reliability as compared to the conventional one-step nitridation, especially accompanied by amorphous silicon gate electrode. This improvement could be attributed to the relaxation of interface stress by amorphous silicon gate electrode and the suppression of hydrogen effects by gate oxynitride using two-step nitridation. Plasma-charging damage on Si₃N₄ and Ta₂O₅ gate dielectrics with high dielectric constant was also investigated. For MOS devices with Si₃N₄ film, the leakier characteristic and shorter time to breakdown reveal its inferior reliability. For MOS devices with Ta₂O₅ gate dielectric, the trap-assisted current mechanism makes a thicker physical thickness of Ta₂O₅ film more susceptible to plasma-charging-induced damage. Smaller physical thickness of Ta₂O₅ film in MOS devices is favorable due to the better reliability and comparable plasma-induced electrical degradation     

The Impact of Nitrogen Engineering in Silicon Oxynitride Gate Dielectric on Negative-Bias Temperature Instability of p-MOSFETs: A Study by Ultrafast On-The-Fly $I_{rm DLIN}$ Technique

Degradation of p-MOSFET parameters during negative-bias temperature instability (NBTI) stress is studied for different nitridation conditions of the silicon oxynitride (SiON) gate dielectric, using a recently developed ultrafast on-the-fly I_DLIN technique having 1-mus resolution. It is shown that the degradation magnitude, as well as its time, temperature, and field dependence, is governed by nitrogen (N) density at the Si/SiON interface. The relative contribution of interface trap generation and hole trapping to overall degradation as varying interfacial N density is qualitatively discussed. Plasma oxynitride films having low interfacial N density show interface trap dominated degradation, whereas relative hole trapping contribution increases for thermal oxynitride films having high N density at the Si/SiON interface.     

High field stressing effects on the split N2O grown thingate dielectric by rapid thermal processing

Highly reliable thin oxynitride layers of very good Si-SiO₂ interface endurance were grown on silicon wafers with a split N ₂O cycle (N₂O/O₂/N₂O) employing rapid thermal processing (RTP). Excellent electrical characteristics with reduced positive charge generation, electron trapping and/or interface state generation were achieved under high field stressing compared to pure N₂O dielectric     

Low-pressure rapid thermal chemical vapor deposition of oxynitridegate dielectrics for n-channel and p-channel MOSFETs

The properties of oxynitride gate dielectrics formed using a low-pressure, rapid thermal chemical vapor deposition (RTCVD) process with SiH₄, NH₃, and N₂O as the reactive gases are presented. Material analyses show an increase of uniform nitrogen and interfacial hydrogen content with increasing NH₃/N₂O flow rate ratio. MOS capacitors with both n-type and p-type substrates and both n-channel and p-channel MOSFETs were analyzed electrically. The results show increasing fixed oxide charge and interface state density with increasing nitrogen and hydrogen content in the film. A decrease in peak transconductance and improved high-field transconductance was observed for n-channel MOSFETs. Improved resistance to hot-carrier interface state generation was also observed with increasing nitrogen concentration in the films. The results suggest that an optimal nitrogen concentration of approximately 3 at.% can be considered for further development of this technology     

Electrical properties of composite gate oxides formed by rapidthermal processing

In this study, oxide stacks formed by combinations of rapid thermal chemical vapor deposition and rapid thermal oxidation have been investigated as gate dielectrics. This was achieved by performing various types of in situ rapid thermal oxidations both prior to and after oxide deposition to form composite stacked structures. The oxidation ambient and temperature was varied to study the effect on electrical properties such as mobility, leakage current, charge trapping, breakdown and hot carrier degradation. It was found that pre-oxidation prior to depositing an oxide results in a composite structure that greatly reduces the defect density by mismatching pores and weak spots in each film. The mobility behavior of these films was also found to be improved over as-deposited oxides. Post-deposition oxidation in O₂ and N₂O was also found to improve the mobility characteristics. Additionally, post-annealing in N₂ O was effective in improving the reliability of deposited oxides. These N₂O annealed films had low interface trap densities, improved high field mobility, very low charge trapping characteristics and enhanced resistance to hot carrier induced interface state generation. These improvements are attributed to 1) the presence of nitrogen at the interface and 2) to the reduction of nitrogen and hydrogen concentrations in the bulk of the oxide. The role of atomic oxygen during the post-anneal in N₂O is discussed along with differences in annealing ambients     

Characteristics of polysilicon oxides combining N2Onitridation and CMP processes

This paper present a high-quality polysilicon oxide combining N ₂O nitridation and chemical mechanical polishing (CMP) processes. Experimental results indicate that polyoxide grown on the CMP sample exhibits a lower leakage current, higher dielectric breakdown field, higher electron barrier height, less electron trapping rate, higher charge-to-breakdown (Q_bd), and lower density of trapping charge than those of non-CMP samples. In addition, the CMP process enhances nitrogen incorporation at the interface by the N₂ O nitridation, ultimately improving the polyoxide quality. However, the CMP process smooths the surface of polysilicon and this planar surface reduces the out-diffusion of the phosphorous during thermal oxidation     

Comparison of electrical and reliability characteristics ofdifferent 14 Å oxynitride gate dielectrics

A comparison of RTNO, N₂O and N₂O-ISSG ultrathin oxynitride gate dielectrics fabricated by combining a remote plasma nitridation (RPN) treatment with equal physical oxide thickness of 14 Å is explored. The N₂O-ISSG oxynitride gate dielectric film demonstrates good interface properties, higher mobility and excellent reliability. This film by RPN treatment is thus attractive as the gate dielectric for future ultra-large scale integration (ULSI) devices     

Physical Mechanism and Gate Insulator Material Dependence of Generation and Recovery of Negative-Bias Temperature Instability in p-MOSFETs

Impact of gate dielectric processing [plasma and thermal nitridation, nitrogen total dose, effective oxide thickness (EOT)] on negative-bias temperature instability (NBTI) degradation and recovery is studied. The magnitude, field, and temperature dependence of NBTI is measured using no-delay I_DLIN method and carefully compared to charge-pumping measurements. Plasma (thin and thick EOT) and thermal (thin EOT) oxynitrides show very similar temperature and time dependence of NBTI generation, which is identical to control oxides and is shown to be due to generation of interface traps. NBTI enhancement for oxynitride films is shown to be dependent on nitrogen concentration at the Si-SiO₂ interface and plasma oxynitrides show lower NBTI compared to their thermal counterparts for same total nitrogen dose and EOT. Both fast and slow NBTI recovery components are shown to be due to recovery of generated interface traps. Recovery fraction reduces at lower EOT, while for similar EOT oxynitrides show lower recovery with-respect-to control oxides. NBTI generation and recovery is explained with the framework of reaction-diffusion model.     

Group IVB metal oxides high permittivity gate insulators depositedfrom anhydrous metal nitrates

The electrical performance of column IVB metal oxide thin films deposited from their respective anhydrous metal nitrate precursors show significant differences. Titanium dioxide has a high permittivity, but shows a large positive fixed charge and low inversion layer mobility. The amorphous interfacial layer is compositionally graded and contains a high concentration of Si-Ti bonds. In contrast, ZrO₂ and HfO ₂ form well defined oxynitride interfacial layers and a good interface with silicon with much less fixed charge. The electron inversion layer mobility for an HfO₂/SiO_xN_y /Si stack appears comparable to that of a conventional SiO₂ /Si interface     

MOS characteristics of ultrathin NO-grown oxynitrides

In this paper, we report for the first time, the growth of high quality ultrathin oxynitrides formed by nitridation of SiO₂ in nitric oxide (NO) ambient using in-situ rapid thermal processing (RTP). This process is highly self-limited compared with N₂O oxidation of silicon. A significant improvement in the interface endurance and charge trapping properties, under constant current stress, compared to pure O₂-grown and N₂O-grown oxides is observed. The NO growth process will have a great impact on future CMOS and EEPROM technologies     

Mobility behaviour of n-channel and p-channel MOSFETs withoxynitride gate dielectrics formed by low-pressure rapid thermalchemical vapor deposition

The electric field dependence of electron and hole mobility was investigated in n-channel and p-channel metal-oxide-semiconductor field-effect transistors with oxynitride gate dielectrics formed using low-pressure rapid thermal chemical vapor deposition with SiH₄, N₂O and NH₃ as the reactive gases. The peak electron mobility was observed to decrease with increasing nitrogen and hydrogen concentration whereas the high-field mobility degradation was improved. The hole mobility was observed to decrease for all electric fields. A self-consistent physical explanation for the observed electron and hole mobility behaviour is suggested based on the electrical results. We attribute the observed mobility characteristics mainly to the trapping behaviour of these films     

Furnace nitridation of thermal SiO2 in pureN2O ambient for ULSI MOS applications

Furnace nitridation of thermal SiO₂ in pure N₂ O ambient for MOS gate dielectric application is presented. N₂O-nitrided thermal SiO₂ shows much tighter distribution in time-dependent dielectric breakdown (TDDB) characteristics than thermal oxide. MOSFETs with gate dielectric prepared by this method show improved initial performance and enhanced device reliability compared to those with thermal gate oxide. These improvements are attributed to the incorporation of a small amount of nitrogen (~1.5 at.%) at the Si-SiO₂ interface without introducing H-related species during N₂O nitridation     

SIMS study of silicon oxynitride prepared by oxidation of silicon-rich silicon nitride layer

We proposed a novel process for fabrication silicon oxide–oxynitride–oxide structure for ULSI device applications. By deposition of silicon-rich silicon nitride and then following a thermal oxidation process, a good oxynitride layer was obtained. Secondary ion mass spectroscopy (SIMS) study reveals that the hydrogen content of nitride film at the interface can be reduced by more than 40% when compared to stoichiometric nitride. With this method, high nitrogen content oxynitride and smoother oxynitride/oxide interfaces result in the reduction of the interface charge trapping remarkably.     

MOS characteristics of NH3-nitrided N2O-grownoxides

The technique of NH₃ nitridation of N₂O oxides is proposed and demonstrated for increasing nitrogen concentration in N₂O oxides so as to improve the resistance to boron penetration, without any adverse effects on electrical and reliability properties. Results show that NH₃-nitrided N₂O oxides exhibit excellent electrical (low fixed charge) and reliability (smaller charge trapping and suppressed interface state generation) properties, with an additional advantage of significantly improved resistance to boron generation. This technique may have a great impact on deep-submicrometer dual-gate CMOS technology     

Effects of post-deposition annealing on the electrical propertiesand reliability of ultrathin chemical vapor deposited Ta2O5 films

This paper reports the effects of post-deposition rapid thermal annealing on the electrical characteristics of chemical vapor deposited (CVD) Ta₂O₅ (~10 nm) on NH₃-nitrided polycrystalline silicon (poly-Si) storage electrodes for stacked DRAM applications. Three different post-deposition annealing conditions are compared: a) 800°C rapid thermal O₂ annealing (RTO) for 20 sec followed by rapid thermal N₂ annealing (RTA) for 40 sec, b) 800°C RTO for 60 sec and c) 900°C RTO for 60 see. Results show that an increase in RTO temperature and time decreases leakage current at the cost of capacitance. However, over-reoxidation induces thicker oxynitride formation at the Ta₂O₅/poly-Si interface, resulting in the worst time-dependent dielectric breakdown (TDDB) characteristics     

To optimize electrical properties of the ultrathin (1.6 nm)nitride/oxide gate stacks with bottom oxide materials andpost-deposition treatment

The electrical properties affected by the bottom oxide materials and the post-deposition treatment on the ultrathin (down to 1.6 nm) nitride/oxide (N/O) stacks, prepared by rapid thermal chemical vapor deposition (RTCVD) with two-step NH₃/N₂O post-deposition annealing, for deep submicrometer dual-gate MOSFETs have been studied extensively. N/O stack with NO-grown bottom oxide exhibits fewer flat-band voltage shifts and higher hole and electron mobility, but suffers from worse leakage current than that with conventional O₂-grown bottom oxide. In post-deposition treatment, increasing NH₃ nitridation temperature can effectively reduce the equivalent oxide thickness (EOT) and improve leakage current reduction rate, but can result in worse mobility. Furthermore, the subsequent N₂O annealing eliminates the defects and offers a contrary effect on the N/O stack in comparison with the NH₃ nitridation step     

Characteristics of Self-Aligned Gate-First Ge p- and n-Channel MOSFETs Using CVD HfO2 Gate Dielectric and Si Surface Passivation

The electrical properties of p- and n-MOS devices fabricated on germanium with metal-organic chemical-vapor-deposition HfO₂ as gate dielectric and silicon passivation (SP) as surface treatment are extensively investigated. Surface treatment prior to high-K deposition is critical to achieve small gate leakage currents as well as small equivalent oxide thicknesses. The SP provides improved interface quality compared to the treatment of surface nitridation, particularly for the gate stacks on p-type substrate. Both Ge p- and n-MOSFETs with HfO₂ gate dielectrics are demonstrated with SP. The measured hole mobility is 82% higher than that of the universal SiO₂/Si system at high electric field (~0.6 MV/cm), and about 61% improvement in peak electron mobility of Ge n-channel MOSFET over the CVD HfO₂ /Si system was achieved. Finally, bias temperature-instability (BTI) degradation of Ge MOSFETs is characterized in comparison with the silicon control devices. Less negative BTI degradation is observed in the Ge SP p-MOSFET than the silicon control devices due to the larger valence-band offset, while larger positive BTI degradation in the Ge SP n-MOSFET than the silicon control is characterized probably due to the low-processing temperature during the device fabrication     

Thermal nitridation of Si and SiO2for VLSI

This paper presents an extensive review of our work on thermal nitridation of Si and SiO2. High-quality ultrathin films of silicon nitride and nitrided-oxide (nitroxide) have been thermally grown in ammonia atmosphere in a cold-wall RF-heated reactor and in a lamp-heated system. The growth kinetics and their dependence on processing time and temperature have been studied from very short to long nitridation times. The kinetics of thermal nitridation of SiO2in ammonia ambient have also been studied. In nitroxide, nitrogen-rich layers are formed at the surface and interface at a very early stage of the nitridation. Then the nitridation reaction mainly goes on in the bulk region with the surface and near interface nitrogen content remaining fairly constant. Our results also indicate the formation of an oxygen-rich layer at the interface underneath the nitrogen-rich layer whose thickness increases slowly with nitridation time. The nitride and nitroxide films were analyzed using Auger electron spectroscopy, grazing angle Rutherford backscattering, and etch rate measurements. MIS devices were fabricated using these films as gate insulators and were electrically characterized usingI - V, C - V, time-dependent breakdown, trapping, and dielectric breakdown techniques. Breakdown, conduction, andC-Vmeasurements on metal-insulator semiconductor (MIS) structures fabricated with these films show that very thin thermal silicon nitride and nitroxide films can be used as gate dielectrics for future highly scaled-down VLSI devices. The electrical characterization results also indicate extremely low trapping in the nitride films. The reliability of ultrathin nitride was observed to be far superior to SiO2and nitroxide due to its much less trapping. Studies show that the interface transition from nitride to silicon is almost abrupt and the morphology and roughness of the interface are comparable to the SiO2-Si interfaces.