Dielectric properties in Au/SnO2/n-Si (MOS) structures irradiated under Co-γ rays

The metal-oxide-semiconductor (MOS) structures with insulator layer thickness range of 55-430 Å were stressed with a bias of 0 V during ⁶⁰Co-γ ray source irradiation with the dose rate of 2.12 kGy/h and the total dose range was 0-5×10⁵ Gy. The real part of dielectric constant ε′, dielectric loss ε″, dielectric loss tangent tanδ and the dc conductivity σ_dc were determined from against frequency, applied voltage, dose rate and thickness of insulator layer at room temperature for Au/SnO₂/n-Si (MOS) structures from C-V capacitance and G-V conductance measurements in depletion and weak inversion before and after irradiation. The dielectric properties of MOS structures have been found to be strongly influenced by the presence of dominant radiation-induced defects. The frequency, applied voltage, dose rate and thickness dependence of ε′, ε″, tanδ and σ_dc are studied in the frequency (500 Hz-10 MHz), applied voltage (−10 to 10 V), dose rate (0-500 kGy) and thickness of insulator layer (55-430 Å) range, respectively. In general, dielectric constant ε′, dielectric loss ε″ and dielectric loss tangent are found to decrease with increasing the frequency while σ_dc is increased. Experimental results shows that the interfacial polarization can be more easily occurred at the lower frequency and/or with the number of density of interface states between Si/SnO₂ interfaces, consequently, contribute to the improvement of dielectric properties of Au/SnO₂/n-Si (MOS) structures.     

Dielectric characteristics of gamma irradiated Au/SnO2/n-Si/Au (MOS) capacitor

The dielectric characteristics of gamma irradiated Au/SnO₂/n-Si/Au (MOS) capacitor were studied. The MOS capacitor was irradiated by a ⁶⁰Co gamma radiation source with a dose rate of 0.69 kGy/h. The dielectric parameters such as dielectric constant (ε′), dielectric loss (ε″), loss factor (tan δ) and ac electrical conductivity (σ_ac) were calculated from the capacitance–voltage (C–V) and conductance–voltage (G/ω–V) measurements. It is found that the C and G/ω values decrease with the increasing total dose due to the irradiation-induced defects at the interface. Also, the calculated values of ε′, ε″ and σ_ac are found to decrease with an increased radiation dose. This result indicates that the dielectric characteristics of the MOS capacitor are sensitive to gamma-ray dose.     

Frequency and voltage dependence of negative capacitance in Au/SiO2/n-GaAs structures

The frequency (f) and bias voltage (V) dependence of electrical and dielectric properties of Au/SiO₂/n-GaAs structures have been investigated in the frequency range of 10 kHz–3 MHz at room temperature by considering the presence of series resistance (R_s). The values of R_s, dielectric constant (ε′), dielectric loss (ε″) and dielectric loss tangent (tan δ) of these structures were obtained from capacitance–voltage (C–V) and conductance–voltage (G/ω–V) measurements and these parameters were found to be strong functions of frequency and bias voltage. In the forward bias region, C–V plots show a negative capacitance (NC) behavior, hence ε′–V plots for each frequency value take negative values as well. Such negative values of C correspond to the maximum of the conductance (G/ω). The crosssection of the C–V plots appears as an abnormality when compared to the conventional behavior of ideal Schottky barrier diode (SBD), metal–insulator–semiconductor (MIS) and metal–oxide–semiconductor (MOS) structures. Such behavior of C and ε′ has been explained with the minority-carrier injection and relaxation theory. Experimental results show that the dielectric properties of these structures are quite sensitive to frequency and applied bias voltage especially at low frequencies because of continuous density distribution of interface states and their relaxation time.     

Analysis of electrical characteristics of Au/SiO2/n-Si (MOS) capacitors using the high-low frequency capacitance and conductance methods

The purpose of this paper is to analyze electrical characteristics in Au/SiO₂/n-Si (MOS) capacitors by using the high-low frequency (C_HF-C_LF) capacitance and conductance methods. The capacitance-voltage (C-V) and conductance-voltage (G/ω-V) measurements have been carried out in the frequency range of 1 kHz-10 MHz and bias voltage range of (−12 V) to (12 V) at room temperature. It was found that both C and G/ω of the MOS capacitor were quite sensitive to frequency at relatively low frequencies, and decrease with increasing frequency. The increase in capacitance especially at low frequencies is resulting from the presence of interface states at Si/SiO₂ interface. Therefore, the interfacial states can more easily follow an ac signal at low frequencies, consequently, which contributes to the improvement of electrical properties of MOS capacitor. The interface states density (N_ss) have been determined by taking into account the surface potential as a function of applied bias. The energy density distribution profile of N_ss was obtained from C_HF-C_LF capacitance method and gives a peak at about the mid-gap of Si. In addition, the high frequency (1 MHz) capacitance and conductance values measured under both reverse and forward bias have been corrected for the effect of series resistance (R_s) to obtain the real capacitance of MOS capacitors. The frequency dependent C-V and G/ω-V characteristics confirm that the N_ss and R_s of the MOS capacitors are important parameters that strongly influence the electrical properties of MOS capacitors.     

Temperature and frequency dependent electrical and dielectric properties of Al/SiO2/p-Si (MOS) structure

The electrical and dielectric properties of Al/SiO₂/p-Si (MOS) structures were studied in the frequency range 10 kHz-10 MHz and in the temperature range 295-400 K. The interfacial oxide layer thickness of 320 Å between metal and semiconductor was calculated from the measurement of the oxide capacitance in the strong accumulation region. The frequency and temperature dependence of dielectric constant (ε′), dielectric loss (ε″), dielectric loss tangent (tan δ) and the ac electrical conductivity (σ_ac) are studied for Al/SiO₂/p-Si (MOS) structure. The electrical and dielectric properties of MOS structure were calculated from C-V and G-V measurements. Experimental results show that the ε′ and ε″ are found to decrease with increasing frequency while σ_ac is increased, and ε′, ε″, tan δ and σ_ac increase with increasing temperature. The values of ε′, ε″ and tan δ at 100 kHz were found to be 2.76, 0.17 and 0.06, respectively. The interfacial polarization can be more easily occurred at low frequencies, and the number of interface state density between Si/SiO₂ interface, consequently, contributes to the improvement of dielectric properties of Al/SiO₂/p-Si (MOS) structure. Also, the effects of interface state density (N_ss) and series resistance (R_s) of the sample on C-V characteristics are investigated. It was found that both capacitance C and conductance G were quite sensitive to temperature and frequency at relatively high temperatures and low frequencies, and the N_ss and R_s decreased with increasing temperature. This is behavior attributed to the thermal restructuring and reordering of the interface. The C-V and G/ω-V characteristics confirmed that the N_ss, R_s and thickness of insulator layer (δ) are important parameters that strongly influence both the electrical and dielectric parameters and conductivity in MOS structures.     

On the profile of frequency dependent series resistance and surface states in Au/Bi4Ti3O12/SiO2/n-Si(MFIS) structures

The frequency dependent capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of the metal-ferroelectric-insulator-semiconductor (Au/Bi₄Ti₃O₁₂/SiO₂/n-Si) structures (MFIS) were investigated by considering series resistance (R_s) and surface state effects in the frequency range of 1 kHz-5 MHz. The experimental C-V-f and G/ω-V-f characteristics of MFIS structures show fairly large frequency dispersion especially at low frequencies due to R_s and N_ss. In addition, the high frequency capacitance (C_m) and conductance (G_m/ω) values measured under both reverse and forward bias were corrected for the effect of series resistance to obtain the real capacitance of MFIS structures. The R_s-V plots exhibit anomalous peaks between inversion and depletion regions at each frequency and peak positions shift towards positive bias with increasing frequency. The C⁻²-V plot gives a straight line in wide voltage region, indicating that interface states and inversion layer charge cannot follow the ac signal in the depletion region, but especially in the strong inversion and accumulation region. Also, it has been shown that the surface state density decreases exponentially with increasing frequency. The C-V-f and G/w-V-f characteristics confirm that the interface state density (N_ss) and series resistance (R_s) of the MFIS structures are important parameters that strongly influence the electrical properties of MFIS structures.     

Frequency and voltage dependency of interface states and series resistance in Al/SiO2/p-Si MOS structure

The capacitance–voltage (C–V) and conductance–voltage (G/ω–V) characteristics of Al/SiO₂/p-Si metal-oxide-semiconductor (MOS) Schottky diodes have been measured in the voltage range from ?3 to +3 V and frequency range from 5 KHz to 1 MHz at room temperature. It is found that both C and G/ω of the MOS capacitor are very sensitive to frequency. The fairly large frequency dispersion of C–V and G/ω–V characteristics can be interpreted in terms of the particular distribution of interface states at SiO₂/Si interface and the effect of series resistance. At relatively low frequencies, the interface states can follow an alternating current (AC) signal that contributes to excess capacitance and conductance. This leads to an anomalous peak of C–V curve in the depletion and accumulation regions. In addition, a peak at approximately ?0.2 V appears in the R_s–V profiles at low frequency. The peak values of the capacitance and conductance decrease with increasing frequency. The density distribution profile of interface state density (N_ss) obtained from C_HF–C_LF capacitance measurement also shows a peak in the depletion region.     

Co gamma irradiation effects on electrical characteristics of Al/Y2O3/n-Si/Al capacitors

Al/Y₂O₃/n-Si/Al capacitors were irradiated by using a ⁶⁰Co gamma ray source and a maximum dose up to 8.4 kGy. The effect of an annealing treatment performed at 600 or 900 °C on the yttrium oxide (Y₂O₃) films was investigated by XRD and Raman spectroscopy. High-frequency capacitance-voltage (C-V) and conductance-voltage (G-V) measurements as well as quasi-static measurements of the MOS structures were analysed. The annealing improves the crystalline state of the Y₂O₃ thin film material and decreases the values of the flat-band voltage and of the interface trap level density indicating an improvement of the electrical properties of the interface thin film-substrate. But at this interface, the formation of an yttrium-silicate layer was also evidenced. After gamma irradiation, the values of the flat-band voltage and of the interface trap level density related to the Al/Y₂O₃/n-Si/Al structure increase and especially for the structure made with the materials annealed at 900 °C for 1 h. In that case, the structure is very sensitive to a gamma irradiation dose up to 8.4 kGy.     

Improvement of oxide thickness determination on MOS structures using capacitance–voltage measurements at high frequencies

It is well known that capacitance–voltage (C–V) measurements provide a simple determination of oxide thickness, but with the scaling down of components the classical method is not appropriated any more. We have observed that for two devices with the same oxide thickness and different surfaces, the classical method is accurate for large area but it is not adapted for the small one. We present a new procedure to make an accurate electrical determination of the oxide thickness on metal-oxide-semiconductor (MOS) structures of low dimensions in U.L.S.I. technology. Our method does not require a measurement in strong accumulation. It is based on C–V measurements at frequencies higher than 1 MHz associated to a non-linear optimisation of the experimental and theoretical band bending versus bias voltage curve (Ψ_S=f(V_g)), in the depletion mode. By this way, a corrective factor is estimated with precision in order to make an accurate determination of the oxide thickness value. We show that the frequency associated to the non-linear optimisation of Ψ_S=f(V_g) is function of the MOS device dimensions and is increased when the surface decreases. The experimental results obtained on low-dimension MOS structures and different oxide thickness are precise and in total agreement with those measured by ellipsometry. By using our new procedure the accuracy of oxide thickness determination is improved.     

Controlling the electrical characteristics of Au/n-Si structures by interfacial insulator layer

Admittance (C–V and G/ω–V) measurements of Au/n-Si (metal–semiconductor, MS) and Au/SnO₂/n-Si (metal–insulator–semiconductor, MIS) structures were carried out between 1 kHz and 1 MHz at room temperature to investigate the interfacial insulator layer effect on the electrical characteristics of Au/n-Si structures. Experimental results showed that MIS structure's capacitance (C) values, unlike those of MS structure, became stable especially at high frequencies in the accumulation region. Also, the insulator layer caused structure's shunt resistance (R_sh) to increase. It was found that series resistance (R_s) is more effective in the accumulation region at high frequencies after the correction was applied to C and G/ω data to eliminate the R_s effect. The density of interface states (D_is) was obtained using Hill–Coleman method, D_is values MIS structure was obtained smaller than those of MS structure. Results indicate that interfacial insulator layer brings about some improvements in electrical characteristics of Au/n-Si structures.     

The frequency-dependent electrical characteristics of interfaces in the Sn/p-Si metal semiconductor structures

The purpose of this paper is to investigate frequency-dependent electrical characteristics of the interface states in Sn/p-Si metal semiconductor (MS) Schottky structures. To yield quantitative information about their frequency (f) and voltage (V) dependent characteristics, Sn/p-Si MS structures have been studied by using capacitance (C) and conductance (G/ω) measurements over a wide range of frequencies (50 kHz-1 MHz). The increase in capacitance at lower frequencies is seen as a signature of interface states, and the densities of which are evaluated to be of the order of ≅10¹⁰ cm⁻² eV⁻¹. The presence of the interfaces states (N_SS) is also evidenced as a peak in the capacitance-frequency characteristics that increases in magnitude with decreasing frequencies. Furthermore, the voltage and frequency dependence of series resistance (R_S) were calculated from the C-V and G/ω-V measurements and plotted as functions of voltage and frequency. The effect of R_S on C and G/ω is found noticeable at high frequencies. The C-V-f and G/ω-V-f characteristics of studied structures show fairly large frequency dispersion especially at low frequencies due to N_SS in equilibrium with the semiconductor. The experimental values of interface state densities and series resistance from C-V-f and G/ω-V-f measurements were obtained in the ranges of 3.46 × 10¹⁰−1.26 × 10⁹ cm⁻² eV⁻¹ and 71.1-57.3 Ω, respectively. Experimental results show that both the R_S and N_SS values should be taken into account in determining frequency-dependent electrical characteristics.     

Characteristics of RF reactive sputter-deposited Pt/SiO2/n-InGaN MOS Schottky diodes

All RF sputtering-deposited Pt/SiO₂/n-type indium gallium nitride (n-InGaN) metal–oxide–semiconductor (MOS) diodes were investigated before and after annealing at 400 °C. By scanning electron microscopy (SEM), the thickness of Pt, SiO_2, n-InGaN layer was measured to be ~250, 70, and 800 nm, respectively. AFM results also show that the grains become a little bigger after annealing, the surface topography of the as-deposited film was smoother with the rms roughness of 1.67 nm and had the slight increase of 1.92 nm for annealed sample. Electrical properties of MOS diodes have been determined by using the current–voltage (I–V) and capacitance–voltage (C–V) measurements. The results showed that Schottky barrier height (SBH) increased slightly to 0.69 eV (I–V) and 0.82 eV (C–V) after annealing at 400 °C for 15 min in N₂ ambient, compared to that of 0.67 eV (I–V) and 0.79 eV (C–V) for the as-deposited sample. There was the considerable improvement in the leakage current, dropped from 6.5×10⁻⁷ A for the as-deposited to 1.4×10⁻⁷ A for the 400 °C-annealed one. The annealed MOS Schottky diode had shown the higher SBH, lower leakage current, smaller ideality factor (n), and denser microstructure. In addition to the SBH, n, and series resistance (R_s) determined by Cheungs׳ and Norde methods, other parameters for MOS diodes tested at room temperature were also calculated by C–V measurement.     

New method of determination of the flat-band voltage in SOI MOS structures

A new method to determine the flat-band voltage V_FB in a MOS structure has been proposed. It is based on measuring a voltage which corresponds to a capacitance equal to 0.9 of the oxide capacitance. The method is especially suited for SOI (silicon on insulator) structures, but could be useful in conventional types. In the latter case the error of determination of V_FB caused by an uncertainty in doping concentration is smaller than in the classical procedure, especially when the thickness of the dielectric is small.     

Fabrication and electrical properties of Al/aniline green/n-Si/AuSb structure

The current–voltage (I–V), capacitance–voltage (C–V) and capacitance–frequency (C–f) characteristics of Al/aniline green(AG)/n-Si/AuSb structure were investigated at room temperature. A modified Norde's function combined with conventional forward I–V method was used to extract the parameters including barrier height (BH) and the series resistance. The barrier height and series resistance obtained from Norde's function was compared with those from Cheung functions, and it was seen that there was a good agreement between the BH values and series resistances from both methods. The C–V characteristics were performed at 10 and 500 kHz frequencies, and C–f characteristics were performed 0.0, +0.4 and −0.4 V.     

The effect of oxide layer thickness on the quantification of 1.5 MeV γ–radiation induced interface traps in the Ag/SiO2/Si MOS devices

This work presents the effect of varied thickness of oxide layer and radiation dose on electrical characteristics of Ag/SiO₂/Si MOS devices irradiated by 1.5 MeV γ–radiations of varied doses. SiO₂ layers of 50, 100, 150 and 200 nm thickness were grown on Si substrates using dry oxidation and exposed to radiation doses of 1, 10 and 100 kGy. The exposure to radiation resulted in generation of fixed charge centers and interface traps in the SiO₂ and at the Si/SiO₂ interface. Capacitance-conductance-voltage (C-G-V) and capacitance-conductance-frequency (C-G-f) measurements were performed at room temperature for all MOS devices to quantify the active traps and their lifetimes. It is shown that accumulation and minimum capacitances decreased as the thickness of SiO₂ layer increased. For the unexposed MOS devices, the flat band voltage V_FB decreased at a rate of −0.12 V/nm, density of active traps increased by 4.5 times and depletion capacitance C_DP, increased by 2.5 times with the increase of oxide layer thickness from 50 to 200 nm. The density of active traps showed strong dependence on the frequency of the applied signal and the thickness of the oxide layer. The MOS device with 200 nm thick oxide layer irradiated with 100 kGy showed density of active interface traps was high at 50 kHz and was 3.6×10¹⁰ eV⁻¹ cm⁻². The relaxation time of the interface traps also increased with the exposure of γ–radiation and reached to 9.8 µs at 32 kHz in 200 nm thick oxide MOS device exposed with a dose of 100 kGy. It was inferred that this was due to formation of continuum energy states within the band gap and activation of these defects depended on the thickness of oxide layer, applied reverse bias and the working frequency. The present study highlighted the role of thickness of oxide layer in radiation hard environments and that only at high frequency, radiation induced traps remain passivated due to long relaxation times.     

Frequency and voltage dependence of admittance characteristics of Al/Al2O3/PVA:n-ZnSe Schottky barrier diodes

This paper reports the frequency dependence of admittance measurements i.e C–V and G/ω–V characteristics of Al/Al₂O₃/PVA:n-ZnSe MIS diode. The interface states (N_ss) and series resistance (R_s) of the MIS diode strongly influence the C–V–f and G/ω–V–f characteristics. The conductance method is used to calculate the series resistance (R_s), the density of states (N_ss), insulator layer capacitance and thickness. The frequency dependent dieclectric parameters such as dielectric constant (εʹ), dielectric loss (ε″), loss tangent (tan δ) and a.c. electrical conductivity (σ_ac) has been calculated and which are also responsible for observed frequency dispersion in C–V and G/ω curves.     

The C-V-f and G/ω-V-f characteristics of Al/SiO2/p-Si (MIS) structures

The frequency dependence of capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of the Al/SiO₂/p-Si metal-insulator-semiconductor (MIS) structures has been investigated taking into account the effect of the series resistance (R_s) and interface states (N_ss) at room temperature. The C-V and G/ω-V measurements have been carried out in the frequency range of 1 kHz to 1 MHz. The frequency dispersion in capacitance and conductance can be interpreted only in terms of interface states and series resistance. The N_ss can follow the ac signal and yield an excess capacitance especially at low frequencies. In low frequencies, the values of measured C and G/ω decrease in depletion and accumulation regions with increasing frequencies due to a continuous density distribution of interface states. The C-V plots exhibit anomalous peaks due to the N_ss and R_s effect. It has been experimentally determined that the peak positions in the C-V plot shift towards lower voltages and the peak value of the capacitance decreases with increasing frequency. The effect of series resistance on the capacitance is found appreciable at higher frequencies due to the interface state capacitance decreasing with increasing frequency. In addition, the high-frequency capacitance (C_m) and conductance (G_m/ω) values measured under both reverse and forward bias were corrected for the effect of series resistance to obtain the real diode capacitance. Experimental results show that the locations of N_ss and R_s have a significant effect on electrical characteristics of MIS structures.     

Characterization of current-voltage (I-V) and capacitance-voltage-frequency (C-V-f) features of Al/SiO2/p-Si (MIS) Schottky diodes

The current-voltage (I-V) characteristics of metal-insulator-semiconductor Al/SiO₂/p-Si (MIS) Schottky diodes were measured at room temperature (300 K). In addition, capacitance-voltage-frequency (C-V-f) characteristics are investigated by considering the interface states (N_ss) at frequency range 100 kHz to 1 MHz. The MIS Schottky diode having interfacial insulator layer thickness of 33 Å, calculated from the measurement of the insulator capacitance in the strong accumulation region. At each frequency, the measured capacitance decreases with increasing frequency due to a continuous distribution of the interface states. From the I-V characteristics of the MIS Schottky diode, ideality factor (n) and barrier height (Φ_b) values of 1.766 and 0.786 eV, respectively, were obtained from a forward bias I-V plot. In addition, the interface states distribution profile as a function of (E_ss − E_v) was extracted from the forward bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φ_e) for the Schottky diode. The diode shows non-ideal I-V behaviour with ideality factor greater than unity. This behaviour is attributed to the interfacial insulator layer, the interface states and barrier inhomogeneity of the device. As expected, the C-V curves gave a barrier height value higher than those obtained from I-V measurements. This discrepancy is due to the different nature of the I-V and C-V measurement techniques.     

Temperature dependent electrical and dielectric properties of a metal/Dy2O3/n-GaAs (MOS) structure

This paper describes the structural properties, electrical and dielectric characteristics of thin Dy₂O₃ layer deposited on the n-GaAs substrate by electron beam deposition under ultra vacuum. Structural and morphological characterizations are investigated by atomic force microscopy (AFM) and X-ray diffraction measurements (XRD). The XRD shows that the elaborated Dy₂O₃ oxide has a cubic structure. The electrical and dielectric properties of Co/Au/Dy₂O₃/n-GaAs structure were studied in the temperature range of 80–500 K. The conductance and capacitance measurements were performed as a function of bias voltage and frequency. The dielectric constant (ε′), dielectric loss (ε″) and dielectric loss tangent (tanδ) of the structure are obtained from capacitance–voltage (C–V) and conductance–voltage (G/ω–V) measurements. These parameters are found to be strong functions of temperature and bias voltage. A strong negative capacitance (NC) phenomenon has been observed in C–V; hence ε′–V plots for each temperature value take negative values. The following behavior of the C and ε′ in the forward bias region has been explained with the minority-carrier injection and relaxation theory. From DC conductance study, electronic conduction is found to be dominated by thermally activated hopping at high temperature. Activation energy is deduced from the variation of conductance with temperature. The interface state density (N_ss) of the structure is of the order 1.13×10¹³ eV⁻¹ cm⁻².     

Electrical characterization of MS and MIS structures on AlGaN/AlN/GaN heterostructures

The forward and reverse bias I-V, C-V, and G/ω-V characteristics of (Ni/Au) Schottky barrier diodes (SBDs) on the Al_0.22Ga_0.78N/AlN/GaN high-electron-mobility-transistor (HEMTs) without and with SiN_x insulator layer were measured at room temperature in order to investigate the effects of the insulator layer (SiN_x) on the main electrical parameters such as the ideality factor (n), zero-bias barrier height (Ф_B0), series resistance (R_s), interface-state density (N_ss). The energy density distribution profiles of the N_ss were obtained from the forward bias I-V characteristics by taking into account the voltage dependence of the effective barrier height (Ф_e) and ideality factor (n_V) of devices. In addition, the N_ss as a function of E_c-E_ss was determined from the low-high frequency capacitance methods. It was found that the values of N_ss and R_s in SBD HEMTs decreases with increasing insulator layer thickness.