Small planar packaging system for high-throughput ATM switchingsystems

A small planar packaging (SPP) system is described that can be combined with card-on-board (COB) packaging in ATM switching systems with throughputs of over 40 Gbit/s. Using a newly developed quasicoaxial zero-insertion-force connector, point-to-point 311 Mbit/s of 8 bit parallel signal transmission is achieved in an arbitrary location on the SPP system's shelf. Also 5400 I/O connections in the region of the planar packaging system are made, and thus the SPP system eliminates the I/O pin count limitation. Furthermore, the heat flux of the SPP system is five times higher than that of conventional COB packaging because of its air flow control structure     

A scalable ATM switching system architecture

The architecture of an asynchronous transfer mode (ATM) switching system for prototype applications is presented. The general concept to upgrade the existing ISDN switch with an ATM module is introduced, and the building blocks of this ATM module are described in detail. Switching of ATM cells is performed in a single application-specific integrated circuit (ASIC). ASICs can be cascaded to form large switching modules. Peripheral modules interface the ATM switch to external transmission systems and perform all ATM-related functions, including means for redundancy of the switching network. The redundancy scheme tolerates single failures without affecting the user information. A switching network architecture is shown to be capable of fulfilling varying demands in terms of the number of ports for ATM switches and cross connects, concentrators, and multiplexers     

点对多点ATM交换网络的实现与性能分析

本文中 ,我们基于Knockout交换结构 ,提出了一种能实现点到多点交换的ATM交换结构 ,并对其性能进行了分析 ,然后通过模拟证明该方法有较好的性能     

Nonblocking architectures for ATM switching

General models for a class of nonblocking architectures of asynchronous transfer mode (ATM) switches are described. Hardware aspects are discussed to show the implementation feasibility of the proposed switch architectures by means of the current technology. Performance issues are studied to point out the traffic bottlenecks of the different structures. It is shown that the classification of queueing is the main concept that enables the classification of nonblocking ATM switches. Three main packet queueing strategies can be adopted in the switching fabric: input queueing, shared queueing, and output queueing. Switch architectures adopting only one of these strategies are described. The ways in which two strategies can be jointly adopted in a switching fabric to result in the mixed queueing strategies input-output queueing, input-shared queueing, and shared-output queueing are also discussed     

Architectures for ATM switching systems

Eight specific architectures for asynchronous transfer mode (ATM) switching systems are compared: the Knockout, Sunshine, Lee's, Tandem Banyan, Shuffleout, and three variations on buffered Benes networks. The differences between switching systems, based on architectural choices rather than details of implementation are discussed. Several broad categories of systems based on high-level architecture choices are considered. Within each category one or more alternatives are reviewed, and an equation for the chip count for each alternative is developed. The equations are used to make plots of chip count for each network over a range of parametric values     

TORUS: terabit-per-second ATM switching system architecture basedon distributed internal speed-up ATM switch

A high-speed and distributed ATM switch architecture, called the TORUS switch, is proposed with the aim of achieving a terabit-per-second ATM switching system. The switch is a distributed and scalable internal speed-up crossbar-type ATM switch with cylindrical structure. The self-bit-synchronization technique and optical interconnection technology are combined to achieve gigabit-rate cell transmission, where high-density implementation technologies such as multichip module technology are not required at all. Also, distributed contention control based on the fixed output-precedence scheme is newly adopted. This control is very suitable for high-speed devices because its circuit is achieved with only one gate in each crosspoint. A TORUS switch is fabricated as a 4×2 switch module using optical interconnection technology and very high-speed crosspoint LSIs, constructed using an advanced Si-bipolar process. Measured results confirm that the TORUS switch can be used to realize an expandable terabit-rate ATM switch     

Polyhedral switching structures for ATM networks

The authors propose switching structures based on regular and non-regular polyhedra which ensure better QoS than the ATM switching networks known to date. The key idea of this solution is based on placing elementary switches on a sphere-shaped surface. Any set of adjacent switches forms a polygon, and the polygons in turn form a polyhedron     

Onboard switching for ATM via satellite

This article presents an architecture for onboard ATM switching. The constraints of the space environment and the associated delays (especially with geostationary satellites) create often conflicting requirements for the implementation of ATM via satellite. These requirements must be considered when designing onboard equipment. The article suggests that the use of MF-TDMA framing and of physical-layer scheduling as a preswitching stage allows for the use of standard switch fabrics onboard with additional fault tolerance and buffer mechanisms. The details of the scheduler and of the RF front end, including demodulation and demultiplexing, are presented as well as suitable switch fabrics and their performance/implementation impact. ATM is now widely considered the delivery medium for the broadband services of the future. This fact has also attracted the attention of the satellite community. Current satellite ATM trials have concentrated on trunking applications using available broadcast satellites. However, the US FCC filings for Ka band satellites, as well as Canadian W and European initiatives, have focused on a new generation of digital regenerative multibeam onboard processing satellites     

An architecture of scalable ATM switching system and its performance

In this paper, we present the basic idea and some concepts for the architecture of the ATM switching system being developed in ETRI of KOREA, and also describe its performance. RSE (Reference Service Entity) concept is introduced to define the characteristics of user’s traffic. This concept is useful to represent the demand of CPE (Customer Premise Equipment) user sets and one of point‐to‐multipoint connections. We also propose RUCA (Reference Units for Connection Attempts) concept with which we can illustrate the call/connection level performance of the ATM switching system. This concept can be applied for measuring the call processing capability in both point‐to‐multipoint connections and multipoint‐to‐multipoint connections when call set‐up between users is performed by a sequence of point‐to‐point connections basis. From the basic concepts and the recommendations of ITU‐T, the design objective of the system performance is specified. We represent the methodologies for dimensioning the system to achieve the design objectives, and estimate the system performances. Then we show that our developing system has suitable performance to accommodate the future B‐ISDN. This revised version was published online in August 2006 with corrections to the Cover Date.     

ATM switching architectures for wafer-scale integration

This paper proposes the use of wafer-scale integration (WSI) technology for ATM switching systems and presents two different switching architectures specifically designed for WSI. WSI is particularly useful for switching networks since the interconnection lengths are minimized when the entire network is laid out on a single semiconductor wafer. We propose a defect-tolerant multipath buffered crossbar (MBC) with an expandable structure which can easily be scaled up or down according to the choice of wafer size. We also design an ATM-based Manhattan-street network (MSN) as an alternative architecture, suitable for wafer-scale implementation. We compare the two architectures from different standpoints such as performance, defect-tolerance, delay, practicality, testability, complexity, yield, and area     

Stochastic models for ATM switching networks

Models that take into account the fact that the switching speed may be appreciably greater than the speed at which some sources generate their respective cells are considered. The case is investigated where the cells making up individual bursts are spaced according to some prescribed probability distribution. It is shown that the switch performance is strongly dependent on the input parameters and it is demonstrated that analytical approaches provide useful alternatives to the lengthy simulation runs needed to evaluate probabilities of rare events, such as cell losses     

ATM shared-memory switching architectures

ATM will provide flexibility in bandwidth allocation and will allow a network to carry heterogeneous services ranging from narrowband to wideband services. The challenge is to build fast packet switches able to match the high speeds of the input links and the high performance requirements imposed. The CCITT has standardized the asynchronous transfer mode (ATM) as the multiplexing and switching principle for the broadband integrated services digital network (B-ISDN). ATM is a packet and connection-oriented transfer mode based on statistical time division multiplexing techniques. The information flow is organized in fixed-size packets called cells, consisting of a user information field (48 octets) and a header (5 octets). The primary use of the header tag is to identify cells belonging to the same virtual channel and to make routing possible. Cell sequence on a virtual channel is preserved, a very low cell loss probability must be guaranteed (< 10^-12), and intensive error and flow control protocols are provided at the edges of the network     

Designing a CORBA-based high performance open programmablesignaling system for ATM switching platforms

ATM switching platforms are well suited for transporting multimedia streams with quality-of-service (QOS) requirements. This paper describes the system design of a high performance connection management system for xbind, a flexible open programmable signaling system for ATM switching platforms. The latency and throughput of call processing is improved by caching, message aggregation, and processing of requests in parallel. Using a set of general purpose UNIX work stations, we are able to attain a maximum throughput of close to 600000 call operations/h (setup and delete) with an average call setup time of 85 ms. With a low traffic load of 3600 call operations/h, an average call setup latency of 11 ms can be obtained. The system is adaptive. By adjusting various control parameters, the connection manager(s) can be dynamically configured to trade off between throughput and call setup time     

A novel switching architecture for ATM networks

It is known that the flexibility and capacity of asynchronous transfer mode (ATM) networks can meet the bandwidth requirements of multimedia applications. In ATM networks, switching is one of the major bottlenecks of end-to-end communication. We propose using a multiple partitionable circular bus network (MPCBN) as an ATM switch. Connection requests are first transformed into a graph where vertices and edges represent connection requests and conflicts among connection requests, respectively. We then use a graph traversal algorithm to select a maximal set of requests for execution in physically partitioned buses. An approach of using finite projective planes is then used to reduce the number of switch points from O(N²) to O(N √N), where N is the number of ports of a switch. A performance evaluation for both uniform and bursty data sources shows that the approach of using finite projective planes to reduce the number of switch points results in a small increase of cell loss probability     

Recursive copy generation for multicast ATM switching

This paper describes the structure of a multicast asynchronous transfer mode (ATM) switching node employing a recursive copy generation algorithm, based on a self-routing network with a limited copying capability and a few added elements. With the network generates only a few copies a time of an input multicast cell, the remaining are obtained by recycling the output copies to the corresponding inputs as many times as necessary. The proposed recursive copy generation is also suitable to dynamically include new destinations and to delete old ones. The performance of the proposed structure, that has been implemented in a test-bed prototype, is also evaluated in terms of throughput and delay, via computer simulation, showing a possible performance improvement for multicast traffic with respect to an equivalent unicast input traffic. The cell loss probability in such structure is also evaluated     

Development of packaging technologies for microsystems

It is well known that packaging plays a very important role in developing microsystems. Packaging accounts for about 60%～80% of cost and function of a microsystem. Package is required to provide mechanical protection, media separation or coupling, signal conditioning, etc.     

Development of packaging technologies for microsystems

［1］ESASHI M. MEMS packaging and assembly[A]. Pacific Rim Workshop on Transducers and Micro/Nano Technology[C]. Xiamen, China, 2002, 1-10. ［2］TAKIZAWA T, YAMAMOTO S, ITOI K, et al. Conductive interconnection through thick silicon substrates for 3D packaging[A]. MEMS 2002 Technical Digest of 15th IEEE Int Conf on Micro Electro Mechanical Systems[C]. Las Vegas, USA, 388-391. ［3］WANG Z.F, CAO W, ARULVANAN P, et al. Packaging of a fiber optical MEMS switch[A]. Proc. of 4th Electronics Packaging Technology Conf[C]. Singapore, 2002, 96-100. ［4］NAJAFI K. Micropackaging technologies for integrated Microsystems[A]. Proc of SPIE[C]. San Jose, CA. USA, 2003,Vol. 4979, 1-19.     

Introduction strategy and technologies for ATM VP-based broadbandnetworks

A credible introduction strategy for B-ISDN is described. The first step is the introduction of asynchronous transfer mode (ATM) techniques into the path layer. The strategy is shown to be effective, since it enables not only the realization of a cost-effective and flexible network infrastructure, but also the provision of high-speed multimedia leased line services. The service advantages possible with virtual paths are also demonstrated. The authors' technical advances, including ATM network resource management techniques and network utilization enhancement techniques, are highlighted     

手势切换音响系统的设计与实现

利用手势传感器和单片机技术,结合蓝牙技术,设计并实现了一个手势感应音响。通过感应手势的方向使播放器动作,包括播放/暂停/上一首/下一首/模式切换/电源开关等功能,另外还扩展了SD卡、蓝牙、USB 3种音频输入模式。