On the transposition of Gm–C filters to DC stabilized log‐domain filters

High‐order log‐domain filters could be designed by transposing the already known linear‐domain G_m–C filter topologies to the corresponding topologies in the log‐domain. This is achieved by using a non‐linear transconductor configuration, where the output current is exponentially related to its input and output voltages. A drawback of the non‐linear transconductor configuration already introduced in the literature is that a number of the transposed log‐domain filter topologies suffer from DC instability, while in some others a DC offset current appears at their output. In order to eliminate the aforementioned problems a modified non‐linear transconductor configuration for transposing G_m–C filter topologies to log‐domain filter topologies is introduced in this paper. The achieved improvements are demonstrated through a number of log‐domain filter configurations derived using the already introduced and the proposed transposition schemes. Copyright © 2006 John Wiley & Sons, Ltd.     

Realization of log‐domain high‐order transfer functions using first‐order building blocks and complementary operators

High‐order log‐domain filters could be easily designed by using the functional block diagram (FBD) representation of the corresponding linear prototype and a set of complementary operators. For this purpose, lossy and lossless integrator blocks have been already introduced in the literature. Novel first‐order log‐domain highpass and allpass filter configurations, which are fully compatible with the already published integrator blocks, are introduced in this paper. These are realized using integration and subtraction blocks or a novel differentiation configuration. As a result, a complete set of first‐order building blocks would be available for synthesizing any arbitrary high‐order transfer function. In order to verify the correct operation of the proposed structures, the performance of the introduced highpass filters was evaluated through simulation results. In addition, a fifth‐order log‐domain bandpass filter was designed and simulated using one of the introduced first‐order highpass filter configurations. Copyright © 2006 John Wiley & Sons, Ltd.     

Square‐root domain wave filters

In this paper the wave method is used for designing high‐order square‐root domain filters, which emulate the topology of the corresponding LC ladder prototypes. This is achieved by transposing the signal flow graph that corresponds to the wave equivalent of the elementary two‐port subnetwork in the linear domain to the corresponding one in the square‐root domain, by employing an appropriate set of complementary operators. As the equivalents of the other reactive elements are derived from the wave equivalent of the elementary subnetwork, by interchanging the terminals of the appropriate wave signals and/or using inverters, an advantage offered by the proposed technique is the modularity of the derived filter configurations. As an example, a fifth‐order lowpass square‐root domain wave filter was designed and its behaviour was studied through simulation results in order to demonstrate the validity of the proposed design technique. Copyright © 2006 John Wiley & Sons, Ltd.     

Modelling the dynamics of log‐domain circuits

Log‐domain filters are an intriguing form of externally linear, internally nonlinear current‐mode circuits, in which a compression stage is first used to convert the input currents to the logarithmic domain, then analogue processing is carried out on the resulting voltages, and finally input–output linearity is restored by mapping the output voltages to current form through an expansion stage. The compressing and expanding operations confer on log‐domain filters a number of desirable features, but they may be responsible for the loss of external linearity. In this paper, sufficient conditions for the external linearity of log‐domain LC‐ladders are established, and the local nature of this external linearity is highlighted. Certain log‐domain LC‐ladders employing floating capacitors may exhibit externally nonlinear behaviour even for zero input and very small initial conditions. We show how transistor parasitic capacitances are central to the emergence of this behaviour, and must be incorporated in the circuit model. Copyright © 2006 John Wiley & Sons, Ltd.     

Log‐domain linear transformation filters revised: improved building blocks and comparison results

A method for designing high‐order log‐domain filters has already been proposed in the literature based on the concept of the classical linear transformation (LT) filters. For this purpose, a substitution table containing the log‐domain LT equivalent of each passive element has been introduced. Drawbacks of the log‐domain filter topologies derived according to this table are the following: (a) a dc offset current appears at the output of all pole filters and (b) dc instability is observed in the case of the substitution of LC resonators. In addition, an alternative technique already proposed for simulating filters with LC resonators is valid only under small‐signal conditions. In order to overcome the aforementioned problems, new log‐domain LT equivalents of a number of passive elements are introduced in this paper. The correct operation of the novel blocks has been verified through simulation results. Also, a comparison concerning the behaviour of the log‐domain LT filters and that of the filters derived according to the leapfrog and the wave methods has also been performed. Copyright © 2007 John Wiley & Sons, Ltd.     

A DC stabilized log‐domain nth‐order multifunction filter based on the decomposition of nth‐order HP filter function to FLF topology

The design of high‐order log‐domain filters can be easily accomplished by transposing already known linear‐domain G_m‐C filter topologies to their counterparts in the log‐domain through the employment of a set of complementary operators. To achieve the G_m‐C filter topologies, the multiple feedback approach is widely used due to its accrued advantages. In this paper a synthesis approach for the development of an nth‐order multifunction log‐domain filter comprising lowpass (LP), highpass (HP) and bandpass (BP) filter functions is proposed. The approach is based on the decomposition of nth‐order HP filter function to follow‐the‐leader‐feedback (FLF) topology. The design is simple and simultaneously achieves nearly all of the chief advantages. The design offers superior performance factors vis‐à‐vis the ones recently reported. To verify the high‐order behavior of the topology, a 5th‐order multifunction filter was designed and the achieved simulated results verify the theory. Copyright © 2008 John Wiley & Sons, Ltd.     

Square‐root domain linear transformation filters

A new systematic method for designing square‐root domain (SRD) linear transformation (LT) filter is introduced in this paper. For this purpose, a substitution table containing the SRD LT equivalent of each passive element has been introduced. The proposed equivalents have been realized by employing appropriate SRD building blocks with low‐voltage operation capability. As a design example, a 3rd‐order SRD LT filter has been realized and its performance has been evaluated through simulation results. In addition, the most important performance factors of the SRD filter have been compared with those achieved by the SRD filters derived according to the leapfrog, wave, and topological emulation methods. Copyright © 2010 John Wiley & Sons, Ltd.     

High input impedance voltage‐mode first‐order all‐pass sections

This paper proposes six new first‐order voltage‐mode all‐pass sections (VM‐APSs) based on three general topologies. Each circuit uses two differential voltage current conveyors and three grounded passive components. All the circuits possess high input impedance and easy control of pole frequency either by a simple matching of resistors (two equal‐valued resistors) for the three canonical circuits or by a single resistor for three non‐canonical circuits. PSPICE simulation results using real device 0.5µ CMOS parameters are given to validate the proposed circuits. Copyright © 2007 John Wiley & Sons, Ltd.     

CMOS weak‐inversion log‐domain glycolytic oscillator: a cytomimetic circuit example

This paper presents a 3 V, 1.21μW subthreshold log‐domain circuit which mimics the oscillations observed during the biochemical process of glycolysis due to the phosphofructokinase enzyme. The proposed electronic circuit is able to simulate the dynamics of the glycolytic oscillator and represent the time‐dependent concentration changes of the reactants and the products of the chemical process based on nonlinear differential equations which describe the biological system. By modifying specific circuit parameters, which correspond to certain chemical parameters, good agreement between the biochemical and electrical model results has been reached. The paper details the similarities between the equations that describe the biochemical process and the equations derived from the circuit analysis of a transistor and a source‐connected linear capacitor, a topology also known as the Bernoulli Cell. With the use of the Bernoulli Cell formalism, the chemical equations which describe the biochemical system have been transformed into their electrical equivalents. The analog circuit, which implements the whole process, has been synthesised, and simulation results including Monte Carlo analysis are provided, in order to verify the robustness of the proposed circuit and to compare its dynamics with prototype biological behaviour. Copyright © 2012 John Wiley & Sons, Ltd.     

Analytical synthesis of voltage‐mode even/odd‐nth‐order differential difference current conveyor and fully differential current conveyor II‐grounded resistor and capacitor universal filter structures

A complete definition of an odd/even‐nth‐order notch or band‐reject filter transfer function is presented. Based on the differences between the input voltage and (i) an nth‐order high‐pass; (ii) a traditional nth‐order notch; and (iii) an nth‐order all‐pass filtering transfer function, a systematic method has been proposed to derive a universal filter structure that can realize voltage‐mode odd/even‐nth‐order low‐pass, band‐pass, high‐pass, all‐pass and traditional notch filters. The intrinsic capability of voltage‐mode addition and subtraction of the two active elements, differential difference current conveyors and fully differential current conveyors, is used to advantage in the aforementioned synthesis procedure. Based upon the definition of an nth‐order notch or band‐reject filter transfer function proposed in this paper, the aforementioned universal one has been further extended to the newly defined nth‐order band rejection filter. The voltage and current tracking errors of the two active elements are compensated by varying the resistances of the proposed filter. Filtering feasibility, stability, component sensitivities, linear and dynamic ranges, power consumption, and noise are simulated using H‐Spice with 0.35 µm process. Compared to some of the recently reported universal biquads, the new one is shown to enjoy the lowest component sensitivities and the best output accuracy for all‐pass signals. Moreover, Monte Carlo and two‐tone tests for intermodulation linearity simulations are also investigated. Copyright © 2014 John Wiley & Sons, Ltd.     

1.5 V square‐root domain universal biquad filters

Square‐root domain universal biquad topologies are introduced in this paper. One of them is single input multiple output, while the other one is multiple input single output biquad. Important benefits offered by the proposed topologies are the electronic adjustment of the resonant frequency and the capability for operating in a low‐voltage environment; also, the resonant frequency could be adjusted without disturbing the Q factor and vice‐versa. Simulation results using the Spectre simulator of the Analog Design Environment of Cadence software validate the correct operation of the proposed topologies and provide important performance characteristics. Copyright © 2011 John Wiley & Sons, Ltd.     

All‐pass filters using DDCC‐ and MOSFET‐based electronic resistor

The main motivation in this paper is to draw attention to the tunability and input‐signal amplitude limitations when a nonlinear device is used as a resistor. For this purpose, two first‐order all‐pass filters are proposed using differential difference current conveyor (DDCC), a capacitor and a resistor without element‐matching restriction. These all‐pass filter circuits can be made electronically tunable with electronic resistors. Tunability and input‐signal amplitude limitations of the proposed circuits due to the operational restrictions of the electronic resistors are examined. PSPICE simulations confirm the validity and the practical utility of the proposed circuits. Copyright © 2010 John Wiley & Sons, Ltd.     

Design of Sinh‐Domain filters using complementary operators

A new systematic method for designing Sinh‐Domain filters is introduced in this paper. This is achieved by employing an appropriate set of complementary operators, in order to transpose the conventional functional block diagram representation of each linear operation to the corresponding one into the Sinh‐Domain. The proposed method offers the benefits of facilitating the design procedure of high‐order Sinh‐Domain filters and of the absence of any restriction concerning the type and/or the order of the realized filter function. As an example, a third‐order Sinh‐Domain leapfrog filter is designed by employing the proposed set of operators. Two possible realizations are given and their performance has been evaluated and compared through simulation results. Copyright © 2011 John Wiley & Sons, Ltd.     

All‐pass dispersion synthesis using microwave C‐sections

A closed‐form iterative procedure for synthesizing quasi‐arbitrary phase responses with cascaded microwave C‐section all‐pass phasers is presented. The synthesis consists in mapping the transmission poles of the cascaded C‐section structure onto the transmission poles of the specified transfer function, where the latter poles are computed using a closed‐form polynomial generation method. The real and complex transmission poles of the specified transfer function are realized using C‐sections of different lengths and different couplings coefficients. The proposved synthesis is validated by both full‐wave analysis and measured multilayer prototypes. Copyright © 2013 John Wiley & Sons, Ltd.     

Analysis and design of discrete‐time charge domain filters with complex conjugate poles

This paper proposes a discrete‐time charge domain filter that achieves complex conjugate poles in the transfer function of the filter. To achieve complex conjugate poles, local feedbacks are inserted around two successive discrete‐time integrators. The feedback path is implemented through a transconductance cell which applies a continuous time current into the integrators. Analytical models have been proposed to approximate the behavior of the filter. These models confirm that the structure is capable of realizing complex poles and thus can be used to synthesize any type of filter structures such as Butterworth, Chebysheve, etc. To show the effectiveness of the proposed architecture, Butterworth filters of order 2 and 4 operating at 50MS/s are designed and implemented in 180‐nm CMOS technology with 1.8‐V power supply. The effect of circuit nonidealities on the performance of the filter is analyzed and verified through simulations. Simulation results show that a conventional charge domain filter can be simply extended to implement complex conjugate poles while the noise and linearity performance of the filter are also improved. Copyright © 2016 John Wiley & Sons, Ltd.     

Design of square‐root domain filters by substituting the passive elements of the prototype filter by their equivalents

A novel technique for designing square‐root domain (SRD) filters is introduced in this paper. The concept of the proposed method is based on the substitution of the passive elements of the corresponding prototype filter by their SRD equivalents. The signal processing performed by the proposed SRD equivalents achieves that the voltage at each terminal of the SRD equivalent is the compressed version of the voltage at the corresponding terminal of the passive element, and that the current that flows through the SRD equivalent is the same as that flows through the passive element. The main attractive characteristic of the proposed method is that a quick procedure for designing SRD filters is offered. The validity of the proposed technique was verified by studying the behaviour of a 5th‐order SRD low‐pass filter. In order to demonstrate the benefits offered by the proposed technique, a SRD leapfrog filter was also designed and its performance is compared with that of the active filter that topologically simulates the same prototype filter. Copyright © 2007 John Wiley & Sons, Ltd.     

New designs of low/high‐pass and mid‐pass/stop FIR digital filters

New designs of highly efficient low/high‐ and mid‐pass/stop (centre‐symmetric band‐pass/stop) FIR non‐recursive digital filters are presented. The designs are based on the modulation property of DFT, applied to the already presented MAXFLAT halfband low‐pass filters. The presented filters have explicit formulas for their tap‐coefficients, and therefore are very easy to design. They have highly smooth frequency response and wider transition regions like MAXFLAT filters. The design formulae are modified to give new classes of low/high‐ and mid‐pass/stop filters, for which, like in equiripple filters, the transition bandwidth can be reduced by increasing the size of ripple on magnitude response. It is shown, with the help of design examples, that the performance of these filters is comparable to that of equiripple filters. Copyright © 2001 John Wiley & Sons, Ltd.     

A simulation study of high‐order CMOS hyperbolic‐sine filters

This paper advances the field of externally linear–internally nonlinear (ELIN) filters by introducing a synthesis method that enables the design of high‐order class‐AB sinh filters by means of complementary metal–oxide semiconductor (CMOS) weak‐inversion sinh integrators comprising only one type of devices in their translinear loops. The proposed transistor‐level synthesis approach is demonstrated through the examples of (1) a biquadratic and (2) a fifth‐order filter, and their simulated performance is studied. The biquadratic filter achieves a dynamic range of 94 dB and has a tunable quality factor Q up to the value of 8, whereas its natural frequency can be tuned for four orders of magnitude. Its static power consumption amounts to 6.2 μW for Q = 1 and f_o = 2 kHz. The fifth‐order Chebyshev sinh CMOS filter with a cut‐off frequency of 100 Hz, a pass band ripple of 1 dB, and a power consumption of ~300 nW is compared head‐to‐head with its pseudo‐differential class‐AB CMOS log domain counterpart. The sinh filter achieves similar or better signal‐to‐noise ratio (SNR) and signal‐to‐noise‐plus‐distortion ratio (SNDR) performances with half the capacitor area but at the expense of higher power consumption from the same power supply level. All three presented filter topologies are novel. Cadence design framework simulations have been performed using the commercially available 0.35 µm AMS (austriamicrosystems) process parameters. Copyright © 2013 John Wiley & Sons, Ltd.     

Low‐noise,low‐sensitivity,active‐RC allpole filters using impedance tapering

In this paper it is shown that active‐RC filters whose sensitivity to component tolerances can be minimized by impedance tapering, will also have low output thermal noise. It is shown that impedance tapering will also reduce output thermal noise in OTA‐C filters. Copyright © 2010 John Wiley & Sons, Ltd.     

0.5‐V fractional‐order companding filters

Novel configurations of fractional‐order filter topologies, realized through the employment of the concept of companding filtering, are introduced in this paper. As a first step, the design procedure is presented in a systematic algorithmic way, while in the next step, the basic building blocks of sinh‐domain and log‐domain integrators are presented. Because of the employment of metal–oxide–semiconductor (MOS) transistors operated in the subthreshold region, the derived filter structures offer the capability for operation in an ultra‐low‐voltage environment. In addition, because of the offered resistorless realizations, the proposed topologies are reconfigurable, in the sense that the order of the filter could be chosen through appropriate bias current sources. The performance of the derived fractional‐order filters has been evaluated through simulation and comparison results using the Analog Design Environment of the Cadence software and MOS transistor parameters provided by the Taiwan Semiconductor Manufacturing Company (TSMC) 180‐nm complementary MOS (CMOS) process. Copyright © 2014 John Wiley & Sons, Ltd.