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1.
Hussain Alzaher Noman Tasadduq Osama Al‐Ees Fares Al‐Ammari 《International Journal of Circuit Theory and Applications》2013,41(1):69-81
A second‐generation current conveyor with digitally programmable current gains is presented. A current division network with zero standby power consumption is utilized in two different ways to provide both gain and attenuation of the second‐generation current conveyor's current transfer characteristics. The proposed topology overcomes several drawbacks of the previous solutions through affording a more power and area efficient solution while exhibiting relatively wider tuning range and bandwidth. A variable‐gain amplifier and a two‐integrator‐loop filter biquad providing low‐pass and band‐pass responses are given as application examples. A modified two‐integrator‐loop topology is developed to offer independent control of the pole frequency and quality factor without disturbing the passband gain. Simulation results obtained from a standard 0.18 µm complementary metal–oxide semiconductor process are given. Copyright © 2011 John Wiley & Sons, Ltd. 相似文献
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Hussain A. Alzaher 《International Journal of Circuit Theory and Applications》2008,36(8):953-966
CMOS digitally programmable quadrature oscillators based on digitally controlled current followers and voltage followers are proposed. The proposed designs provide the advantage of programmability similar to the operational transconductance amplifier‐based oscillators while offering improved linearity. In mixed analog/digital systems, the digital tuning feature allows direct interfacing with the digital signal processing part. Novel realizations that provide both voltage‐mode and current‐mode quadrature sinusoidal signals are presented. Employing only grounded capacitors the designs achieve independent control of the frequency and condition of oscillation that can be tuned digitally. Experimental results obtained from a 0.35 µm CMOS chip fabricated using standard CMOS process are given. Copyright © 2008 John Wiley & Sons, Ltd. 相似文献
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Antonio J. Lopez‐Martin Jaime Ramirez‐Angulo Ramón G. Carvajal Lucía Acosta 《International Journal of Circuit Theory and Applications》2011,39(9):893-903
A novel CMOS current‐feedback operational amplifier (CFOA) aimed to low‐power applications is proposed. The use of a compact class AB implementation allows high current‐drive capability and simultaneously very low quiescent power consumption. Measurement results of a fabricated prototype show for an inverting configuration a closed‐loop bandwidth of 1 MHz independent of gain setting, and a slew rate of 2V/µs for a load capacitance of 30 pF and a quiescent power consumption of 264µW. Copyright © 2010 John Wiley & Sons, Ltd. 相似文献
4.
George Souliotis Costas Psychalinos 《International Journal of Circuit Theory and Applications》2009,37(1):43-52
A novel current‐mode multiphase oscillator topology is introduced in this letter. This is realized by employing current amplifiers and only grounded capacitors. Attractive characteristics offered by the new topology are the electronic adjustment of the oscillation frequency, the absence of passive resistors, and the requirement of only grounded capacitors. Comparison with the corresponding already published current follower based structure shows that the proposed topology has better performance in terms of the number of required active elements, the employment of passive resistors, and the ability for electronic adjustment of the oscillation frequency. Copyright © 2008 John Wiley & Sons, Ltd. 相似文献
5.
George Souliotis Costas Psychalinos 《International Journal of Circuit Theory and Applications》2007,35(2):165-173
New configurations of harmonic oscillators, realized using current amplifier blocks and only grounded capacitors, are introduced in this article. The proposed configurations are based on a grounded inductor simulator scheme and on a loop constructed from first‐order sections, respectively. Comparison with the already published topologies shows that the new configurations have attractive characteristics concerning their implementation in integrated form. Copyright © 2006 John Wiley & Sons, Ltd. 相似文献
6.
Soliman A. Mahmoud Eman A. Soliman 《International Journal of Circuit Theory and Applications》2013,41(10):1074-1084
A novel fully differential digitally programmable current conveyor (DPCCII) is presented in this paper. The programmability of the proposed DPCCII is achieved using three‐bit MOS R‐2R ladder current division network. The DPCCII is used to realize a field programmable analog array (FPAA). The FPAA consists of seven configurable analog blocks arranged in a hexagonal form. The FPAA power consumption is 72.3 mW from 1 V voltage supply. A second‐order programmable universal filter is realized using the proposed FPAA as an application. All the circuits are realized and simulated using 90 nm IBM CMOS technology model under balanced supply voltage of ±0.5 V. Copyright © 2012 John Wiley & Sons, Ltd. 相似文献
7.
Georgia Tsirimokou Costas Psychalinos 《International Journal of Circuit Theory and Applications》2016,44(1):109-126
Fractional‐order blocks, including differentiators, lossy and lossless integrators as well as filters of order 1 + a (0 < a < 1), are presented in this paper. The proposed topologies offer the benefit of ultra low‐voltage operation; in addition, reduced circuit complexity is achieved compared to the corresponding companding schemes, which have been already introduced in the literature. The ultra‐low voltage operation is performed through the employment of metal oxide semiconductor transistors biased in the subthreshold region. The reduction of circuit complexity is achieved through the utilization of current mirrors as active elements for realizing the required building blocks. The performance of the proposed fractional‐order circuits has been evaluated through the Analog Design Environment of the Cadence software and the design kit provided by the Taiwan Semiconductor Manufacturing Company (TSMC) 180 nm complementary metal oxide semiconductor process. Copyright © 2015 John Wiley & Sons, Ltd. 相似文献
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Fırat Kaçar Abdullah Yeşil 《International Journal of Circuit Theory and Applications》2012,40(4):377-383
In this work, a voltage‐mode biquad filter realizing low‐pass, band‐pass and high‐pass characteristics is presented. The proposed filter, which employs two FDCCIIs, two grounded capacitors and two NMOS transistors, provides electronic tunability with the control voltage applied to the gate. NMOS transistors act as linear resistor. Furthermore, the proposed circuit still enjoys realization using a low number of active and passive components, no requirement with the component choice conditions to realize specific filtering functions, high input impedance, and low active and passive sensitivities performance. Simulation results using SPICE program are given to show the performance of the filter and verify the theory. Copyright © 2010 John Wiley & Sons, Ltd. 相似文献
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M. N. S. Swamy 《International Journal of Circuit Theory and Applications》2016,44(2):514-526
It is shown that the recently‐proposed modified current feedback operational amplifier (MCFOA) is quite a versatile element in that given a realization for a system function using MCFOAs, we can obtain three alternate realizations using the same MCFOA but by appropriately connecting the y, x, w, and z terminals of the MCFOA to the remaining part of the original realization. Using the results concerning the transpose of a multi‐terminal element, it is further shown that the transpose of an MCFOA is another MCFOA. Thus, using the results of transposition, given a voltage‐mode circuit using MCFOAs, we can directly obtain four current‐mode circuits using the same MCFOAs or vice versa. Copyright © 2015 John Wiley & Sons, Ltd. 相似文献
12.
Sudhanshu Maheshwari Bhartendu Chaturvedi 《International Journal of Circuit Theory and Applications》2011,39(4):427-435
In this paper a new circuit topology for realizing second‐order current‐mode quadrature oscillator is proposed. Three additional circuits are further derived from it, thus resulting in four distinct circuits. Each circuit employs three differential voltage current conveyors and all grounded passive components, ideal for IC implementation. All the circuits possess high output impedance. The circuits exhibit non‐interactive frequency control and low THD. The effects of non‐idealities are also analyzed. PSPICE simulations using 0.5 µCMOS parameters confirm the validity and practical utility of the proposed circuits. Copyright © 2010 John Wiley & Sons, Ltd. 相似文献
13.
W. Aloisi G. Giustolisi G. Palumbo 《International Journal of Circuit Theory and Applications》2003,31(5):513-528
In this paper, a thorough analysis of a gain‐boosted telescopic amplifier (GBTA) is presented and a systematic design procedure for optimizing its time response will be given. Specifically, the GBTA closed‐loop time response will be analysed in detail and the constraints eliminating the well‐known ‘slow settling component’ found. Subsequently, an optimization strategy based on the comparison between the GBTA time response and the time response of a pure two‐pole amplifier (referred to as the target system) will be described. This strategy allows the designer to develop a GBTA starting from the target system specifications in a simple and systematic way. The proposed procedure has been validated by means of simulations and excellent agreement found between the simulated and the expected results. Copyright © 2003 John Wiley & Sons, Ltd. 相似文献
14.
Enhancing the performances of recycling folded cascode OpAmp in nanoscale CMOS through voltage supply doubling and design for reliability
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Pui‐In Mak Miao Liu Yaohua Zhao Rui P. Martins 《International Journal of Circuit Theory and Applications》2014,42(6):605-619
Current‐oriented operational amplifier (OpAmp) design has been common for its orderly current‐to‐speed tradeoff. However, for high‐precision or high‐linearity applications, increasing the current does not help much, as the supply voltage (VDD) and intrinsic gain of the MOSFETs in ultra‐scaled CMOS technologies are very limited. This paper introduces voltage‐oriented circuit techniques to address such limitations. Specifically, a 2xVDD‐enabled recycling folded cascade (RFC) OpAmp is proposed. It features: (1) current recycling to enhance the effective trans conductance by 4x with no extra power; (2) transistor stacking to boost the output resistance by one to two orders of magnitude; and (3) VDD elevating to enlarge the linear output swing by 4x. Comparing with its 1xVDD RFC and FC counterparts, the proposed solution achieves 20‐dB higher DC gain (i.e. 72.8 dB) in open loop and 20‐dB lower IM3 (i.e., –76.5 dB) in closed loop, under the same power budget of 0.6 mW in a 1‐V General Purpose 65‐nm CMOS process. In many applications, these joint improvements in a single stage are already adequate, being more power efficient (i.e. less current paths), stable (i.e. more phase margin), and compact (i.e. no frequency compensation) than multi‐stage OpAmps. Voltage‐conscious biasing and node‐voltage trajectory check ensure the device reliability in both transient and steady states. No specialized high‐voltage device is necessary. Copyright © 2012 John Wiley & Sons, Ltd. 相似文献
15.
M. Pilar Garde Antonio Lopez-Martin Jose M. Algueta Ramon G. Carvajal Jaime Ramirez-Angulo 《International Journal of Circuit Theory and Applications》2019,47(8):1199-1210
The design of a micropower class AB operational transconductance amplifier with large dynamic current to quiescent current ratio is addressed. It is based on a compact and power-efficient adaptive biasing circuit and a class AB current follower using the quasi-floating gate (QFG) technique. The amplifier has been designed and fabricated in a 0.5-μm CMOS process. Simulation and measurement results show a slew rate (SR) improvement factor versus the class A version larger than 4 for the same supply voltage and bias currents, as well as enhanced small-signal performance. 相似文献
16.
Hua‐Pin Chen 《International Journal of Circuit Theory and Applications》2014,42(4):376-393
A new tunable current‐mode (CM) biquadratic filter with three inputs and three outputs using three dual‐output inverting second‐generation current conveyors, three grounded resistors and two grounded capacitors is proposed. The proposed circuit exhibits low‐input impedance and high‐output impedance which is important for easy cascading in the CM operations. It can realize lowpass, bandpass, highpass, bandreject and allpass biquadratic filtering responses from the same topology. The circuit permits orthogonal controllability of the quality factor Q and resonance angular frequency ωo, and no component matching conditions or inverting‐type input current signals are imposed. All the passive and active sensitivities are low. Hspice simulation results are based on using TSMC 0.18 µm 1P6M process complementary metal oxide semiconductor technology and supply voltages ±0.9 V to verify the theoretical analysis. Copyright © 2012 John Wiley & Sons, Ltd. 相似文献
17.
George Souliotis Nikos Fragoulis Konstantine Giannakopoulos Dimitris Besiris Evangelos Zigouris 《International Journal of Circuit Theory and Applications》2010,38(4):331-341
A new configurable analogue block (CAB), the key element in the design of field programmable analogue arrays (FPAAs), is introduced in this paper. This CAB is based on wave equivalents of the passive elements and it is easily reconfigurable resulting in very simple and versatile FPAA structures. The proposed topology employs a minimum number of switches in the signal path due to the absence of the interconnection network required in other FPAA structures, and thus an improved performance is achieved in comparison with the already introduced corresponding programmable configurations. Copyright © 2008 John Wiley & Sons, Ltd. 相似文献
18.
Shahram Minaei Muhammed A. Ibrahim 《International Journal of Circuit Theory and Applications》2009,37(7):793-810
In this paper a mixed‐mode (input and output signals can be current or voltage) Kerwin–Huelsman–Newcomb (KHN) biquad with low/high input impedance and high/low output impedance depending on the type of the corresponding signal (current/voltage) is presented. The circuit is constructed using three differential voltage current conveyors (DVCCs), two grounded capacitors and three grounded resistors. The circuit simultaneously provides bandpass (BP), highpass (HP) and lowpass (LP) responses when the output is current and notch, BP and LP responses when the output is voltage. The notch and allpass responses can be obtained by connecting appropriate output currents directly without using additional active elements. Because of the low input and high output impedance of the circuit for current signals and the high input and low output impedance for voltage signals, it can be used in cascade for realizing higher‐order filters. SPICE simulation results are given to verify the theoretical analysis. Copyright © 2008 John Wiley & Sons, Ltd. 相似文献
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Erkan Yuce Shahram Minaei 《International Journal of Circuit Theory and Applications》2008,36(2):161-171
In this letter, two universal current‐mode (CM) filters for simultaneously realizing low‐pass, band‐pass and high‐pass characteristics are proposed. Both of the presented filters can also realize notch and all‐pass responses with interconnection of the relevant output currents. They employ second‐generation current‐controlled conveyors (CCCIIs) and only grounded capacitors. They also have low active and passive element sensitivities along with electronically adjustable angular resonance frequency (ω0) and quality factor (Q). Based on the first developed filter, the parasitic impedance effects of the conveyors on the filter performances are investigated in detail. Simulation results using SPICE simulation program are included to verify the theory. Copyright © 2007 John Wiley & Sons, Ltd. 相似文献