Accurate infrared absorption measurement of interstitial and precipitated oxygen in p+ silicon wafers

A novel infrared absorption method has been developed to measure the interstitial oxygen concentration in highly doped silicon. Thin samples of the order of 10–30 μm are prepared in an essentially stress-free state without changing the state of the crystal. The oxygen concentration is then determined by measuring the height of the 1136-cm⁻¹ absorption peak due to interstitial oxygen at 5.5 K. The obtained results on as-grown samples are compared with those from gas fusion analysis. The precipitated oxygen concentration in annealed samples is also determined with the new method. It will be shown that the interstitial oxygen concentration in highly doped silicon can be determined with high accuracy and down to concentrations of 10¹⁷ cm⁻³.     

Detection of oxygen concentration in silicon wafers using a tunable diode laser

Control of the oxygen concentration in silicon wafers is important for the fabrication of high quality integrated circuits. Techniques for the fast detection of oxygen would be desirable for production line quality control. The oxygen concentration in silicon has traditionally been measured by a Fourier transform infrared spectrometer (FTIS). Due to the slow response time (1-10 min), it is not suitable for wafer screening. In this report, we describe a diode laser spectroscopy technique for the fast (10 ms) detection of oxygen in production line silicon wafers. The results are in good agreement with those measured by the Fourier transform technique.     

Increased oxygen precipitation in CZ silicon wafers covered by polysilicon

Increased oxygen precipitation in CZ silicon wafers covered by a polysilicon layer has been observed after a high temperature anneal. This study established that the low temperature anneal, inherent in the LPCVD polysilicon deposition process, is so responsible for the enhanced oxygen precipitation effect. Temperature-time parameters were developed to match oxygen concentration in the wafer material with preannealing (polysilicon deposition) temperatures to achieve various degrees of oxygen precipitation. Data from this work show that interstitial oxygen reduction (δ C_ox) saturation can be achieved after 100 min oxidation at 1150°C, if the polysilicon deposition temperature is between 670–700°C (150 min for a 1.3 Μm polysilicon layer) and the interstitial oxygen concentration in the wafer is between 22 and 24 ppm. A denuded zone of 20 Μm was obtained and can be observed on a chemically etched cross section. Chemically etched and decorated defects in these samples with various degrees of oxygen precipitation are also displayed in these optical micrographs.     

Minority carrier lifetime and metallic-impurity mapping in silicon wafers

Inadvertent contaminations of silicon wafers during processing steps are simulated by in-diffusion of gold and iron. Impurity concentration mappings are deduced from lifetime scan maps, with a lateral resolution of 50 μm. Such scan maps are obtained by the contactless phase shift technique, when the sample surfaces are passivated by an acqueous solution of polyvidone. The local value of gold or iron concentration are found to be in agreement with concentrations computed from deep-level transient spectroscopy results determined by means of arrays of small metal–semiconductor diodes.     

Temperature measurement of metal-coated silicon wafers bydouble-pass infrared transmission

We report the measurement of the temperature of metal-coated silicon wafers by a double-pass infrared transmission technique. Infrared light incident on the backside of the wafer passes through the wafer, and is re-emitted out the backside after reflecting off the metal surface on the front side of the wafer. The temperature is inferred by the change in the re-emitted signal due to absorption in the wafer. The work has been demonstrated on double-polished wafers from 100°C to 550°C using wavelengths from 1.1 to 1.55 μm. A method for overcoming limitations of the present arrangement for wafers with a rough backside is proposed     

Process-induced distortion in silicon wafers

As the packing density of integrated circuits increases so does the need for increasingly accurate registration between lithographic steps. In-plane wafer distortion between such steps can limit this accuracy depending on the lithographic technique used and on the nature of the distortion. The in-plane distortion of 3-in silicon wafers at different stages of a simulated n-MOS process sequence was measured directly using the Bell Laboratories Electron-Beam Exposure System (EBES). The results indicate that the in-plane wafer distortion was linear (to within the overall EBES reading noise of ± ⅛ µm per axis). The radius of curvature of each wafer was measured independently. The wafer distortion is correlated to the change in curvature induced by the films grown or deposited on the wafer. After these films were removed, the wafers reverted to their original dimensions. Since the wafer diameter is at least two orders of magnitude smaller than the radius of curvature, a linear correction is still a good approximation. Therefore, even though the process-induced changes in vector lengths were as high as 1 µm over 50 mm, the three-point alignment strategy employed by EBES is sufficient to achieve a maximum registration error on the wafers of ¼ µm or less.     

Determination of the oxygen precipitate-free zone width in silicon wafers from surface photovoltage measurements

A procedure has been developed for applying the surface photovoltage technique to the measurement of the width of the oxygen precipitate-free zone present at the surface of a thermally processed, Czochralski-grown silicon wafer. This procedure was developed through the use of a numerical simulation program which models the experimental determination of an effective diffusion lenght, L₀, from surface photovoltage measurements on silicon wafers. The program predicts L₀ for a given precipitate-free zone diffusion length and thickness and bulk diffusion length. Results of the simulations show that for bulk diffusion lengths of 2 μ or less and a precipitate-free zone diffusion length greater than the thickness of the zone, W, the W ≡ 2.5L₀. Experimental results are presented which support the numerical findings.     

Laser scanning tomography: direct evidence of precipitate-free zone at surface of silicon wafers

Silicon wafers are usually thermally processed to generate SiO/sub x/ microprecipitates which play a key role in the intrinsic gettering of the residual metallic atoms and control the device yield and performance. In the latter the authors report the direct imaging of the defect distributions obtained by laser scanning tomography. Typical Si materials were analysed with various levels of oxygen doping and annealing. It is shown that small nucleation sites give rise to a weak background of scattered light, whereas larger clusters appear as bright points. Densities are evaluated down to a level below the minimum etch pits detection limit.<>     

Non-destructive lifetime measurement in silicon wafers by microwave reflection

A non-destructive method for measuring excess carrier lifetime in semiconductor wafers is presented. The method is based on detecting the decay in the microwave reflection following the introduction of excess carriers by a pulsed light source. The theory of measurement has been tested by comparing the lifetime measured by this technique with other more conventional methods and good agreement was found among the values obtained. The method appears to be appropriate for distinguishing wafers with short Defect Free Zone wafers from those of long DFZ.     

Contamination of silicon and oxidized silicon wafers during plasma etching

Neutron activation analysis has been used to study the type and level of contamination of silicon and oxidized silicon wafers exposed to various plasmas used in silicon device processing. Silicon wafers exposed to plasmas in a reactor previously used to remove SiN passivation layers from Au metallized wafers were found to be heavily contaminated with Au (up to ∼10¹⁴ atoms/cm²). Au contamination of oxidized silicon wafers similarly treated was two to three orders of magnitude smaller regardless of whether SiO₂ etched faster or slower than Si in the plasmas used. Wet chemical cleaning of contaminated Si subsequent to plasma exposure was relatively ineffective in removing residual Au. This is interpreted as indicating indiffusion of Au during plasma exposure of Si. Exposure to a polymer forming plasma reduced the level of Au contamination of Si by nearly two orders of magnitude due to effective “sealing” of reactor surfaces by polymer film. Further, the level of contamination of Si was observed to decrease by over two orders of magnitude with usage time of the reactor during a 300-day time period when no Au containing materials were introduced into the reactor.     

Detection of singlet oxygen in photoexcited porous silicon nanocrystals by photoluminescence measurements

Luminescence of gas-phase singlet oxygen optically sensitized by microporous silicon at room temperature is detected for the first time. At the same time, a photoinduced increase in the photoluminescence intensity of defects at the sample surface in oxygen atmosphere is observed. It is shown that mechanical grinding of porous silicon layers yields a decrease in the amount of photogenerated singlet oxygen.     

Infrared spectroscopy of bonded silicon wafers

Infrared spectra of multiple frustrated total internal reflection and transmission for silicon wafers obtained by direct bonding in a wide temperature range (200–1100°C) are studied. Properties of the silicon oxide layer buried at the interface are investigated in relation to the annealing temperature. It is shown that the thickness of the SiO₂ layer increases from 4.5 to 6.0 nm as the annealing temperature is increased. An analysis of the optical-phonon frequencies showed that stresses in the SiO₂ relax as the annealing temperature is increased. A variation in the character of chemical bonds at the interface between silicon wafers bonded at a relatively low temperature (20–400°C) is studied in relation to the chemical treatment of the wafers’ surface prior to bonding. Models of the process of low-temperature bonding after various treatments for chemical activation of the surface are suggested.     

Internal-getter formation in nitrogen-doped dislocation-free silicon wafers

An experimental study is reported concerning the formation of defects in nitrogen-doped dislocation-free silicon wafers under a multistage heat treatment to produce an internal getter, the first stage being rapid thermal annealing (RTA) under different conditions. The experiments are conducted on p-Si(100) wafers of diameter 200 mm with an oxygen content of (6−7) × 10¹⁷ cm⁻³ and a doping level of 1.6 × 10¹⁴ cm⁻³, the resistivity being 10–12 ω cm. The processed wafers are examined by optical microscopy and transmission electron microscopy. With normal conditions of RTA (argon, 1250°C, 20 s), the process is found to be incapable of creating a defect-free subsurface layer of adequate thickness, though it is able to provide the desired system of defects in the bulk. The aim is achieved by changing to sequential RTA in oxygen and argon as the first stage. The reasons for the results are presented.     

Modeling emissivity of rough and textured silicon wafers

A method for calculating the emissivity of Si wafers with planar and nonplanar (such as rough or textured) surface morphologies is described. The technique is similar to that used in modeling of light trapping in solar cells and is also applicable to those cases when the wafer may have thin dielectric or metal layers. A software package is developed that uses this method. This package includes an approach for calculating the refractive index and absorption coefficient as a function of wavelength, for various temperatures and dopant concentrations. We present results for a number of cases to demonstrate the applications of this model.     

Discrimination of particles and defects on silicon wafers

Angle-resolved light scattering measurements of particles and crystal originated particles (COP) point out ways for discriminating different types of defects on Silicon wafers. Particles and COP display a significantly different light-scattering behavior. Comparing the intensity of light scattered into the different solid angles of the two detection channels of the KLA-Tencor SP1 is sufficient for distinguishing particles from other defects. The share of particles identified correctly by SP1 data analysis depends on the defect size and on the wafer material and is >85%.     

X-ray reflectivity of silicon on insulator wafers

The ability of X-ray reflectivity to analyse different silicon on insulator structures is underlined. The standard geometry with first reflection occurring at the surface gives information about the thickness, roughness, and density of the layers. Deeply buried interfaces, i.e. in between thick wafers, are analysed with a non-standard geometry (the first reflection occurs at the buried interface) and with a high-energy radiation. These two methods are, respectively, illustrated by the reflectivity measurements of (SiO₂/Si/SiO₂|bulk Si) and (bulk Si/thermal SiO₂|native SiO₂/bulk Si) bonded structures, and are explained in the framework of kinematic theory of X-ray reflectivity.     

Performance limiting micropipe defects in silicon carbide wafers

Reports on the characteristics of a major defect in mass-produced silicon carbide wafers which severely limits the performance of silicon carbide power devices. Micropipe defects originating in 4H- and 6H-SiC substrates were found to cause pre-avalanche reverse-bias point failures in most epitaxially-grown pn junction devices of 1 mm² or larger in area. Until such defects are significantly reduced from their present density (on the order of 100's of micropipes/cm²), silicon carbide power device ratings will be restricted to around several amps or less     

Fabrication and thermal evaluation of silicon on diamond wafers

Silicon on diamond (SOD) is proposed as a superior alternative to conventional silicon on insulator (SOI) technology for silicon-based electronics. In this paper, we present a novel SOD structure in which the active Si layer is in direct contact with a thick, highly oriented diamond (HOD) layer that is directly attached to a heat sink. In contrast to the earlier work,^1,2 the diamond film is relatively thick (∼70 μm), free standing, and close to single crystalline, thus possessing much greater thermal conductivity and no limitation of the Si backing wafer. Two different fabrication schemes are investigated: (1) direct growth, where the Si-device layer makes contact with the nucleation side of the diamond layer; and (2) wafer fusion, where the Si device layer makes a direct contact with the diamond growth surface. Thermal evaluation was performed using metallic microheaters. These studies clearly showed more than one order of magnitude better thermal management properties of diamond with respect to Si and SOI.     

Uniform precipitation of oxygen in large diameter wafers

In the present stage of development, 300 mm crystals often contain a transition from vacancy-rich to interstitial-rich. Due to this radially varying concentration of intrinsic point defects, the radial size distribution of grown-in oxide precipitate nuclei is also inhomogeneous in these wafers. In order to achieve a radially uniform bulk defect density for internal gettering, a slow temperature ramp induced growth of all grown-in oxide precipitate nuclei is the appropriate procedure to overcome problems resulting from the inhomogeneous size distribution of grown-in nuclei. This approach is based on the observation that in contrast to the nuclei size distribution, the nuclei density distribution is homogeneous over the wafer, independent of the dominant intrinsic point defect.