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本文论述了SDH/SONET技术产生和发展及应用,并从理论上对PDHT和SDH/SONET作了技术比较,此外,还介绍了SDH传输网络结构和SDH传送设备。 相似文献
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5.Z_1字节 MSOH中第1个Z_1字节的后4比特(第5~8比特)用于传送同步状态消息、即指示时钟质量级别。在SDH中已重新命名第1个Z_1字节为S_1,在SONET中也用作同样用途但 相似文献
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掩膜ASICASIC出现于80年代后期至90年代初,顾名思义是为某类整机系统设计和制造的专用IC。ASIC大致可分为:lq阵列电路,标准单元电路,可编译单元电路,可编程逻辑电路(PLD)和全定制电路(FullCustom),其中前四类电路又称为“半定制电路”(Se。icustomICS)。一般而言,“半定制电路”或采用带有基本单元的“母片”(又称“基板”),或采用标准单元库中的标准单元。设计师所关心的只是利用这些标准单元,根据系统的要求来选择布线方案以构筑不同的系统。当然,标准单元的意义已由早期的门、触发器,扩展到当前的微处理器… 相似文献
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在系统设计方面,已到了复杂性程度或所用的芯片数需要对所用技术进行重新评估的时候。就采用低复杂性PLD的设计人员来说,总是把眼光偏向一方,试图确定更加复杂的CPLD是否能用来替代多个复杂性较低的器件,且不放慢系统的速度。在适用的情况下,这种替代方案会缩减系统芯片数和成本,而不会降低系统性能。 CPLD正在开始成为一种用来替代目前仍然由很多设计人员使用的PAL/GAL级PLD的器件。当然,目前有(将来有)很多只用一、二个PLD的场合,从经济角度考虑、几乎没有什么使用CPLD的刺激力量。但是,有更多的系统采用6个以上的快速PLD,这些系统就可能因从PAL/GAL转移到CPLD而受益。用多个PAL/GAL做成的电路所拥有的资源一般要多于必不可少的资源,因为各种功能都是分配给多个芯片。 通过多个互连器件处理信号而增 相似文献
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基于PLD的DSP设计方案Altera公司Caleb Crome数字信号处理(DSP)是集成电路设计中发展最快的领域之一。可编程逻辑器件(PLD)是半导体市场上发展最快的分支,它为那些面对着快速变化标准的DSP设计者们提供了显著的性能提升和缩减设计周... 相似文献
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SDH和SONET是同步传输体制的两种标准,电信部门在设备引入时应注意这两种标准的异同;提供国际业务的公司还可能遇到这两种标准的系统互通问题,为此本刊特邀光纤传输领域的专家邬贺铨先生撰文,从系统速率,复用结构,净荷类型,通道指针,段开锁字节,能通道开销字节,维护告警判据,时钟性能等方面对SDH与SONET进行了比较,指出出了它们的不同之处,最后说明了SDH与SONET互通需注意的问题。 相似文献
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The synchronous digital hierarchy (SDH) arose from a need for a new and single world multiplexing standard which could support switched broadband telecommunication services and for a standard optical interface for use by interexchange carriers. This tutorial paper reviews the features of SDH and outlines its frame structure. Network design and applications are reviewed and the paper concludes with a summary of the advantages of SDH 相似文献
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分析了CERNET免费IP地址及其查询系统,提出了以RedHat7.1的Linux操作系统为网络平台,以PostgreSQL7.0为数据库管理系统,以Apachel.3.12为Web服务器,以PHP4.0.6为CGI脚本程序,设计和开发了对CERNET免费IP地址的解析与查询系统,并在校园网站中得到了应用。 相似文献
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《Communications Magazine, IEEE》1990,28(8):26-33
A perspective is given from the local exchange carrier (LEC) viewpoint on the advantages of deploying SONET (synchronous optical network), the rate at which SONET will be deployed, some typical early applications and architectures, and the role SONET will play in the evolution of the LEC network of the future. The SONET deployment timeline and capabilities are examined. Aspects of SONET architecture are discussed, namely, the access network, the interoffice transport-network, and SONET operations and control. New network capabilities and services and evolution to broadband are considered 相似文献
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《Communications Magazine, IEEE》2006,44(11):106-113
To take full advantage of SONET granularity and DWDM capacity, the two technologies must be combined to enable deployment of the most economic transport networks. The emergence of integrated SONET and DWDM platforms is also part of the effort to build a hybrid network to achieve this objective. It then poses a new challenge to network designers in designing networks mixed with MSPP, ROADM, and integrated platforms. This article provides guidelines on recognizing different types of hybrid networks and how to accomplish the design task by using existing design tools or procedures 相似文献
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摘要:提出了一种新型基于混合积分器的双二阶单元。与基于源极跟随器的双二阶单元采用正反馈综合复数极点相比,本文提出了另一种综合复数极点的机制。提出的双二阶单元采用负反馈结合不同类型积分器综合复数极点,用于设计连续时滤波器。该单元包括许多优点:电路结构简单、高增益、无寄生极点、不需要共模反馈电路和大的驱动能力。在0.18 μm CMOS 工艺上采用提出的双二阶单元实现了一个4阶巴特沃斯低通滤波器。滤波器包括测试缓冲器有源面积仅为200×170µm。提出的滤波器消耗201µW功耗,获得51dB动态范围。 相似文献
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A new mixed-integrator-based bi-quad cell is proposed. An alternative synthesis mechanism of complex poles is proposed compared with source-follower-based bi-quad cells which is designed applying the positive feedback technique. Using the negative feedback technique to combine different integrators, the proposed bi-quad cell synthesizes complex poles for designing a continuous time filter. It exhibits various advantages including compact topology, high gain, no parasitic pole, no CMFB circuit, and high capability. The fourth-order Butterworth lowpass filter using the proposed cells has been fabricated in 0.18 μm CMOS technology. The active area occupied by the filter with test buffer is only 200×170 μm2. The proposed filter consumes a low power of 201 μW and achieves a 68.5 dB dynamic range. 相似文献
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The Advanced Technology Demonstration Network (ATDNet) was established by DARPA to enable increased collaboration among the Department of Defense and other federal agencies. Its primary goal is to serve as an experimental testbed for high-speed network research and defense initiatives with emphasis on ATM an SONET technologies. This article presents an overview of the network infrastructure research that has been performed on ATDNet. Specific areas of focus include network management, signalling, traffic management, supercomputer interconnect, and network testing. The authors present their research activities and results in each of these areas 相似文献
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Sheeshia S. Yang Chen Anand V. Chunming Qiao 《Selected Areas in Communications, IEEE Journal on》2004,22(8):1474-1482
This paper explores the feasibility of deploying optical burst switching (OBS) in metropolitan area networks (MANs) as an alternative to synchronous optical network (SONET), over wavelength-division multiplexing. We present a comparison between two OBS architectures (with centralized and distributed scheduling schemes), SONET, and next-generation SONET (NG-SONET), respectively. We quantify some of the performance metrics such as end-to-end delay and loss rate when supporting Ethernet traffic in metro ring networks. Our simulation results show that OBS offers significant performance improvement over SONET and NG-SONET. In general, the OBS architecture with distributed scheduling has a superior delay performance, whereas the OBS architecture with centralized scheduling has a better loss metric. 相似文献