Characterization of the CH4/H2/Ar high density plasma etching process for ZnSe

High density plasma etching of zinc selenide using CH₄/H₂/Ar plasma chemistries is investigated. Mass spectrometry, using through-the-platen sampling, is used to identify and monitor etch products evolving from the surface during etching. The identifiable primary etch products are Zn, Se, ZnH₂, SeH₂, Zn(CH₃)₂, and Se(CH₃)₂. Their concentrations are monitored as ion and neutral fluxes (both in intensity and composition), ion energy, and substrate temperature are varied. General insights about the surface chemistry mechanisms of the etch process are given from these observations. Regions of process parameter space best suited for moderate rate, anisotropic, and low damage etching of ZnSe are proposed. Code 6752 Code 6174     

Gate metallurgy effects in InAs/AlSb HFETs: Preliminary results and demonstration of surface fermi level shifts

The effect of gate metallurgy on depletion-mode InAs/AlSb heterostructure field-effect transistors (HFETs) is studied for the first time by carefully comparing the characteristics of Al- and Ti/Au-gate transistors. HFETs fabricated simultaneously from the same molecular beam epitaxial layers and processed identically, but differing only in the metal used for the gate electrode, feature very different gate and drain I-V characteristics. The metal dependence indicates that the Fermi level is not completely pinned at the surface of InAs/AlSb quantum wells. We also show that the gate metal modifies the charge control properties of InAs/AlSb HFETs: Al-gate HFETs exhibit an enhanced kink effect accompanied by a marked transconductance compression at zero gate bias, whereas the Ti/Au-gate devices exhibit nearly kink-free drain characteristics. The gate metal dependence is shown to be a consequence of the increased channel equilibrium electron concentration accompanying the Al-metallization.     

Textured silicon surface passivation by high‐rate expanding thermal plasma deposited SiN and thermal SiO2/SiN stacks for crystalline silicon solar cells

Expanding thermal plasma (ETP) deposited silicon nitride (SiN) with optical properties suited for the use as antireflection coating (ARC) on silicon solar cells has been used as passivation layer on textured monocrystalline silicon wafers. The surface passivation behavior of these high‐rate (>5 nm/s) deposited SiN films has been investigated for single layer passivation schemes and for thermal SiO₂/SiN stack systems before and after a thermal treatment that is normally used for contact‐firing. It is shown that as‐deposited ETP SiN used as a single passivation layer almost matches the performance of a thermal oxide. Furthermore, the SiN passivation behavior improves after a contact‐firing step, while the thermal oxide passivation degrades which makes ETP SiN a better alternative for single passivation layer schemes in combination with a contact‐firing step. Moreover, using the ETP SiN as a part of a thermal SiO₂/SiN stack proves to be the best alternative by realizing very low dark saturation current densities of <20 fA/cm² on textured solar‐grade FZ silicon wafers and this is further improved to <10 fA/cm² after the anneal step. Optical and electrical film characterizations have also been carried out on these SiN layers in order to study the behavior of the SiN before and after the thermal treatment. Copyright © 2008 John Wiley & Sons, Ltd.     

Role of interface chemistry and growing surface stoichiometry on the generation of stacking faults in ZnSe/GaAs

The existence of Zn-As and vacancy-contained Ga-Se interfacial layers are suggested by transmission electron microscopy of Zn-and Se-exposed (or - reacted) ZnSe/GaAs interfaces, respectively. A very low density of faulted defects in the range of ∼10⁴cm² was obtained in samples with Zn passivation on an Asstabilized GaAs-(2 × 4). However, the density of As precipitates increases as the surface coverage of c(4 × 4) reconstruction increased on the Zn-exposed Asstabilized GaAs-(2 × 4) surface and this is associated with an increase of the density of extrinsic-type stacking faults bound by partial edge dislocations with a core structure terminated on additional cations. On the other hand, densities of extrinsic Shockley-and intrinsic Frank-type stacking faults are of ∼5 × 10⁷/cm² in samples grown on Se-exposed Ga-rich GaAs-(4 × 6) surfaces. Annealing on this Se-exposed Ga-rich GaAs-(4 × 6) generated a high density of vacancy loops (1 × 10⁹/cm²) and an increase of the densities of both Shockley-and Frank-type stacking faults (>5 × 10⁸/cm²) after the growth of the films. Furthermore, we have studied the dependence of the generation and structure of Shockley-type stacking faults on the beam flux ratios in samples grown on Zn-exposed As-stabilized GaAs-(2 × 4) surfaces. Cation-and anion-terminated extrinsic-type partial edge dislocations were generated in samples grown under Zn-and Se-rich conditions, respectively. However, an asymmetric distribution on defect density under varied beam flux ratios (0.3 ≤ P_Se/P_Zn ≤ 10) is obtained.     

GaAs半导体表面的S-N混合等离子体钝化及在激光器工艺上的应用

利用射频(RF)等离子方法,对GaAs半导体表面进行 了S-N混合等离子体钝化实验,并对工作压强、RF 功率进行了优化。光致发光(PL)测试结果表明,经过S-N混合等离子体钝化的GaAs样品PL 强度提高135%。将本文 钝化方法应用到980nm波长InGaAs应变量子阱(QW)激光器的制备工艺 ,器件的COD阈值功率明显增加。     

Analysis of high temperature effects on performances and hot-carrier degradation in DC/AC stressed 0.35 μm n-MOSFETs

The transistor performances and hot-carrier reliability in n-MOSFETs are investigated at high temperature in the range 25–125 °C. A careful analysis of the temperature dependence of the device parameters shows that transistor performances are significantly reduced and that the Fermi potential, the mobility and current reductions, contribute to decrease the device sensitivity to the hot-carrier damage at high temperature. Different degradation behaviors are found between DC and AC stressing depending on the degradation mechanisms i.e. whether the interface trap generation or oxide charge trapping dominates which consequently exhibits a strong temperature dependence through their magnitude and localization. It is pointed out that the reduction of the ionization rate significantly impacts the degradation behaviors at elevated temperature. Even if the amount of generated damage is slightly larger than what effectively influences the transistor characteristics, the parameter insensitivity to given at high temperature improves the transistor reliability. This improvement is determined in the value of the device lifetime at 125 and 70 °C using inverter and pass transistor operations in a 0.35 μm LDD complementary metal-oxide semiconductor (CMOS) technology suitable for 3.3 V operation.     

高厚径比板湿制程主要失效模式及预防控制

高层次、高厚径比板具有较高的附加值,现已成为我公司主要制作产品之一。文章主要是简述此类型板在我公司湿制程过程中出现的一些异于其它普通板的失效模式及其预防控制方式。     

利用CH4/H2/Ar及Cl2高密度等离子体对InSb的高速率刻蚀研究（英文）

利用感应耦合等离子体(ICP)进行了InSb刻蚀研究。为了实现高的刻蚀速率同时保证光滑的刻蚀表面,研究中在CH4/H2/Ar气氛中引入了Cl2。研究发现,对InSb的刻蚀速率随Cl2含量及ICP功率的升高而线性增加。当Cl2含量增加到超过12%或ICP功率大于900 W时,刻蚀表面变得粗糙,而易引起刻蚀损伤的直流偏压随ICP功率的升高而降低。此现象归因于刻蚀副产物InCl3在样品表面的聚集进而妨碍均匀刻蚀反应所致。当样品温度从20℃提高到120℃,刻蚀速率及表面粗糙度无明显变化。通过试验研究,实现了对InSb的高速率、高垂直度刻蚀,刻蚀速率大于500 nm/min,对SiO2掩模刻蚀选择比大于6,刻蚀表面光洁,刻蚀垂直度可达80°。     

Percolation and excitonic luminescence in SiO<Subscript>2</Subscript>/ZnO two-phase structures with a high density of quantum dots randomly distributed over a spherical surface

The results of studies of structures formed of silica (SiO₂) nanospheres and ZnO quantum dots randomly distributed over the nanosphere surface to cover an ∼0.45 fraction of the surface area are given. Because of the large surface energy of the spheres, the quantum dots formed on their surface are shaped as disks, wherein charge carriers are influenced by the quantum-confinement effect despite the large disk radii. The disk height is calculated by the effective mass method. The height is found to be comparable with the diameter of excitons in bulk ZnO. Analysis of the optical spectra shows that, at the above-indicated surface area covered with quantum dots, excitons in the array of quantum dots are above the percolation level. The use of some concepts of the percolation theory and knowledge of the topological arrangement of the samples make it possible to obtain quantitative parameters that describe this phenomenon.