一种ASK接收器中的中频对数放大器IC设计

一种适用于ASK接收器中的双极型对数中频放大器,具有接收信号强度指示的功能(RSSI)。这种放大器实现了对数响应的分段近似,同时作为信号解调的一部分。本文介绍了RSSI特殊的具体电路及其结构。该放大器包含五级放大,每一个放大级都由一个限幅放大器和跨导单元组成。此放大器在±1dB的线性度下实现了90dB的动态范围。     

应用于4G-LTE无线通信系统的F类高PAE射频功率放大器

为了有效实现高谐波抑制并提高功率附加效率,提出了一种适用于4G-LTE无线通信系统的高效F类功率放大器。该功率放大器使用了低电压p-HEMT晶体管和小型微带抑制单元,能够在低射频输入功率下产生n次谐波抑制和较高的功率附加效率（power added efficiency,PAE）。采用谐波平衡法对提出的功率放大器进行了仿真分析,并对其进行了实际制造。通过实际测量对仿真结果进行了验证。测量结果显示,提出功率放大器的工作频率为1.8 GHz,带宽为100 MHz,平均PAE为76.9％,且具有2V的极低漏极电压。射频输入功率范围分别为0-12 dBm时,最大输出功率和增益分别为23.4和17.5 dBm。     

一种宽输入动态范围跨阻放大器的设计

利用对数放大的增益可变性特点,设计出基于对数放大的跨阻放大器,克服了采用传统AGC调整跨阻的复杂性和低可靠性;同时,避免了采用肖特基二极管箝位方法的工艺局限性,有效扩展了跨阻放大器的输入动态范围。在详细分析跨阻动态特性及温度特性的基础上,分析了电路噪声性能,并进行了仿真验证。试验样片的测试结果进一步证明所提出的方法是有效的。     

基于高性能升压转换器的跨导误差放大器

在分析峰值电流模式升压转换器原理的基础上,设计了一种结构新颖,高精度高性能跨导误差放大器。提出了将具有动态电流自补偿功能的基准电压电路复用为误差放大器输入级的新方法,克服了传统外接基准电压时误差放大器易受干扰和基准电路设计复杂的缺点,提高了误差信号精度和放大器跨导。设计了输出电阻可调电路,简化了补偿网络设计。电路用0.6μmBiCMOS工艺实现,测试表明:3V输入电压,1.2MHz工作频率下,误差放大器开环电压增益57dB,跨导322μS,输入偏置电流小于50nA;升压转换器输出电压15V,输出纹波小于5mV。     

An analog/digital pre-distorter using particle swarm optimization for RF power amplifiers

In this paper, a novel pre-distorter is presented using the particle swarm optimization (PSO) for an RF power amplifier linearization has been presented. We used the PSO in order to design of an efficient pre-distorter for the linearization of the output of an RF power amplifier by using the output data of the proposed power amplifier. The PSO is implemented to estimate and optimize the coefficient parameters of the work function in the proposed pre-distorter block diagram. The proposed method using PSO is most efficient because this approach is independent of the output of the power amplifier. The proposed method has been simulated with two-tone input signal and output power spectrum has been compared, where the obtained adjacent channel leakage ration (ACLR) is better than 50 dBc for both channels. Therefore, a quite significant improvement in linearity is achieved.     

A 0.02% THD and 80 dB PSRR filterless class D amplifier with direct lithium battery hookup in mobile application

This paper presents a fully integrated CMOS filterless class D amplifier that can directly hook up lithium battery in mobile application The proposed amplifier embodies a 2-order feedback path architecture instead of direct feedback of output to input of the integrator to decrease the high frequency intermodulation distortion associated with direct feedback and eliminate the integrator input common mode disturbance from the output in ternary modulation. The prototype class D amplifier realized in 0.35μm digital technology achieves a THD+N of 0.02% when delivering 400 mW to an 8Ω load from V_DD=3.6 V. The PSRR of the prototype class D amplifier is 80 dB at 217 Hz. Furthermore a filterless method that can eliminate the external LC filter is employed which offers great advantages of saving PCB space and lowering system cost. In addition the prototype class D amplifier can operate in large voltage range with V_DD range from 2.5 to 4.2 V in mobile application. The total area of the amplifier is 1.7 mm².     

GPS接收机低噪声放大器设计

选用噪声系数较低的Agilent E-PHEMT ATF-54143晶体管,采用集总元件网络匹配方法,设计实现了一种GPS接收机前端低噪声放大器。通过运用Agilent公司的微波软件ADS进行设计、仿真和优化,在PTFE基板上制作实现了该放大器。实测结果显示,在1 520～1 600 MHz工作频带内,噪声系数<05 dB,小信号增益>16 dB,输入驻波比<2,输出驻波比<15。     

差分放大电路单端输入信号的射极耦合传输及等效变换

用电路分析的方法对差分放大电路单端输入信号的射极耦合传输及等效变换进行了深入研究,目的是探索单端输入差分放大电路中输入信号的作用过程。差分放大电路的单端输入信号,经差分管的发射极耦合传输,在输入回路可等效变换为差模输入信号、共模输入信号的叠加,且等效变换时与发射极电阻Re取值大小无关,Re取值大小反映了对共模输入信号的抑制程度。所述方法的创新点是给出了单端输入信号在输入回路作用下的物理过程,完善了单端输入信号的等效变换方法。     

一种采用共栅频率补偿的轨到轨输入/输出放大器

提出了一种采用共栅频率补偿的轨到轨输入/输出放大器,与传统的Miller补偿相比,该放大器不仅可以消除相平面右边的低频零点,减少频率补偿所需要的电容,还可获得较高的单位增益带宽.所提出的放大器通过CSMC 0.6μm CMOS数模混合工艺进行了仿真设计和流片测试:当供电电压为5V,偏置电流为20μA,负载电容为10pF时,其功耗为1.34mW,单位增益带宽为25MHz;当该放大器作为缓冲器,供电电压为3V,负载电容为150pF,输入2.66 Vpp10kHz正弦信号时,总谐波失真THD为-51.6dB.     

低压工作的轨到轨输入／输出缓冲级放大器

本文提出了一种低压工作的轨到轨输入／输出缓冲级放大器。利用电阻产生的输入共模电平移动,该放大器可以在低于传统轨到轨输入级所限制的最小电压下工作,并在整个输入共模电压范围内获得恒定的输入跨导;它的输出级由电流镜驱动,实现了轨到轨电压输出,具有较强的负载驱动能力。该放大器在CSMCO．6-μmCMOS数模混合工艺下进行了HSPICE仿真和流片测试,结果表明：当供电电压为5V,偏置电流为60uA,负载电容为10pF时,开环增益为87．7dB,功耗为579uw,单位增益带宽为3．3MHz;当该放大器作为缓冲级时,输入3VPP10kHz正弦信号,总谐波失真THD为53．2dB。     

A Discrete‐Amplitude Pulse Width Modulation for a High‐Efficiency Linear Power Amplifier

A new discrete‐amplitude pulse width modulation (DAPWM) scheme for a high‐efficiency linear power amplifier is proposed. A radio frequency (RF) input signal is divided into an envelope and a phase modulated carrier. The low‐frequency envelope is modulated so that it can be represented by a pulse whose area is proportional to its amplitude. The modulated pulse has at least two different pulse amplitude levels in order that the duty ratios of the pulse are kept large for small input. Then, an RF pulse train is generated by mixing the modulated envelope with the phase modulated carrier. The RF pulse train is amplified by a switching‐mode power amplifier, and the original RF input signal is restored by a band pass filter. Because duty ratios of the RF pulse train are kept large in spite of a small input envelope, the DAPWM technique can reduce loss from harmonic components. Furthermore, it reduces filtering efforts required to suppress harmonic components. Simulations show that the overall efficiency of the pulsed power amplifier with DAPWM is about 60.3% for a mobile WiMax signal. This is approximately a 73% increase compared to a pulsed power amplifier with PWM.     

Electronically tunable current-mode instrumentation amplifier with high CMRR and wide bandwidth

A current-mode instrumentation amplifier consists of only two current follower differential input transconductance amplifiers is proposed in this paper. The proposed circuit of instrumentation amplifier is realized without using any passive components. Thus, the proposed circuit structure is very simple and suitable to the integrated circuit technology. The input impedance is low and output impedance is high, therefore the proposed circuit is easily cascadable. The gain of the proposed instrumentation amplifier is electronically controllable. The proposed circuit also enjoys the features of high common mode rejection ratio, wide bandwidth and low power consumption. Additionally, performance of the proposed circuit is tested under process, supply voltage and temperature variations. Furthermore, another circuit of instrumentation amplifier, which is capable of providing higher differential mode gain is also shown. The non-ideal and parasitic studies are included. HSPICE simulations are performed to validate the proposed circuits of instrumentation amplifier.     

防破音D类音频功放的设计与应用

随着多媒体便携设备的普及,音频功放已经成为音频部分的标准配置,D类功放以其高品质高效的特点得到了越来越广泛的应用。在便携产品中,音频功放由于输入音乐信号过大或者电源电压过低,会产生削顶失真。采用防破音技术,可以通过自动增益调节技术来提供一个完美的解决方案。文章介绍了常见的防破音技术,提出了一种改进的AGC(自动增益控制)技术在D类功放中的设计与应用。改进的AGC技术通过对PWM输出的采样来判断失真程度,依据失真程度用防破音电路产生的PWM波形来自动调节运放增益,实现最大功率的无失真输出。     

拉曼+EDFA宽带混合光放大器的实现和设计优化

基于对增益和噪声特性的分析,本文实现了长距离宽带传输系统中由分布拉曼放大器和掺铒光纤放大器中组成的宽带混合放大单元,并提出了混合放大器进行优化设计的方法,特别指出适当调整拉曼放大器和掺铒光纤放大器的增益谱可以实现噪声谱的平坦.     

基于锁相放大器的光纤电流互感器研究

为了测试光纤电流互感器中由于Faraday效应引起的旋转量,提出了采用锁相放大器处理信号的方法,改进了传统的将交流成分与直流成分相除的方法。系统将采集信号做单端电压输入测试和差分电压输入测试,并比较了单端输入与差分输入的测试效果,定性分析了输出幅值与被测电流的关系。测试结果表明,锁相放大器输出幅值与被测电流具有线l陛关系,且差分输入较单端输入幅值大、线性度好、对外界干扰抑制性强。其成果为进一步研究基于旋光效应的光纤电流互感器的应用奠定了基础。     

数字音频D类功放电源误差校正方法研究

为了实时校正供电电源噪声引起的数字音频D类功放输出误差,提出一种基于FPGA的电源误差校正方法。使用高精度ADC芯片将电源纹波信号转化为数字量后送入FPGA,校正模块根据电源纹波的大小对数字音频D类功放Sigma-Delta调制器输入值进行预校正处理,从而实现在功放输出端有效的抑制电源噪声。经过实际电路测试,该方法可以有效的抑制电源噪声对数字音频D类功放的影响,电源抑制比达到36.78 dB。     

10bit 20MS/s流水线模数转换器设计

设计了一个20MHz采样率,10bit精度流水线模数转换器。采用新颖的栅压自举开关,使电路在输入信号频率很高时仍具有良好的动态性能;用MATLAB仿真增益增强型运算放大器在不同反馈因子下闭环零、极点特性,提出了使大信号建立时间最短的主运放、辅助运放单位增益带宽和相位裕度范围。采用SMIC0.35μm2P4M工艺流片验证,20MHz采样率,2.1MHz输入信号下,SFDR=73dBc,ENOB=9.18bit。     

一种新型低噪声掺Er光纤放大器的研究

提出了一种新型的低噪声掺Er光纤放大器(EDFA)。将光波长交错器的输入端口与普通EDFA的输出端相连接,用于降低噪声,信号光由光波长交错器的偶信道端口输出。利用光波长交错器的梳状反射特性,抑制EDFA的放大自发辐射(ASE),改善EDFA的噪声特性,使其具有低噪声的特点。采用4m长的掺Er光纤(EDF)作为增益介质,小信号功率为-26dBm时,在1530～1560nm带宽范围内,测得低噪声EDFA的噪声系数低于3.83dB,仅比噪声系数的量子极限3dB大0.83dB。     

一种微功耗轨到轨输出AB类运算放大器设计

在分析研究AB类运算放大器的输入和输出级构成原理基础上,提出一种与信号处理模块的输出端匹配并具有一定负载能力的缓冲器的设计。缓冲器采用了AB类运放结构,其输入级采用折叠式共射共基结构,输出级分别采用PNP管和NMOS管作为上拉管和下拉管,结合电路结构的改进使之具有轨到轨(rail-to-rail)的输出特性和很低的静态电流。设计的电路具有开环增益大、静态功耗小、带宽较高等特点。此运放已在1.5μmBCD工艺下实现。测试结果表明,静态电流仅为8.5μA,闭环带宽达200kHz,开环增益为100dB。     

A low-powerlow-voltage slew-rate enhancement circuit for two-stage operational amplifiers

正A novel circuit is presented in order to enhance the slew rate of two-stage operational amplifiers.The enhancer utilizes the class-AB input stage to improve current efficiency,while it works on an open loop with regard to the enhanced amplifier so that it has no effect on the stability of the amplifier.During the slewing period,the enhancer detects input differential voltage of the amplifier,and produces external enhancement currents for the amplifier,driving load capacitors to charge/discharge faster.Simulation results show that,fora large input step,the enhancerreduces settling time by nearly 50%.When the circuit is employed in a sample-and-hold circuit,it greatly improves the spur-free dynamic range by 44.6 dB and the total harmonic distortion by 43.9 dB.The proposed circuit is very suitable to operate under a low voltage(1.2 V or below) with a standby current of 200μA.