A 40-Gb/s Self-Clocked Bidirectional Serial/Parallel Converter for Asynchronous Label Swapping

A novel scheme for self-clocked bidirectional serial/parallel conversion is proposed with an optically clocked transistor array (OCTA). As a result of its internal clock generation, serial-to-parallel (SP) and parallel-to-serial (PS) conversion capability, the OCTA alone realizes a single-chip low-power interface between input-output high-speed asynchronous burst optical packets and complimentary metal-oxide-semiconductor electronics, thus enabling a compact low-power solution for label swapping of optical packets. An eight-channel OCTA demonstrates self-clocked SP and PS conversion at 40 Gb/s     

An optically clocked transistor array with dual serial-to-parallel and parallel-to-serial conversion capability for optical label swapping

We propose an optically clocked transistor array optoelectronic integrated circuit (OEIC) for both serial-to-parallel and parallel-to-serial conversion (demux/mux), enabling an interface between high-speed asynchronous burst optical labels and CMOS circuitry for optical label swapping. Dual functionality of the OEIC reduces size, power, and cost of the optical label swapper. The capability for greater than 20-Gb/s conversion operation is demonstrated.     

Payload-envelope detection and label-detection integrated photonic circuit for asynchronous variable-length optical-packet switching with 40-gb/s RZ payloads and 10-gb/s NRZ labels

A photonic integrated circuit that performs 40-Gb/s payload-envelope detection (PED) and 10-Gb/s label detection for asynchronous variable-length optical-packet switching is demonstrated. The circuit consists of an InP photonic integrated device combined with electronic GaAs and InP devices on a carrier. Asynchronous variable-length optical packets with 40-Gb/s return-to-zero (RZ) payloads and 10-Gb/s non-RZ (NRZ) labels are processed by the circuit. The circuit outputs a PED electrical signal that represents the temporal location of the payload and a 10-Gb/s electrical signal representing the optical label. The optical label is detected error free. The PED signal has a rise/fall time of 3-ns and 150-ps jitter. The PED signal was also used to erase and rewrite the optical labels error free.     

All-Optical Asynchronous Serial-to-Parallel Converter Circuit for DPSK Optical Packets

We propose a novel asynchronous all-optical circuit for extraction and serial-to-parallel conversion of label bits from differential phase-shift keying (DPSK) packets. The circuit requires only two optical switches regardless of the number of bits to be extracted and parallelized from the packet. Experimental evidence of practical use of the circuit to four bit labels at 10 Gb/s is provided. The circuit is scalable with the number of bits, operates at low input power, and is suitable for photonic integration. The asynchronous nature of the circuit allows us to efficiently extract/read one specific label field of variable length without processing the entire label, leading to a simplified architecture of the label processing circuit     

Ultrafast all-optical pattern matching using differential spin excitation and its application to bypass/drop self-routing for asynchronous optical packets

This paper presents a novel scheme for ultrafast all-optical pattern matching using the differential spin excitation in semiconductor multiple quantum wells (MQWs). In a demonstration of an all-optical pattern matching between two 100-Gb/s 16-bit optical packets, the contrast ratio of the photodiode (PD) output from the pattern matcher, between the pattern matched and the pattern-unmatched cases, was more than four for packets with a 2-dB power fluctuation. As an application of the pattern matcher to optical-packet-switched ring networks, bypass/drop self-routing is demonstrated for asynchronous 100-Gb/s 32-bit optical packets with 8-bit labels. In the experiment, a label of an incoming packet was compared to a local address (LA) given to a node in the optical domain. By changing the pattern of the LA packet instead of that of the incoming packet, the pattern matching was carried out for packets with various kinds of patterns. The contrast ratio of the PD output was more than six for all patterns.     

Simultaneous Data Regeneration and Digital Label Swapping in an SOA-MZI Device

We demonstrate all-optical regeneration of a 10-Gb/s data stream, with bit-error-rate improvement, simultaneously with digital label swapping, in a monolithically integrated semiconductor optical amplifier Mach–Zehnder interferometer device.      

On-the-Fly All-Optical Contention Resolution for NRZ and RZ Data Formats Using Packet Envelope Detection and Integrated Optical Switches

We present a packet-by-packet contention resolution scheme that combines packet detection, optical space switching, and wavelength conversion performed in the optical domain by integrated optical switches. The packet detection circuit provides the control signals required to deflect and wavelength-convert the contending packets so that all the packets are forwarded to the same output without any collision or packet droppings. We demonstrate the compatibility of the scheme with both nonreturn-to-zero (NRZ) and return-to-zero (RZ) modulation formats by recording error-free operation for 10-Gb/s NRZ and 40-Gb/s RZ packet-mode traffic     

Optical-signal-processing device based on waveguide-type variable delay lines and optical gates

In this paper, an optical-signal-processing device mainly designed for time-slot switching is demonstrated. The device is composed of variable delay-line arrays fabricated by planar lightwave circuit technology and high-speed optical gates. The variable delay-line arrays consist of transversal-form or lattice-form optical circuits. The operating principle is based on serial-to-parallel conversion, adjustment of the delay time between the parallel signals, and the gating of the optical bits or packets in the optical region. The device does not require any interaction between lightwaves through optical nonlinear effects or filter banks for code matching. As an example of its operation, label-processing functions are demonstrated, specifically the label swapping of optical return-to-zero pulses. The merits of the proposed device are described and problems that must be solved are also discussed.     

Optical clock-pulse-train generator for processing preamble-free asynchronous optical packets

An optical clock-pulse-train generator (OCPTG) for processing asynchronous arbitrary-length optical packets with no preamble is developed. The OCPTG consists of a fiber-loop-based optical pulse-train generator (PTG) and an optical clock-pulse generator that, for every input asynchronous optical packet, generates a single, synchronized optical pulse which is fed to the PTG. Generation of an optical clock-pulse-train with stable pulse energy, precise repetition rate, and duration matching the input packet is achieved for variable-length optical packets. The OCPTG and an all-optical demultiplexer combined demonstrate error-free demultiplexing of a 10-Gb/s asynchronous optical packet stream.     

Optical Phase Add–Drop for Format Conversion Between DQPSK and DPSK and its Application in Optical Label Switching Systems

We propose and experimentally demonstrate an optical phase “add–drop” scheme to enable the format conversion between a 20-Gb/s differential quadrature phase-shift keying (DQPSK) and 10-Gb/s differential phase-shift keying. Meanwhile, the incoming DQPSK could be directly forwarded to another wavelength through the proposed optical phase “drop” scheme, which is implemented by four-wave-mixing effect in highly nonlinear fiber. By orthogonally encoding the label and payload of the optical packet on the in-phase ( $I$) and quadrature ( $ Q $) components of DQPSK, the proposed scheme could be applied in the optical label switching networks. The label erasing and rewriting of optical packets can be achieved through the proposed optical phase “drop” and “add” schemes, respectively.      

All-Optical Label/Payload Separation at 40 Gb/s

We demonstrate an all-optical label/payload separation circuit implemented with hybridly integrated semiconductor-optical-amplifier-based Mach–Zehnder switches. It is shown to operate error-free with 40-Gb/s variable length data packets containing$2 ^7-1$pseudorandom bit sequence and short guardbands between them. The circuit requires only the data packets as input and its complexity does not increase with label length.     

160 Gb/s variable length packet/10 Gb/s-label all-optical label switching with wavelength conversion and unicast/multicast operation

We report on the first demonstration of all-optical label switching (AOLS) with 160 Gb/s variable length packets and 10 Gb/s optical labels. This result demonstrates the transparency of AOLS techniques from previously demonstrated 2.5 Gb/s to this 160 Gb/s demonstration using a common routing and packet lookup framework. Packet forwarding/conversion, optical label erasure/re-write and signal regeneration at 160 Gb/s is achieved using a WDM Raman enhanced all-optical fiber cross-phase modulation wavelength converter. It is also experimentally shown that this technique enables packet unicast and multicast operation at 160 Gb/s. The packet bit-error-rate is measured for all optical label switched 16 /spl times/ 10 Gb/s channels and error free operation is demonstrated after both label swapping and packet forwarding.     

40-Gb/s 3R Burst Mode Regenerator Using Four Integrated MZI Switches

We demonstrate an all-optical 3R burst mode regenerator operating error-free with 40-Gb/s data packets. It is comprised of a sequence of four hybridly integrated semiconductor optical amplifier Mach-Zehnder interferometric switches and is shown to operate with short, variable length and asynchronous data packets, with a dynamic range of 9.3 dB     

A novel all-optical label swapping based on RZ-DQPSK/IRZ-ASK combined modulation format

A novel all-optical label swapping based on optical return zero (RZ) differential quadrature phase shifted keying/inverse return zero amplitude shifted keying (RZ-DQPSK/IRZ-ASK) combined modulation format scheme is investigated and analyzed theoretically. Internet protocol (IP) packets can be efficiently labeled and processed using this proposed scheme. Numerical simulation is taken to demonstrate the transmission characteristic of the all-optical label swapping based on RZ-DQPSK/IRZ-ASK modulation format. The transmission performance can be affected by the duty cycle of the IRZ pulse, the IRZ-ASK label extinction ratio, the dispersion compensation ratio, received optical power and the coupling coefficient of the coupler. Results show that the IRZ-ASK label extinction ratio is almost infinite and preferable performance is obtained. The proposed scheme is a practical solution to meet the data rate and cost-efficient of the optical links simultaneously in tomorrow's all-optical label swapping.     

All-Optical 3R Burst-Mode Reception at 40 Gb/s Using Four Integrated MZI Switches

We demonstrate an all-optical retime, reshape, reamplify (3R) burst-mode receiver (BMR) operating error-free with a 40-Gb/s variable-length asynchronous optical data packets that exhibit up to 9-dB packet-to-packet power variation. The circuit is completely based upon hybrid integrated Mach-Zehnder interferometric (MZI) switches as it employs four cascaded MZIs, each one performing a different functionality. The 3R burst-mode reception is achieved with the combination of two discrete all-optical subsystems. A reshape, reamplify BMR employing a single MZI is used first to perform power equalization of the incoming bursts and provide error-free data reception. This novel approach is experimentally demonstrated to operate error-free, even for a 9-dB dynamic range of power variation between bursty data packets and for a wide range of average input power. The obtained power-equalized data packets are then fed into a 3R regenerator to improve the signal quality by reducing the phase and amplitude jitter of the incoming data. This packet-mode 3R regenerator employs three MZIs that perform wavelength conversion, clock extraction, and data regeneration for every packet separately and operates at 40 Gb/s, exhibiting rms timing jitter reduction from 4 ps at the input to 1 ps at the output and a power penalty improvement of 2.5 dB     

All-optical payload envelope detection for variable length 40-gb/s optically labeled packets

We demonstrate a new technique to all-optically identify the precise temporal locations and durations of the payloads of optical packets consisting of a variable length 40-Gb/s return-to-zero payload and 10-Gb/s nonreturn-to-zero label. The all-optically generated payload envelope signal can be used to erase the original optical label and rewrite a new label. The recovered payload envelope has 300-ps rise time and edge root-mean-square average jitter of 30 ps over a 10-dB dynamic range of input optical packet power. These numbers indicate that this technique enables the use of very short guard bands between payloads. The technique is demonstrated using optical semiconductor devices that are straightforward to monolithically integrate on a single chip.     

10- and 40-Gb/s forward error correction devices for optical communications

Two standard forward error correction (FEC) devices for 10- and 40-Gb/s optical systems are presented. The first FEC device includes RS(255, 239) FEC, BCH(4359, 4320) FEC, and standard compliant framing and performance monitoring functions. It can support a single 10-Gb/s channel or four asynchronous 2.5-Gb/s channels. The second FEC device implements RS(255, 239) FEC at a data rate of 40 Gb/s. This paper presents the key ideas applied to the design of Reed-Solomon (RS) decoder blocks in these devices, especially those for achieving high throughput and reducing complexity and power. Implemented in a 1.5-V, 0.16-/spl mu/m CMOS technology, the RS decoder in the 10-Gb/s, quad 2.5-Gb/s device has a core gate count of 424 K and consumes 343 mW; the 40-Gb/s RS decoder has a core gate count of 364 K and an estimated power consumption of 360 mW. The 40-Gb/s RS FEC is the highest throughput implementation reported to date.     

Wide Dynamic Range All-Optical Clock and Data Recovery From Preamble-Free NRZ-DPSK Packets

We demonstrate an all-optical circuit that simultaneously performs packet-by-packet clock recovery (CR) and data demodulation from 10-Gb/s nonreturn-to-zero differential-phase-shift-keying packets. It includes a novel power equalizer based on a nonlinear self-polarization switch in a semiconductor optical amplifier that enables operations within 15-dB input power level fluctuations. Data demodulation is realized by a Gaussian narrow filter that simultaneously seeds a stage performing CR. CR is performed by a Fabry-Peacuterot filter-based circuit. By using the input packets as a gating signal, the circuit is able to extract clock packets with 0-bit rise and fall times. The circuit can operate asynchronously and with arbitrary packet length     

On intranode impairments and engineering rules for an optical label switching router supporting an FSK/IM labeling scheme

This paper presents a study on intranode impairments and engineering rules for a label switching router supporting intensity modulated (IM) optical payload data signals labeled by using frequency-shift key (FSK) modulation. Engineering rules and design guidelines are presented regarding the choice of system parameters such as IM extinction ratio, FSK frequency deviation, alignment of optical filtering stages, label swapping, and node cascadability. The presented rules are derived from insights obtained from computer simulations and experimental validation for a 10-Gb/s IM payload signal.     

Experimental characteristics of optical crosspoint switch matrix and its applications in optical packet switching

This paper presents the experimental results of the switching performances of the fast reconfigurable optical crosspoint switch (OXS) matrix. This paper demonstrates unicast optical packet switching for a 10-Gb/s payload at various modulation formats and a 155-Mb/s nonreturn-to-zero label. Reconfigurable time as fast as 2 ns is achieved because of the optimized control circuit and device fabrication. The power and wavelength dependence for the payload and the capability of multihop operation are investigated as well. The functionalities of the OXS acting as an optical switch and an optical buffer are demonstrated in the optical network node experiment. Very good switching property is obtained for the OXS, which clearly validates OXS as a potential technique for future high-speed Internet-protocol-over-wavelength-division-multiplexing networks.