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1.
In this paper, electrical and interfacial properties of MOS capacitors with atomic layer deposited (ALD) Al2O3, HfO2, and HfAlO gate dielectrics on sulfur-passivated (S-passivated) GaAs substrates were investigated. HfAlO on p-type GaAs has shown superior electrical properties over Al2O3 or HfO2 on GaAs, and it is attributed to the reduction of the Ga-O formation at the interfacial layer. HfAlO on p-type GaAs exhibits the best electrical properties after postdeposition annealing (PDA) at 500degC. It is found that PDA, at above 500degC, causes a significant amount of Ga and As out-diffusion into the high-k dielectric, which degrades the interface, as well as bulk high-k properties.  相似文献   

2.
In this letter, the inter-poly dielectric (IPD) thickness, scaling, and reliability characteristics of Al2O3 and HfO2 IPDs are studied, which are then compared with conventional oxide/nitride/oxide (ONO) IPD. Regardless of deposition tools, drastic leakage current reduction and reliability improvement have been demonstrated by replacing ONO IPD with high-permittivity (high-kappa) IPDs, which is suitable for mass production applications in the future. Moreover, metal-organic chemical vapor deposition (MOCVD) can be used to further promote dielectric reliability when compared to reactive-sputtering deposition. By using the MOCVD, the charge-to-breakdown (QBD) can be significantly improved, in addition to enhanced breakdown voltage and effective breakdown field. Our results clearly demonstrate that high- IPD, particularly deposited by MOCVD, possesses great potential for next-generation stacked-gate Flash memories.  相似文献   

3.
Effects of nitrogen incorporation on suppression of electron charge traps in Hf-based high- $kappa$ gate dielectrics have been studied by first-principles calculations, focusing on interactions between N atoms and electrons trapped at oxygen vacancies $(V_{rm O}{hskip0.2pt}hbox{'s})$. Our total energy calculations revealed that the formation energy of a doubly occupied state of $V_{rm O}$ is significantly increased in $hbox{HfO}_{x} hbox{N}_{y}$ compared to that in $hbox{HfO}_{2}$ . This clearly indicates that the electron charge traps at $V_{rm O}{ hskip0.2pt}hbox{'s}$ are considerably suppressed by N incorporation.   相似文献   

4.
The effects of surface phonon scattering in an nMOSFET with a high-k gate insulator and a nonideal metal gate are examined. The nonideal metal gate model depends on three parameters: (1) the density of electrons in the gate; (2) the electron effective mass; and (3) the high-frequency dielectric constant associated with the choice of gate metal. The impact of these parameters on surface optical (SO) mobility is demonstrated using TiN as an example. For the selected choice of parameters and Landau damping limits, the results indicate that SO phonon scattering does not seem to play a significant role in the mobility degradation of TiN/HfO2 MOSFETs for the entire range of sheet concentration.  相似文献   

5.
This letter reports, for the first time, the observation of mechanical stress from metal-gate layer on the Si nanowires formed by the top-down scheme. High-kappa (HfO2 ~ 5 nm) and metal-gate (TaN ~ 100 nm) are evaluated on Si nanowires having ~5-7 nm diameter. While no significant mechanical effect is observed after high-kappa deposition, the TaN metal layer is found to viciously stretch and twist the straight wires. The wire lengths increase significantly (~3%), which suggests that the Si nanowires are subjected to large tensile strain ( > 4 GPa), assuming that the wires obey Hooke's law with Young's modulus ~150 GPa for bulk Si. Interestingly, the twisted nanowires maintained their physical continuity, as demonstrated by the excellent performance of the fully functional gate-all-around MOSFETs fabricated with the wires as channels.  相似文献   

6.
综述了国内外砷化镓表面硫钝化技术的研究现状和发展趋势, 并对其钝化机理及钝化方法等进行了介绍。同时还提出了对今后发展砷化镓表面硫钝化技术的初步看法  相似文献   

7.
多晶硅薄膜晶体管的表面氮钝化技术   总被引:2,自引:0,他引:2  
采用N2O和NH3等离子钝化技术对多晶硅薄膜表面和栅氧表面进行了钝化处理。实验结果表明,该技术能有效降低多晶硅薄膜的界面态密度,提高多晶硅薄膜晶体管性能,二次离子质谱分析表明在p-Si/SiO界面有氮原子富积,说明生成了强的Si-N键。  相似文献   

8.
HgCdTe narrow-bandgap materials are used in the fabrication of infrared detectors and focal-plane arrays. Many of these advanced devices require complex structures to be processed into them. Passivation of planar detectors is typically done with vacuum-evaporated CdTe or related II–VI materials. New advanced detector topology necessitates the use of low-pressure chemical vapor deposition (LPCVD) and atomic layer deposition (ALD) for improved conformal coverage. Preliminary studies on LPCVD of CdS and ALD of CdTe were carried out and characterized for conformal coverage. The effects of CdS and CdTe films on HgCdTe minority-carrier lifetime are also studied at 300 K and 77 K.  相似文献   

9.
10.
Transient charging and discharging of border traps in the dual-layer HfO2/SiO2 high-kappa gate stack have been extensively studied by the low-frequency charge pumping method with various input pulse waveforms. It has been demonstrated that the exchange of charge carriers mainly occurs through the direct tunneling between the Si conduction band states and border traps in the HfO2 high-kappa dielectric within the transient charging and discharging stages in one pulse cycle. Moreover, the transient charging and discharging behaviors could be observed in the time scale of 10-8- 10-4 s and well described by the charge trapping/detrapping model with dispersive capture/emission time constants used in static positive bias stress. Finally, the frequency and voltage dependencies of the border trap area density could also be transformed into the spatial and energetic distribution of border traps as a smoothed 3-D mesh profiling  相似文献   

11.
A pFET threshold-voltage (Vt) reduction of about 200 mV is demonstrated by inserting a thin Al2O3 layer between the high-k dielectric and the TiN gate without noticeable degradation of other electrical properties. HfSiOpropcapped with 9 Aring of thin Al2O3obtains a low long-channel Vt of -0.37 V (the lowest among those with TiN gate), a high mobility of 59 cm2 /V ldr s at 0.8 MV/cm (92% of universal value), a negligible equivalent- oxide-thickness (EOT) increase of 0.1 Aring (compared to the uncapped reference), and a low Vt instability of 4.8 mV at 7 MV/cm. It also passes the ten-year negative-bias-temperature-instability (NBTI) lifetime specification with a gate overdrive of -0.7 V. This indicates that thin Al2O3obtains caps are beneficial to the pFET applications. In contrast, nitrogen incorporation in the Al2O3-capped HfSiOprop is not favorable because it increases the Vt by 50-140 mV, degrades the mobility by 10%-22%, increases the EOT by 0.5-0.8 Aring and the Vt instability by 5-13 mV, and reduces the NBTI lifetime by four to five orders of magnitude. Compared to postcap nitridation, high-k nitridation results in more severe degradation of these properties by incorporating nitrogen closer to the Si/SiO2 interface.  相似文献   

12.
In this paper, we derive the characteristic equation for the complex propagation constant in a transmission line periodically loaded with dipole elements. This equation is solved for real and imaginary parts of the mode propagation constants. The effect of mutual impedance between antenna elements is included in the formulation and calculation. Theoretical calculations are compared with experimental results reported by Mayes and Ingerson [9]. The usefulness and limitation of the Brillouin (k-beta) diagram for analyzing log-periodic (LP) structures are discussed briefly.  相似文献   

13.
We explore the performance of symmetric (low-k/high-k/low-k) and asymmetric (low-k/high-k) composite tunnel barriers with conventional Flash constraints of retention, erase, read and program disturbs. Simulations, including five different high-k materials, were performed under these criteria to minimize the programming voltage Vprog. Among all constraints, we find read disturb to be the most restrictive both in terms of lowering Vprog and choosing the high-k materials for such stacks. Furthermore, the symmetric barrier stack is found to be more promising versus the asymmetric barrier stack. For the common read disturb voltages of 2.5 and 3.6 V, the lowest Vprog of ~ 4 and 5 V, respectively (relative to the floating gate), are obtained. In addition, the maximum required operating Flash voltage is found to be 30% -40% lower than the prevalent voltages.  相似文献   

14.
Various ultrathin oxynitride gate dielectrics of similar thickness (~1.2 nm) fabricated by a combination of an in situ steam generated and remote plasma nitridation treatment (RPN), an RPN with rapid thermal NO annealing (RPN-NO), and an RPN with rapid thermal O2 annealing (RPN-O2) are reported in this paper. The RPN-NO gate dielectric films show superior interface properties including relatively high nitrogen concentration near the poly-Si/oxide interface and smooth interfaces, excellent electrical characteristics in terms of lower leakage current, better electron and hole channel mobility, higher drive current, and significantly improved reliability such as stress-induced leakage current, hot carrier injection, and negative bias temperature instability, compared to other gate dielectrics fabricated by different processes.  相似文献   

15.
16.
Gunn oscillation triggered by 1.06 µm radiation in an MO-CVD grown GaAlAs-GaAs heterostructure is reported. In these devices, oscillations were found to occur in two separate ranges of bias voltage. The frequency of operation as well as the probability of the initiation of oscillation were found to be dependent upon the excitation beam location.  相似文献   

17.
The use in low‐power soft electronics of the appropriate insulating polymer materials with a high dielectric constant (k) is considered a practical alternative to that of inorganic dielectric materials, which are brittle and have high processing temperatures. However, the polar surfaces of typical high‐k polymer insulators are problematic. Further, it is a huge challenge to control their surface properties without damage because of their soft and chemically fragile nature. Here, a heat‐assisted photoacidic oxidation method that can be used to effectively oxidize the outermost surfaces of high‐k rubbery polymer films without degradation is presented. The oxidized surfaces prepared with the developed method contain large numbers of hydroxyl groups that enable the subsequent growth of dense and ordered self‐assembled monolayers (SAMs) consisting of organosilanes. The whole process modifies the surface characteristics of polymer dielectrics effectively. The mechanisms of the oxidation of polymer surfaces and the subsequent SAM growth process are investigated. The resulting surface‐tailored rubbery dielectrics exhibit superior electrical characteristics when used in organic transistors. These results demonstrate that this method can be used to realize practical soft organic electronics based on high‐k polymer dielectrics.  相似文献   

18.
The surface quality of as-etched and ammonium sulfide [(NH4)2S]-treated samples of an indium arsenide/gallium antimonide (InAs/GaSb) superlattice structure were compared using x-ray photoelectron spectroscopy (XPS). After short exposure to the atmosphere following passivation, treated samples displayed a complete absence or significant reduction of native oxides compared with untreated samples, confirming better quality of surface passivation. However, extensive sulfidization was not observed, and after extended exposure, the native oxides reappeared on the treated surface, establishing the need for a capping layer for long-term passivation stability. The surface study provides definitive confirmation of previous results on electrical properties of photodetectors fabricated on InAs/GaSb superlattices.  相似文献   

19.
分析了AlxGa1-xAs/GaAsHBT外基区表面复合电流及外基区表面复合速度对直流增益的影响,用光致发光(PL)谱和Al/SiNx-S/GaAsMIS结构C-V特性,研究了GaAs表面(NH4)2S/SiNx钝化工艺的效果及其稳定性。结果表明,ECR-CVD淀积SiNx覆盖并在N2气氛中退火有助于改善GaAs表面硫钝化效果的稳定性。在此基础上形成了一套包括(NH4)2S处理、SiNxECR-CVD淀积及退火并与现有HBT工艺兼容的外基区表面钝化工艺,使发射区面积为4×10μm2的器件增益比钝化前提高了4倍,且60天内不退化。  相似文献   

20.
The paper presents a design methodology based on correspondence between performance requirements, mathematical parameters, and circuit parameters of a sigma-delta modulator. This methodology will guide a design engineer in selecting the circuit parameters based on system requirements, in translating paper design directly into LSI design, in predicting the effect of component sensitivity, and in analyzing the operations of the sigma-delta modulator. The sigma-delta modulator is viewed as a device which distributes the noise power, determined by peak SNR, over a much broader band, compared to signal bandwidth, shapes and amplifies it, and allows filtering of the out-of-band noise. The shaping and amplification are quantified by two parameters,FandP, whose product is analogous to the square of step size of a uniform coder. These two parameters are related, on one hand, to the time constants or location of zero and poles. On the other hand, inequalities are set up between performance parameters, like signal-to-noise ratio and dynamic range, andFandP.  相似文献   

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