Electron transport in passivated AlGaN/GaN/Si HEMTs

AlGaN/GaN/Si high electron mobility transistors (HEMTs) grown by molecular beam epitaxy are investigated using direct-current and radio-frequency measurements. As has been found, the maximum of drain current achieves 881 mA/mm with an extrinsic current gain cutoff frequency of 37 GHz for a 0.25 µm gate length. Pulsed characteristics also showed a reduction of trapping centers that improves the quality of the epilayers.     

High-field effects in silicon nitride passivated GaN MODFETs

This paper presents a detailed study of high-field effects in GaN MODFETs. Degradation of DC characteristics and change of flicker noise due to hot electron and high-reverse current stresses in Si/sub 3/N/sub 4/ passivated GaN MODFETs have been investigated. The authors observe that during hot electron stress, electron trapping in the barrier layer and interface state creation occur. These cause a positive shift of V/sub t/, reduce I/sub D/, skew the transfer characteristics, and degrade g/sub m/. Flicker noise (1/f) measurements show that after hot electron stress, the scaled drain current noise spectrum (S/sub I(D)//I/sub D//sup 2/) decreases in depletion, but increases only slightly in strong accumulation, corroborating the creation of interface states but only a small creation of transition-layer tunnel traps that contribute to 1/f noise. During high-reverse current stress, electron trapping dominates for the first 50-60 s and then hole trapping and trap creation begin to manifest. However, there still is net electron trapping under the gate after one hour of stress. The degradation processes bring about a positive shift of V/sub t/, degrade I/sub D/ and g/sub m/, and increase reverse leakage. After high-reverse current stress, S/sub I(D)//I/sub D//sup 2/ increases substantially in strong accumulation, indicating the creation of transition layer tunnel traps.     

Current gain recovery in silicon nitride passivated planar transistors by hydrogen implantation

During deposition of silicon nitride, the low-current hFEof silicon planar transistors decreases. When the nitride layer completely seals the oxide from the ambient, the initial value of hFEcannot be restored by annealing at 500°C in forming gas. To eliminate this difficulty, hydrogen ions have been implanted at an energy of 70 keV and at doses varying from 1.10¹³to 1.10¹⁶cm^-2through the nitride into the oxide. Optimum hFErecovery has been obtained with implantation at a dose of 3.10¹⁵cm^-2followed by a radiation damage annealing at 400-500°C in dry nitrogen.     

Experimental evidence of parasitic shunting in silicon nitride rear surface passivated solar cells

Many solar cells incorporating SiN_x films as a rear surface passivation scheme have not reached the same high level of cell performance as solar cells incorporating high‐temperature‐grown silicon dioxide films as a rear surface passivation. In this paper, it is shown by direct comparison of solar cells incorporating the two rear surface passivation schemes, that the performance loss is mainly due to a lower short‐circuit current while the open‐circuit voltage is equally high. With a solar cell test structure that features a separation of the rear metal contacts from the passivating SiN_x films, the loss in short‐circuit current can be reduced drastically. Besides a lower short‐ circuit current, dark I–V curves of SiN_x rear surface passivated solar cells exhibit distinct shoulders. The results are explained by parasitic shunting of the induced floating junction (FJ) underneath the SiN_x films with the rear metal contacts. The floating junction is caused by the high density of fixed positive charges in the SiN_x films. Other two‐dimensional effects arising from the injection level dependent SRV of the Si/SiN_x interfaces are discussed as well, but, are found to be of minor importance. Pinholes in the SiN_x films and optical effects due to a different internal rear surface reflectance can be excluded as a major cause for the performance loss of the SiN_x rear surface passivated cells. Copyright © 2002 John Wiley & Sons, Ltd.     

Uniformity and high temperature performance of X-band nitride power HEMTs fabricated from 2-inch epitaxy

X-band performance, high temperature D.C. operation and uniformity have been evaluated for 1 μm gate AlGaN/GaN HEMTs grown by RF atomic nitrogen plasma MBE. Deposition and fabrication were performed on 2-inch (0001) sapphire substrates to determine process uniformity. HEMTs with 300 μm total gate width and dual gate finger geometry have been fabricated with 650–700 cm² V⁻¹×s mobility. Maximum frequency cut-offs on the order of 8–10 GHz were achieved. D.C. performance at room temperature was >500 mA mm⁻¹, and external transconductance was >70 mS mm⁻¹. The transistors operated at test temperatures of 425°C in air.     

Fabrication and characterization of high performance AlGaN/GaN HEMTs on sapphire with silicon nitride passivation

AlGaN/GaN high electron mobility transistors(HEMTs)with high performance were fabricated and characterized.A variety of techniques were used to improve device performance,such as AlN interlayer,silicon nitride passivation,high aspect ratio T-shaped gate,low resistance ohmic contact and short drain-source distance. DC and RF performances of as-fabricated HEMTs were characterized by utilizing a semiconductor characterization system and a vector network analyzer,respectively.As-fabricated devices exhibited a maximum drain current density of 1.41 A/mm and a maximum peak extrinsic transconductance of 317 mS/mm.The obtained current density is larger than those reported in the literature to date,implemented with a domestic wafer and processes.Furthermore, a unity current gain cut-off frequency of 74.3 GHz and a maximum oscillation frequency of 112.4 GHz were obtained on a device with an 80 nm gate length.     

蓝宝石衬底上使用氮化硅钝化的AlGaN/GaN高电子迁移率晶体管的研制与特性分析

本文研制了高性能的AlGaN/GaN高电子迁移率晶体管并进行了特性分析。诸如氮化铝插入层、氮化硅钝化、高宽窄比的T型栅、减小欧姆接触电阻和缩短漏源距离等技术被用于提高器件性能。使用半导体参数分析仪和矢量网络分析仪分别对前制器件的直流和交流特性进行了表征。所得80nm栅长的器件其最大漏极电流密度为1.41A/mm,该结果为到目前为止国内文献报道的最大值。同时测得峰值跨导为317mS/mm,特征频率为74.3GHz,最高振荡频率为112.4GHz。     

Comparison of the open circuit voltage of simplified PERC cells passivated with PECVD silicon nitride and thermal silicon oxide

Plasma enhanced chemical vapor deposited silicon nitride films have been used to passivate both the front and rear surface of simplified PERC silicon solar cells (planar surface, single‐step emitter). An independently confirmed open circuit voltage (V_oc) of 667 mV was measured, proving the outstanding surface passivation provided by the silicon nitride films. The achieved V_oc represents a significant improvement for all‐SiN passivated silicon solar cells. A conversion efficiency of 17˙8% was obtained. For comparison, similar cells with different passivation schemes, including high quality, thermally grown TCA oxides and thin SiO₂/SiN double layers, were also investigated. Open circuit voltages up to 673 mV and conversion efficiencies up to 18˙3% were achieved. Copyright © 2000 John Wiley & Sons, Ltd.     

Structural and electrical properties of ultra-thin high-k ZrO2 film on nitride passivated Ge(100) prepared by PEALD

The study of ultrathin ZrO₂ films grown on surface passivated germanium substrates by plasma enhanced Atomic Layer Deposition (PEALD) has been carried out. Nitride passivation has been used to form an interfacial layer between ZrO₂/Ge. The ultra-thin ZrO₂ film deposited with thickness of ~5.75 nm and refractive index of ~2.05 as observed through ellipsometry. The Ge3d, Zr3d, N1s and O1s are XPS core level spectra's confirm the formation of GeON and ZrO₂ ultra-thin films. The AFM results show the roughness of deposited films as low as 0.3 nm. The effect of post metallization annealing (PMA) on electrical properties of Au/Cr/ZrO₂/GeON/Ge capacitors has been investigated. The improvement in k value (~38) and an EOT value (~0.5 nm) after PMA on Ge/GeON/ZrO₂ stack has been observed. The flat band voltage and hysteresis of post metallization annealed devices has been reduced as compared to that of without PMA GeON/ZrO₂ stack.     

Improved reliability of AlGaN/GaN-on-Si high electron mobility transistors (HEMTs) with high density silicon nitride passivation

We have systematically studied the effects of Si_xN_1 − x passivation density on the reliability of AlGaN/GaN high electron mobility transistors. Upon stressing, devices degrade in two stages, fast-mode degradation and followed by slow-mode degradation. Both degradations can be explained as different stages of pit formation at the gate-edge. Fast-mode degradation is caused by pre-existing oxygen at the Si_xN_1 − x/AlGaN interface. It is not significantly affected by the Si_xN_1 − x density. On the other hand, slow-mode degradation is associated with Si_xN_1 − x degradation. Si_xN_1 − x degrades through electric-field induced oxidation in discrete locations along the gate-edges. The size of these degraded locations ranged from 100 to 300 nm from the gate edge. There are about 16 degraded locations per 100 μm gate-width. In each degraded location, low density nano-globes are formed within the Si_xN_1 − x. Because of the low density of the degraded locations, oxygen can diffuse through these areas and oxidize the AlGaN/GaN to form pits. This slow-mode degradation can be minimized by using high density (ρ = 2.48 g/cm³) Si₃₆N₆₄ as the passivation layer. For slow-mode degradation, the median time to failure of devices with high density passivation is found to increase up to 2× as compared to the low density (ρ = 2.25 g/cm³) Si₄₃N₅₇ passivation. A model based on Johnson-Mehl-Avrami theory is proposed to explain the kinetics of pit formation.     

AlGaN-GaN double-channel HEMTs

We present the design, fabrication, and characterization of AlGaN-GaN double-channel HEMTs. Two carrier channels are formed in an AlGaN-GaN-AlGaN-GaN multilayer structure grown on a sapphire substrate. Polarization field in the lower AlGaN layer fosters formation of a second carrier channel at the lower AlGaN-GaN interface, without creating any parasitic conduction path in the AlGaN barrier layer. Unambiguous double-channel behaviors are observed at both dc and RF. Bias dependent RF small-signal characterization and parameter extraction were performed. Gain compression at a high current level was attributed to electron velocity degradation induced by interface scattering. Dynamic IV measurement was carried out to analyze large-signal behaviors of the double-channel high-electron mobility transistors. It was found that current collapse mainly occurs in the channel closer to device surface, while the lower channel suffers minimal current collapse, suggesting that trapping/detrapping of surface states is mainly responsible for current collapse. This argument is supported by RF large-signal measurement results.     

X波段GaN HEMT内匹配器件

自主研制的GaN HEMT,栅源泄漏电流从10-4 A量级减小到了10 -6 A量级,有效提高了栅漏击穿电压,改善了器件工作特性.采用MIS结构制作了2.5mm栅宽GaN HEMT,测试频率为8GHz,漏源电压为33V时,器件连续波输出功率为18.2W,功率增益为7.6dB,峰值功率附加效率为43.0%.2.5mm×4 GaN HEMT内配配器件,测试频率8GHz,连续波输出功率64.5W,功率增益7.2dB,功率附加效率39%.     

Rohm hyperFETs outperform HEMTs

Rohm Electronics (UK) Ltd. has announced the immediate availability of a range of low-noise GaAs FETs for DBS applications known as hyperFETs. These are based on a new type of structure which gives superior noise performance compared to conventional HEMTs, and are already in volume production at Rohm's main semiconductor plant in Kyoto, Japan. They are available in industry-standard (Micro-X) ceramic packages, and can be supplied taped and reeled for automatic insertion.     

FRGPP管芯的研制

在普通玻璃钝化管芯工艺基础上研制出了快速恢复玻璃钝化管芯。重点分析快速恢复玻璃钝化 ( FRGPP)二极管管芯制造过程中扩散工艺的调整、玻璃粉的选择以及 LPCVD工艺的必要性     

超低噪声毫米波PHEMT

以AlGaAs/InGaAs/GaAs为基础的十分之一微米栅长PHEMT器件在43GHz下提供了最优良的低噪声性能。测量的室温器件噪声系数为1.32dB(噪声温度=103K),相关增益6.7dB,在17K物理温度下,噪声系数为0.36dB(噪声温度=25K),相关增益为6.9dB,这是目前报道的43GHz下GaAs基器件的最低噪声系数。     

X波段GaN HEMT内匹配器件

自主研制的GaN HEMT,栅源泄漏电流从1E-4A量级减小到了1E-6A量级,有效提高了栅漏击穿电压,改善了器件工作特性. 采用MIS结构制作了2.5mm栅宽GaN HEMT,测试频率为8GHz,漏源电压为33V时,器件连续波输出功率为18.2W,功率增益为7.6dB,峰值功率附加效率为43.0%. 2.5mm×4 GaN HEMT内匹配器件,测试频率8GHz,连续波输出功率64.5W,功率增益7.2dB,功率附加效率39%.     

An efficient passivated TRAPATT diode structure

A TRAPATT diode has been fabricated using a variation of silicon planar technology. Its design combines the advantages of the surface stability of the planar process with low parasitic capacitance usually associated only with mesa devices. Since shallow diffusions may be used, the device retains an excellent heat-dissipation capability.     

磷化铟基高电子迁移率晶体管欧姆接触工艺

针对磷化铟(InP)基高电子迁移率晶体管(HEMT),进行了Ni/Ge/Au和Ni/Ge/Au/Ge/Ni/Au两种金属结构快速退火(10～40s)和长时间合金(10min)的实验.通过研究比较,得到了更适用于InP基HEMT器件制作的合金方法.利用Ni/Ge/Au/Ge/Ni/Au结构,在270℃下合金10min形成了典型值0.068Ω·mm的接触电阻.     

Modelling DC characteristics of HEMTs

A simple empirical equation is presented to relate the drain current to drain-source and gate-source voltages of the high electron mobility transistors (HEMTs). This equation covers the entire ID/VDS characteristics. The accuracy of this equation is better than the theoretically developed separate equations.