Leakage currents and dielectric breakdown of Si1−x−yGexCy thermal oxides

A detailed study of the leakage currents and dielectric wear-out of thermal oxides grown on Si_1−xGe_x, Si_1−yC_y and Si_1−x−yGe_xC_y epilayers to determine their quality and reliability for Si_1−x−yGe_xC_y MOS technology is presented. After applying electrical stress to the samples, we have determined the conduction mechanisms and the dependence of leakage currents upon epilayer composition (Ge and C content). Conduction takes place mainly via Fowler-Nordheim tunneling injection. Ge and C introduce traps in the oxide which assist injection and thus lower the effective height of the tunneling barrier. We have also monitored the oxide reliability, focusing on time-dependent dielectric breakdown (TDDB). The nature of trapped charge in the oxide depends on the initial epilayer composition. We have found that the formation of defects induced by the presence of C leads to extrinsic oxide failure. While the presence of Ge in the oxide does not seem to introduce significant differences with respect to Si breakdown statistics, C in the oxide truly modifies the statistical profile.     

Electrical demonstration of thermally stable Ni silicides on Si1−xCx epitaxial layers

In this paper we report on electrical demonstration of thermally stable Ni silicides. It has been shown that when a sacrificial Si_1−xC_x epilayer is grown in the source-drain areas of NMOS transistors prior to silicidation, Ni silicides can withstand a 30 min anneal at 750 °C and demonstrate excellent electrical performance. We have observed carbon segregation at the NiSiC/Si_1−xC_x interface which can explain the increased NiSiC thermal stability. We have experimentally demonstrated feasibility of CMOS device implementation of thermally stable Ni silicides.     

Influence of the deposition parameters on the growth of SiGe nanocrystals embedded in Al2O3 matrix

Si_1−xGe_x nanocrystals (NCs), embedded in Al₂O₃ matrix, were fabricated on Si (100) substrates by RF-magnetron sputtering technique with following annealing procedure at 800 °C, in nitrogen atmosphere. The presence of Si_1−xGe_x NCs was confirmed by grazing incidence X-ray diffraction (GIXRD), grazing incidence small angle X-ray scattering (GISAXS) and Raman spectroscopy. The influence of the growth conditions on the structural properties and composition of Si_1−xGe_x NCs inside the alumina matrix was analyzed. Optimal conditions to grow Si_1−xGe_x (x∼ 0.8) NCs sized between 3 and 4 nm in Al₂O₃ matrix were established.     

Experimental and theoretical investigation of defects at (1 0 0) Si1−xGex/oxide interfaces

The identification of a nontrigonal Ge dangling bond at SiO₂/Si_1−xGe_x/SiO₂ heterostructures and its electrical activity are discussed, both from experimental and theoretical points of view. This dangling bond is observed from multifrequency electron-spin resonance experiments performed at 4.2 K, for typical Ge concentrations in the range 0.4 ≤ x ≤ 0.85. The electrical activity of this defect is revealed from capacitance-voltage characteristics measured at 300 and 77 K, and is found to behave like an acceptor defect. First-principles calculations of the electronic properties of this Ge dangling bond indicate that its energy level approaches the valence band edge of the Si_1−xGe_x layer as the Ge content increases, confirming its acceptor-like nature.     

High-k TixSi1−xO2 thin films prepared by co-sputtering method

We report on high-k Ti_xSi_1−xO₂ thin films prepared by RF magnetron co-sputtering using TiO₂ and SiO₂ targets at room temperature. The Ti_xSi_1−xO₂ thin films exhibited an amorphous structure with nanocrystalline grains of 3-30 nm having no interfacial layers. The XPS analyses indicate that stoichiometric TiO₂ phases in the Ti_xSi_1−xO₂ films increased due to stronger Ti-O bond with increasing TiO₂ RF powers. In addition, the electrical properties of the Ti_xSi_1−xO₂ films became better with increasing TiO₂ RF powers, from which the maximum value of the dielectric constant was estimated to be ∼30 for the samples with TiO₂ RF powers of 200 and 250 W. The transmittance of the Ti_xSi_1−xO₂ films was above 95% with optical bandgap energies of 4.1-4.2 eV. These results demonstrate a potential that the Ti_xSi_1−xO₂ thin films were applied to a high-k gate dielectric in transparent thin film transistors as well as metal-oxide-semiconductor field-effect transistors.     

Phase formation and texture of nickel silicides on Si1−xCx epilayers

We investigated the phase formation and texture of nickel silicides formed during the reaction of 10 nm sputter deposited nickel with Si_1−xC_x epitaxial layers on Si(1 0 0) substrates, having a carbon content between 0 and 2.5 atomic percent. It was found that both the formation temperature as well as the texture of the metal-rich phases is influenced by the amount of carbon in the Si_1−xC_x layer. To determine the influence of the location of the carbon during the silicidation process we also investigated the reaction of 10 nm nickel on Si(1 0 0) substrates, where carbon was either alloyed in the nickel layer or deposited as an interlayer at the interface between the nickel and the substrate. Depending on the location of the carbon, a different thermal stability of the layer was found.     

HfAlOx high-k gate dielectric on SiGe: Interfacial reaction, energy-band alignment, and charge trapping properties

Ultra thin HfAlO_x high-k gate dielectric has been deposited directly on Si_1−xGe_x by RF sputter deposition. The interfacial chemical structure and energy-band discontinuities were studied by using X-ray photoelectron spectroscopy (XPS), time of flight secondary ion mass spectroscopy (TOF-SIMS) and electrical measurements. It is found that the sputtered deposited HfAlO_x gate dielectric on SiGe exhibits excellent electrical properties with low interface state density, hysteresis voltage, and frequency dispersion. The effective valence and conduction band offsets between HfAlO_x (E_g = 6.2 eV) and Si_1−xGe_x (E_g = 1.04 eV) were found to be 3.11 eV and 2.05 eV, respectively. In addition, the charge trapping properties of HfAlO_x/SiGe gate stacks were characterized by constant voltage stressing (CVS).     

Investigation of graded InxGa1−xP buffer by Raman scattering method

The compositional changes of In_xGa_1−xP graded buffer inserted between GaP substrate and subsequently grown In_0.36Ga_0.64P homojunction LED structure were investigated by Raman spectroscopy. The indium content of In_xGa_1−xP interlayers was increased in eight steps with thickness of 300 nm and constant compositional change Δx_In between the steps. The properties of In_xGa_1−xP graded buffer along the structure cross-section have been studied by Raman back scattering method and the changes in GaP LO and TO phonons were investigated. Raman shift of 13 cm⁻¹ in GaP-like LO₁ phonon was measured on beveled [100]surface for compositional change of In_xGa_1−xP layer in the range of 0<x_In<0.32. The measurements on the cleaved edge of the sample in [011] direction revealed a strong TO phonon at 366 cm⁻¹ and weak LO phonon peak at 405 cm⁻¹ in GaP substrate. By reaching the graded In_xGa_1−xP region the intensity of TO phonon decreases and appearance of considerable TO₁ phonon shift up to 350 cm⁻¹ for In content x_In=0.16 was observed. For upper graded layers with x_In from 0.16 to 0.24 the position of GaP-like TO₁ was constant and can be ascribed to relaxation of lattice mismatched thin In_xGa_1−xP graded upper layers in the structure.     

Unterminated 4H-SiC Schottky barrier diodes with novel HfNxBy electrodes

4H-SiC Schottky barrier diodes (SBDs) were fabricated and characterized from room temperature to 573 K using HfN_xB_y as Schottky electrodes. The results are compared to SBDs fabricated using other electrodes that include Ni, Pt, Ti and Au. The Schottky barrier height Φ_b for as-deposited HfN_xB_y/n−/n+ diodes, determined from room temperature current-voltage characteristics, is 0.887 eV. This is lower than those of SBDs fabricated using other metals such as Au, where Φ_b is 1.79 eV. The HfN_xB_y/n−/n+ diodes studied have a much higher on-resistance R_on of around 38.24 mΩ-cm², which is about four times that of Au/n−/n+ diodes, due to the higher sheet resistance of the sputtered HfN_xB_y electrode layer. The barrier height Φ_b and ideality factor η of the HfN_xB_y/n−/n+ diodes remain almost unchanged after 400 and 750 °C anneal in N₂. This suggests excellent thermal and chemical stability of HfN_xB_y in contact with 4H-SiC.     

Evaluation of electron irradiated embedded SiGe source/drain diodes by Raman spectroscopy

The stress evolution of Si_0.75Ge_0.25 layers for Si_0.75Ge_0.25 source/drain (S/D) diodes, which have been irradiated at room temperature with 2-MeV electrons, is investigated using Raman spectroscopy measurements. According to Raman results for Si_0.75Ge_0.25/Si hetero-structures before and after irradiation, tensile stress was induced in the silicon substrate under the Si_0.75Ge_0.25 layer. Before irradiation, the range of tensile stress estimated by the peak shift of the Raman spectrum was −110 to −10 MPa for several measurement patterns. After irradiation, the tensile stress was relaxed in all measurement patterns though the compressive stress status in the Si_0.75Ge_0.25 layer was not changed. The stress relaxation in the silicon substrate amounted to about 10 MPa as a maximum. The influence of the irradiation on the stress relaxation in the silicon substrate, could be explained because the electron irradiation at 2-MeV can easily penetrate through the studied 140 nm Si_0.75Ge_0.25 layers.     

High-resolution transmission electron microscopy of silicide formation and morphology development of Ni/Si and Ni/Si<Subscript>1−x</Subscript>Ge<Subscript>x</Subscript>

Nickel-silicide phase formation in the Ni/Si and Ni/Si_1−xGe_x (x=0.20) systems and its correlation with variations in sheet resistance have been studied using high-resolution transmission electron microscopy (HRTEM) and related techniques. Following a 500°C anneal, uniform and low-resistivity NiSi and NiSi_1−xGe_x (x<0.20) crystalline films were formed in the respective systems. Annealed at 900°C, NiSi₂, in the form of pyramidal or trapezoidal islands, is found to replace the NiSi in the Ni/Si system. After a 700°C anneal, threading dislocations were observed for the first time in the Ni/Si_1−xGe_x system to serve as heterogeneous nucleation sites for rapid lateral NiSi_1−xGe_x growth.     

Luminescent properties of BexCd1−xSe thin films

We report photoluminescence (PL) study of Be_xCd_1−xSe epitaxial layers (x<0.21) grown by molecular beam epitaxy on InP substrates. Continuous wave PL spectra are taken within a 4.2-300 K temperature range. We observe an anomalous ‘s-shaped’ temperature dependence of emission energy and a severe decrease of emission intensity with the increase of temperature. We explain an ‘s-shaped’ temperature dependence of emission energy by exciton localization in the potential minima at low temperatures followed by thermal activation at higher temperatures. We attribute low emission intensity at high temperatures to exciton dissociation and electron/hole migration to non-radiative recombination centers.     

The effect of Si addition and Ta diffusion barrier on growth and thermal stability of NiSi nanolayer

Formation and thermal stability of nanothickness NiSi layer in Ni(Pt 4 at.%)/Si(1 0 0) and Ni_0.6Si_0.4(Pt 4 at.%)/Si(1 0 0) structures have been investigated using magnetron co-sputtering deposition method. Moreover, to study the effect of Si substrate in formation of NiSi and its thermal stability, we have used Ta diffusion barrier between the Ni_0.6Si_0.4 layer and the Si substrate. Post annealing treatment of the samples was performed in an N₂ environment in a temperature range from 200 to 900 °C for 2 min. The samples were analyzed by four point probe sheet resistance (R_s) measurement, X-ray diffraction (XRD) and atomic force microscopy (AFM) techniques. It was found that the annealing process resulted in an agglomeration of the nanothickness Ni(Pt) layer, and consequently, phase formation of discontinuous NiSi grains at the temperatures greater than 700 °C. Instead, for the Ni_0.6Si_0.4(Pt)/Si structure, 100 °C excess temperature in both NiSi formation and agglomeration indicated that it can be considered as a more thermally stable structure as compared with the Ni(Pt 4 at.%)/Si(1 0 0) structure. XRD, AFM and R_s analyses confirmed formation of a continuous NiSi film with R_s value of 5 Ω/□ in a temperature range of 700−800 °C. Use of Ta diffusion barrier showed that the role of diffusion of Ni atoms into the Si substrate is essential in complete silicidation of a NiSi layer.     

Characterization of UV photodetectors with MgxZn1−xO thin films

In this study the metal-semiconductor-metal (MSM) structure ultraviolet (UV) photodetectors (PDs) based on Mg_xZn_1−xO thin films were fabricated. The Mg_xZn_1−xO thin films were grown on glass substrates by sol-gel method. The results show that the optical absorption has a blue shift and higher transmittance with increasing Mg dopant. The optical band gap were modified by 3.28-3.52 eV, which corresponded to x = 0 and x = 0.16. For a 10 V applied bias, the dark currents of the Mg_xZn_1−xO MSM-PDs were 637 nA (x = 0) to 0.185 nA (x = 0.16) and showed good Schottky contacts. This UV-visible rejection ratio of the Mg_xZn_1−xO UV PDs at x = 0, 0.16, 0.21 and 0.33 were 18.82, 35.36, 40.91 and 42.92, respectively.     

Changes in effective work function of HfxRu1−x alloy gate electrode

Effective work function (?_m,eff) values of Hf_x Ru_1−x alloy gate electrodes on SiO₂ metal-oxide-semiconductor (MOS) capacitors were carefully examined to assess whether the ?_m,eff was determined by the crystalline structure or the composition of the Hf_xRu_1−x alloy. X-ray diffraction results indicated that the crystalline structures of Hf_xRu_1−x alloy were divided into hexagonal-Ru, cubic-HfRu or hexagonal-Hf with the increase of Hf content. The ?_m,eff values could be controlled continuously from 4.6 to 4.0 eV by changing the Hf content. The experimental ?_m,eff value showed a good agreement with theoretical results considering the compositional ratio of pure Hf and Ru. These results suggest that the ?_m,eff of Hf_xRu_1−x alloy gates on SiO₂ MOS capacitors is dominantly determined by the Hf_xRu_1−x composition rather than the crystalline structure.     

A comparative 1/f noise study of GeOI wafers obtained by the Ge enrichment technique and the Smart Cut technology

This paper presents an experimental investigation of Low-frequency Noise (LFN) measurements on Germanium-On-Insulator (GeOI) PMOS transistors processed on different wafers. The wafers are obtained by Ge enrichment technique and by Smart Cut™ technology. The slow oxide trap densities of back interface are used as a figure of merit to evaluate the process. The Smart Cut™ process is evaluated by studying GeOI pMOSFETs, and the enrichment process by studying Si_1−xGe_x (x = 25% and 35%) pMOSFETs. The buried oxide is used as a back gate for experimental purposes. The extracted values are of the same order of magnitude for both processes and are close to those of state of art buried oxide SiO₂/Si interfaces, demonstrating that both the Smart Cut™ and enrichment techniques produce equally good quality interfaces.     

SiGe: An attractive material for post-CMOS processing of MEMS

This work gives an overview of the different developments for silicon germanium (Si_1−xGe_x) from a MEMS post-processing perspective. First, the maximum processing temperature that does not introduce any damage or degradation into the standard characteristics of the CMOS driving electronics is specified. Then, the optimal type of silicon and germanium gas sources and deposition technique that results in an economical process are identified. Next, the selection criteria for a low thermal budget doping method and doping species are discussed. Finally, the advantage and disadvantage for the different approaches implemented for enhancing the physical properties of poly Si_1−xGe_x at a CMOS backend compatible temperature are highlighted. It is shown that the optimal method depends on the application requirements and the CMOS technology used for realizing the driving electronics.     

Preparation and characterization of Fe-doped Ni0.9Co0.8Mn1.3−xFexO4 (0 ≤ x ≤ 0.7) negative temperature coefficient ceramic materials

Based on spinel-type semiconducting electroceramics, negative temperature coefficient (NTC) thermistor materials, Ni_0.9Co_0.8Mn_1.3−xFe_xO₄ (0 ≤ x ≤ 0.7), with different compositions were synthesized by a co-precipitation method. The optimal pH value and the influence of Fe³⁺ doping during the synthesis processing were discussed. As-prepared Ni_0.9Co_0.8Mn_1.3−xFe_xO₄ materials were characterized by DT/TGA, XRD, FTIR, SEM, electrical measurement and impendance analysis. It was found that, as the Fe doping content in the Ni_0.9Co_0.8Mn_1.3−xFe_xO₄ samples increased, both the grain size and the density decreased. The as-sintered Ni_0.9Co_0.8Mn_1.3−xFe_xO₄ samples presented a single-phase cubic spinel structure. The impendance diagram indicated that the grain boundary resistance was dominant in the overall impendance of Ni_0.9Co_0.8Mn_1.3−xFe_xO₄ NTC ceramic materials. The value of ρ₂₅, B_25/50, slope and activation energy for the samples Ni_0.9Co_0.8Mn_1.3−xFe_xO₄ sintered at 1200 °C were in the range of 453.1-2411 Ω cm, 3103-3355 K, 3.27325-3.43149 and 0.28207-0.29325 eV, respectively. This suggests that the electrical properties can be adjusted to desired values by controlling the Fe³⁺ ion doping content.     

Nickel silicidation techniques for strained Si1?xGex, Si1?x?yGexCy, and Si1?yCy alloys material-device applications

A nickel silicide process for Si_1-xGe_x, Si_1-x-yGe_xC_y, and Si_1-yC_y alloy materials compatible with Si technology has been developed. Low-resistivity-phase (12–20 μΘ cm) nickel silicides have been obtained for these alloys with different low sheet-resistance temperature windows. The study shows that thin (15–18 nm) silicide layers with high crystalline quality, smooth silicide surface, and smooth interface between silicide and the underlying material are achievable. The technique could be used to combine the benefits of Ni silicide and Si_1-xGe_x, Si_1-x-yGe_xC_y, and Si_1-yC_y alloys. The technique is promising for Si or Si_1-xGe_x, Si_1-x-yGe_xC_y, and Si_1-yC_y alloy-based metal-oxide semiconductor, field-effect transistors (MOSFETs) or other device applications.     

Characterization of strained silicon on relaxed SiGe layer made by H ion implantation and annealing in ultra-high vacuum ambient

Twenty-nanometer-thick Si cap layer/74-nm-thick Si_0.72Ge_0.28 epilayer/Si heterostructural sample was implanted by 25 keV H⁺ ion to a dose of 1 × 10¹⁶ cm⁻² and subsequently annealed in ultra-high vacuum ambient at the temperature of 800 °C for 30 min. Rutherford backscattering/ion channeling (RBS/C), Raman spectra, high resolution X-ray diffraction (HRXRD) and atomic force microscopy (AFM) were used to characterize the structural characteristic of Si/SiGe/Si heterostructure. Investigations by RBS/C demonstrate that the Si_0.72Ge_0.28 layer show good crystal quality (21.1% of channel minimum yield). The relaxation degree of partially relaxed Si_0.72Ge_0.28 layer was around 74%, which was obtained by HRXRD. The computation process of the relaxation degree of strain in SiGe layer according to HRXRD rocking curve was also thoroughly introduced. Raman analysis revealed that stress, σ and strain, ε in the thin strained-Si layer were around 1.2 Gpa and 0.52%, respectively. In addition, the small surface roughness in the formed strained-Si/relaxed Si_0.72Ge_0.28 layer/Si heterostructural sample was observed via AFM image.