On the profile of frequency dependent series resistance and surface states in Au/Bi4Ti3O12/SiO2/n-Si(MFIS) structures

The frequency dependent capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of the metal-ferroelectric-insulator-semiconductor (Au/Bi₄Ti₃O₁₂/SiO₂/n-Si) structures (MFIS) were investigated by considering series resistance (R_s) and surface state effects in the frequency range of 1 kHz-5 MHz. The experimental C-V-f and G/ω-V-f characteristics of MFIS structures show fairly large frequency dispersion especially at low frequencies due to R_s and N_ss. In addition, the high frequency capacitance (C_m) and conductance (G_m/ω) values measured under both reverse and forward bias were corrected for the effect of series resistance to obtain the real capacitance of MFIS structures. The R_s-V plots exhibit anomalous peaks between inversion and depletion regions at each frequency and peak positions shift towards positive bias with increasing frequency. The C⁻²-V plot gives a straight line in wide voltage region, indicating that interface states and inversion layer charge cannot follow the ac signal in the depletion region, but especially in the strong inversion and accumulation region. Also, it has been shown that the surface state density decreases exponentially with increasing frequency. The C-V-f and G/w-V-f characteristics confirm that the interface state density (N_ss) and series resistance (R_s) of the MFIS structures are important parameters that strongly influence the electrical properties of MFIS structures.     

Characterization of current-voltage (I-V) and capacitance-voltage-frequency (C-V-f) features of Al/SiO2/p-Si (MIS) Schottky diodes

The current-voltage (I-V) characteristics of metal-insulator-semiconductor Al/SiO₂/p-Si (MIS) Schottky diodes were measured at room temperature (300 K). In addition, capacitance-voltage-frequency (C-V-f) characteristics are investigated by considering the interface states (N_ss) at frequency range 100 kHz to 1 MHz. The MIS Schottky diode having interfacial insulator layer thickness of 33 Å, calculated from the measurement of the insulator capacitance in the strong accumulation region. At each frequency, the measured capacitance decreases with increasing frequency due to a continuous distribution of the interface states. From the I-V characteristics of the MIS Schottky diode, ideality factor (n) and barrier height (Φ_b) values of 1.766 and 0.786 eV, respectively, were obtained from a forward bias I-V plot. In addition, the interface states distribution profile as a function of (E_ss − E_v) was extracted from the forward bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φ_e) for the Schottky diode. The diode shows non-ideal I-V behaviour with ideality factor greater than unity. This behaviour is attributed to the interfacial insulator layer, the interface states and barrier inhomogeneity of the device. As expected, the C-V curves gave a barrier height value higher than those obtained from I-V measurements. This discrepancy is due to the different nature of the I-V and C-V measurement techniques.     

The C-V-f and G/ω-V-f characteristics of Al/SiO2/p-Si (MIS) structures

The frequency dependence of capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of the Al/SiO₂/p-Si metal-insulator-semiconductor (MIS) structures has been investigated taking into account the effect of the series resistance (R_s) and interface states (N_ss) at room temperature. The C-V and G/ω-V measurements have been carried out in the frequency range of 1 kHz to 1 MHz. The frequency dispersion in capacitance and conductance can be interpreted only in terms of interface states and series resistance. The N_ss can follow the ac signal and yield an excess capacitance especially at low frequencies. In low frequencies, the values of measured C and G/ω decrease in depletion and accumulation regions with increasing frequencies due to a continuous density distribution of interface states. The C-V plots exhibit anomalous peaks due to the N_ss and R_s effect. It has been experimentally determined that the peak positions in the C-V plot shift towards lower voltages and the peak value of the capacitance decreases with increasing frequency. The effect of series resistance on the capacitance is found appreciable at higher frequencies due to the interface state capacitance decreasing with increasing frequency. In addition, the high-frequency capacitance (C_m) and conductance (G_m/ω) values measured under both reverse and forward bias were corrected for the effect of series resistance to obtain the real diode capacitance. Experimental results show that the locations of N_ss and R_s have a significant effect on electrical characteristics of MIS structures.     

Temperature and frequency dependent electrical and dielectric properties of Al/SiO2/p-Si (MOS) structure

The electrical and dielectric properties of Al/SiO₂/p-Si (MOS) structures were studied in the frequency range 10 kHz-10 MHz and in the temperature range 295-400 K. The interfacial oxide layer thickness of 320 Å between metal and semiconductor was calculated from the measurement of the oxide capacitance in the strong accumulation region. The frequency and temperature dependence of dielectric constant (ε′), dielectric loss (ε″), dielectric loss tangent (tan δ) and the ac electrical conductivity (σ_ac) are studied for Al/SiO₂/p-Si (MOS) structure. The electrical and dielectric properties of MOS structure were calculated from C-V and G-V measurements. Experimental results show that the ε′ and ε″ are found to decrease with increasing frequency while σ_ac is increased, and ε′, ε″, tan δ and σ_ac increase with increasing temperature. The values of ε′, ε″ and tan δ at 100 kHz were found to be 2.76, 0.17 and 0.06, respectively. The interfacial polarization can be more easily occurred at low frequencies, and the number of interface state density between Si/SiO₂ interface, consequently, contributes to the improvement of dielectric properties of Al/SiO₂/p-Si (MOS) structure. Also, the effects of interface state density (N_ss) and series resistance (R_s) of the sample on C-V characteristics are investigated. It was found that both capacitance C and conductance G were quite sensitive to temperature and frequency at relatively high temperatures and low frequencies, and the N_ss and R_s decreased with increasing temperature. This is behavior attributed to the thermal restructuring and reordering of the interface. The C-V and G/ω-V characteristics confirmed that the N_ss, R_s and thickness of insulator layer (δ) are important parameters that strongly influence both the electrical and dielectric parameters and conductivity in MOS structures.     

Electrical analysis of organic dye-based MIS Schottky contacts

In this work, we prepared metal/interlayer/semiconductor (MIS) diodes by coating of an organic film on p-Si substrate. Metal(Al)/interlayer(Orange GOG)/semiconductor(p-Si) MIS structure had a good rectifying behavior. By using the forward-bias I-V characteristics, the values of ideality factor (n) and barrier height (BH) for the Al/OG/p-Si MIS diode were obtained as 1.73 and 0.77 eV, respectively. It was seen that the BH value of 0.77 eV calculated for the Al/OG/p-Si MIS diode was significantly larger than the value of 0.50 eV of conventional Al/p-Si Schottky diodes. Modification of the potential barrier of Al/p-Si diode was achieved by using thin interlayer of the OG organic material. This was attributed to the fact that the OG organic interlayer increased the effective barrier height by influencing the space charge region of Si. The interface-state density of the MIS diode was found to vary from 2.79 × 10¹³ to 5.80 × 10¹² eV⁻¹ cm⁻².     

On the profile of temperature dependent series resistance in Al/Si3N4/p-Si (MIS) Schottky diodes

The temperature dependence of capacitance-voltage (C-V) and conductance-voltage (G/w-V) characteristics of metal-insulator-semiconductor (Al/Si₃N₄/p-Si) Schottky barrier diodes (SBDs) was investigated by considering series resistance effect in the temperature range of 80-300 K. It is found that in the presence of series resistance, the forward bias C-V plots exhibit a peak, and experimentally show that the peak positions with a maximum at 260 K shift toward lower voltages with increasing temperature. The C-V and (G/w-V) characteristics confirm that the interface state density (N_ss) and series resistance (R_s) of the diode are important parameters that strongly influence the electric parameters of MIS structures. The crossing of the G/w-V curves appears as an abnormality compared to the conventional behavior of ideal Schottky diode. It is thought that the presence of series resistance keeps this intersection hidden and unobservable in homogeneous Schottky diodes, but it appears in the case of inhomogeneous Schottky diode. In addition, the high frequency (C_m) and conductance (G_m/w) values measured under both reverse and forward bias were corrected for the effect of series resistance to obtain the real diode capacitance.     

The interface states analysis of the MIS structure as a function of frequency

The energy distribution of interface states (N_ss) and their relaxation time (τ) were of the fabricated the Al/SiO₂/p-Si (MIS) structures were calculated using the forward bias current-voltage (I-V), capacitance-frequency (C-f) and conductance-frequency (G-f) measurements. Typical ln[I/(1 − exp(−qV/kT)] versus V characteristics of MIS structure under forward bias show one linear region. From this region, the slope and the intercept of this plot on the current axis allow to determine the ideality factor (n), the barrier height (Φ_b) and the saturation current (I_S) evaluated to 1.32, 0.77 eV and 3.05 × 10⁻⁹ A, respectively. The diode shows non-ideal I-V behaviour with ideality factor greater than unity. This behaviour is attributed to the interfacial insulator layer at metal-semiconductor interface, the interface states and barrier inhomogeneity of the device. The energy distribution of interface states (N_ss) and their relaxation time (τ) have been determined in the energy range from (0.37 − E_v) to (0.57 − E_v) eV. It has been seen that the N_ss has almost an exponential rise with bias from the mid gap toward the top of valance band. In contrary to the N_ss, the relaxation time (τ) shows a slow exponential rise with bias from the top of the E_v towards the mid gap energy of semiconductor. The values of N_ss and τ change from 6.91 × 10¹³ to 9.92 × 10¹³ eV⁻¹ cm⁻² and 6.31 × 10⁻⁴ to 0.63 × 10⁻⁴ s, respectively.     

Frequency and gate voltage effects on the dielectric properties of Au/SiO2/n-Si structures

To determine the dielectric constant (ε′), dielectric loss (ε″), loss tangent (tan δ), the ac electrical conductivity (σ_ac) and the electric modulus of Au/SiO₂/n-Si structure, the measurement admittance technique was used. Experimental results show that the values of ε′, ε″, tan δ, σ_ac and the electric modulus show fairly large frequency and gate bias dispersion especially at low frequencies due to the interface charges and polarization. An increase in the values of the ε′ and ε″ were observed with both a decrease in frequency and an increase in frequency. The σ_ac is found to increase with both increasing frequency and voltage. In addition, the experimental dielectrical data have been analyzed considering electric modulus formalism. It can be concluded that the interface charges and interfacial polarization have strong influence on the dielectric properties of metal-insulator-semiconductor (MIS) structures especially at low frequencies and both in depletion and accumulation regions.     

Epitaxial layer induced series resistance and microwave properties of NNP Si X band impatt diodes

Following Gummel-Blue approach [1] [H.K. Gummel, J. L. Blue, IEEE Trans. Electron. Devices 14(1967) pp. 569-572.], the effect of undepleted epitaxial layers on the series resistance (R_s) as well as on its microwave properties of single drift region (n⁺np⁺) Si IMPATT diodes [2] [M. Mitra, M. Das, S. Kar, S.K. Roy, IEEE Trans. Electron. Devices 40(1993) pp. 1890-1893.] with flat doping profile with capacity 0.2PF at X band under experimental bias current of 25 mA and temperature 373 K have been studied. The computation for series resistance fits well with the device data for flat doping profile [2] [M. Mitra, M. Das, S. Kar, S.K. Roy, IEEE Trans. Electron. Devices 40(1993) pp. 1890-1893.]. The same study has also been simulated on its low-high-low (lhl) doping profile counterpart. The value of R_s increases approximately linearly with the increase of undepleted epi-layer thickness determined by the doping density for both flat and lhl structure. The value of R_s decreases remarkably as the doping profile changes from flat to lhl type.     

Photoresponse characteristics of p-Si/n-CuxIn1−xO heterojunction diode prepared by sol-gel spin coating

In the present work, we report on the fabrication and detailed electrical characterization of p-Si/n-Cu_xIn_1−xO heterojunction prepared via the deposition of nanocrystalline Cu_xIn_1−xO thin films on p-type silicon substrate by sol-gel method using spin coating technique. X-ray diffraction and Raman spectroscopy results revealed the polycrystalline nature of Cu_xIn_1−xO thin films consisting diffractions peaks and vibration modes, respectively, corresponding to CuO and In₂O₃. Field-emission scanning electron microscopy showed compact surface morphology while UV–vis absorption spectra exhibited sharp absorption between 300 and 425 nm along with a long tail extending in the visible region. The current-voltage (I-V) characteristics of the fabricated heterojunction demonstrated obvious rectifying behavior in the dark and under illumination. The heterojunction exhibited low reverse leakage current (~10⁻⁷), and upon illumination, the forward current and rectification ratio of the junction was improved while the forward threshold voltage lowered. By fitting the experimental data we have observed that the forward current conduction is dominated by the space charge limited current mechanism.     

Electrical characterization and morphological properties of AlN films prepared by dc reactive magnetron sputtering

Aluminum nitride (AlN) films were deposited by dc reactive magnetron sputtering on p-Si-(1 0 0) substrate in Ar-N₂ gas mixtures. The effects of nitrogen concentration and sputtering power on AlN films deposition rate, crystallographic orientation, refractive index, and surface morphology are investigated by means of several characterization techniques. The results show that AlN films reasonably textured in (0 0 2) orientation with low surface roughness can be obtained with the deposition rate as high as 70 nm/min by the control of either target power or N₂ concentration in the gas mixture. Increasing the dc discharge power, Al atoms are not completely nitridized and the Al phases appear, as well as the AlN phases. MIS (Metal-Insulator-Semiconductor) structures were fabricated and electrically evaluated by I-V (current-voltage) and C-V (capacitance-voltage) measurements at high frequency (1 MHz). The results obtained from C-V curves indicate that charges at the dielectric/semiconductor interface occur, and the dielectric constant values (extracted under strong accumulation region) are compatible with those found in literature.     

Calculation from the current-voltage and capacitance-voltage measurements of characteristics parameters of Cd/CdS/n-Si/Au-Sb structure with CdS interface layer grown on n-Si substrate by SILAR method

The CdS thin film has been directly formed on n-type Si substrate to form an interfacial layer between cadmium (Cd) and n-type Si with Successive Ionic Layer Adsorption and Reaction (SILAR) method. An Au-Sb electrode has been used as an ohmic contact. The Cd/CdS/n-Si/Au-Sb structure has demonstrated clearly rectifying behaviour by the current-voltage (I-V) curves studied at room temperature. The characteristics parameters such as barrier height, ideality factor and series resistance of Cd/CdS/n-Si/Au-Sb structure have been calculated from the forward bias I-V and reverse bias C⁻²-V characteristics. The diode ideality factor and the barrier height have been calculated as n = 2.06 and Φ_b = 0.92 eV by applying a thermionic emission theory, respectively. The diode shows non-ideal I-V behaviour with an ideality factor greater than unity that can be ascribed to the interfacial layer, the interface states and the series resistance. At high current densities in the forward direction, the series resistance (R_s) effect has been observed. The values of R_s obtained from dV/d(lnI)-I and H(I)-I plots are near to each others (R_s = 182.24 Ω and R_s = 186.04 Ω, respectively). This case shows the consistency of the Cheung′s approach. In the same way, the barrier height calculated from C⁻² -V characteristics varied from 0.698 to 0.743 eV. Furthermore, the density distribution of interface states (N_ss) of the device has been obtained from the forward bias I-V characteristics. It has been seen that, the N_ss has almost an exponential rise with bias from the mid gap toward the bottom of conduction band.     

电子封装微晶玻璃基板的介电性能

研究了堇青石基微晶玻璃介电性能随测试温度和测试频率变化的温度特性和频率特性。结果说明，未添加和添加氧化铋的微晶玻璃的极化机理表现为离子极化，而添加稀土氧化铈的微晶玻璃的极化机理表现为空间电荷极化。介电性能的温度特性说明，添加稀土氧化铈的微晶玻璃样品介电损耗随温度的增加而增加，其他样品的介电损耗随测试温度基本不变，并基于德拜(Debye)弛豫方程作了分析。所有样品的介电常数随温度的增加基本不变。介电性能的频率特性说明极化弛豫普适定律适用于堇青石基微晶玻璃。     

变容二极管C-V特性的控制技术

本文针对变容二极管生产难点：C－V曲线的控制,在理论上分析了PN结纵横向结构对PN结C－V特性、串联电阻、反向电流的影响,得出了适当减小芯片面积,调高杂质浓度可以不增大串联电阻而减小反向电流、改善C－V特性的结论,并应用于生产。     

The effect of frequency and temperature on capacitance/conductance–voltage (C/G–V) characteristics of Au/n-GaAs Schottky barrier diodes (SBDs)

The capacitance–voltage (C–V) and conductance–voltage (G/ω–V) characteristics of the Au/n-GaAs Schottky barrier diodes (SBDs) have been investigated for 10, 100 and 500 kHz at 80 and 280 K. To evaluate the reason of non-ideal behavior in C–V and G/ω–V plots, the measured C and G/ω values were corrected by taking into accounts series resistance effect. Experimental results show that the values of C and G/ω were found to be a strong function of interface states (N_ss) at inverse and depletion regions especially at low frequencies, but R_s is effective only at the accumulation region especially at high frequencies. Such behavior of the C and G/ω values may be attributed to an increase in polarization especially at low frequencies and the existence of N_ss or dislocations between metal and semiconductor. It can be concluded that the increase in C and G/ω at low frequencies especially at weak and depletion regions results from the existence of N_ss. The values of doping concentration (N_d) and barrier height (BH) between metal and semiconductor were also obtained from the linear part of high frequency (500 kHz) C⁻² vs. V plots at 80 and 280 K, respectively.     

Fabrication and electrical characteristics of Schottky diode based on organic material

The current-voltage (I-V), capacitance-voltage (C-V) and capacitance-frequency (C-f) characteristics of Al/Orange G/n-Si/AuSb structure were investigated at room temperature. A modified Norde’s function combined with conventional forward I-V method was used to extract the parameters including barrier height (BH) and the series resistance. The barrier height and series resistance obtained from Norde’s function was compared with those from Cheung functions, and it was seen that there was a good agreement between series resistances from both methods. The C-V characteristics were performed at 10 kHz and 500 kHz frequencies, and C-f characteristics were performed 0.0 V, +0.4 V and −0.4 V.