Chemical vapour deposition of tungsten films for metallization of integrated circuits

New materials and processes are required for the metallization of very large- scale integrated circuits. Tungsten offers several advantages as a contact barrier, low resistance gate material and metal for interconnections. Conventional, plasma- enhanced and laser-induced chemical vapour deposition processes used to produce tungsten films are described. The basic reactions involved are either pyrolysis of the carbonyl (W(CO)₆) or reduction of halides (WCl₆ and WF₆). The mechanism of tungsten deposition via the H₂ and silicon reduction of WF₆ is discussed. The physical properties of tungsten films (resistivity, W-Si contact resistance) and the charateristics of Schottky barrier diodes and W/SiO₂/Si structures are reviewed. The chemical properties of tungsten films, including W-Si reactivity (thermal stability of W-Si contacts) and suitable etching solutions are presented. Several applications of tungsten films for metallization of integrated circuits are examined.     

Electromigration testing of Ti: W/Al and Ti: W/Al-Cu film conductors

Electromigration-induced failures in metal film interconnections influence the reliability of integrated circuits. For shallow (< 1 μm) junction devices a barrier- metal interconnection system such as Ti: W/Al has been proposed to eliminate contact pitting due to silicon-aluminum reactions. The addition of copper to aluminum films is known to improve the electromigration resistance of aluminum film interconnections. Glass-passivated Ti: W/Al and Ti: W/Al-Cu (1.6 wt.% Cu) film conductors (9 μm wide, 1.14 mm long and 170 nm/800 nm thick) on oxidized silicon substrates were subjected to a current stress of 10⁶ A cm^-2 in the temperature range 150–270°C. Mean-time-to-failure data indicate an improvement of approximately a factor of two in electromigration resistance due to the addition of copper. This improvement is smaller than that reported by others. Life test data are consistent with activation energies of 0.61±0.05 and 0.71±0.03 eV for Ti: W/Al and Ti: W/Al-Cu film conductors respectively. Extrapolated mean times to failure are close to 24 and 100 a for Ti: W/Al and Ti: W/Al-Cu films respectively under a current stress of 5 × 10⁵ A cm^-2 at 55°C ambience. Projected failure rates at these operating conditions increase very rapidly with time and approach values of 9 × 10^-7 and 1 × 10^-11 h^-1 for Ti: W/Al and Ti: W/Al-Cu film conductors respectively at 100 000 h.     

Limitation of Ti/TiN diffusion barrier layers in silicon technology

The usefulness of Ti/TiN and TiSi₂/TiN bilayers as low resistive contacts and diffusion barriers between doped silicon and aluminium has been examined. The Ti layer was magnetron sputtered and the TiN layers were deposited by reactive magnetron sputtering in an argon/nitrogen mixture. After Ti/TiN deposition part of the samples were annealed in a vacuum furnace to form a TiSi₂/TiN structure. The films were characterized by Rutherford backscattering spectrometry (RBS), X-ray diffractometry (XRD) and resistivity measurements. The integrity of the final metallization systems, with aluminium as top level, for annealing temperatures in the range 400–600°C was evaluated by RBS and electrical measurements on fully processed test vehicles containing structures for contact resistivity measurements and shallow implanted gated diodes. A significant discrepancy has been observed between recorded RBS data and electrical measurements. No reaction was detected by RBS at temperatures below 525°C although a significant degradation of the electrical performance was readily observed at lower annealing temperatures, e.g. an increase in contact resistance and large reverse leakage currents. It is concluded that RBS, commonly used in the study of diffusion barrier properties, gives optimistic information on the upper limit of the metallurgical stability of the barrier layers, whereas other factors such as step coverage, compositional variation and mechanical stress are of predominant significance when actual device metallization is concerned.     

General aspects of barrier layers for very-large-scale integration applications II: Practice

Metallization schemes used to establish electrical contact to the silicon in planar integrated circuits are reviewed with an emphasis on the role that diffusion barriers play in them. Some of the ideas that led to the development of metallization schemes in the past are retraced on the basis of examples (e.g. beam lead technology, TiN, Ti: W, Ni/Cu). It is shown that the implementation often embodied concepts not initially recognized. The increased understanding of thin film phenomena that has resulted from the development of new analytical methods is likely to lead to corresponding improvements in future barrier layer designs.     

Degradation mechanisms in 2 W MESFETs

Biased life tests and thermal storage at different temperatures have been performed on 2 W GaAs MESFETs from two different suppliers. Failure modes and mechanisms are correlated to device technology and are thermally activated. In samples with Au/Pd/Ti gate metallization we observed a decrease of I_dss current and an increase of the gate diode reverse current. The former is related to the gate-semiconductor interaction, whereas annealing of GaAs surface states is responsible for the latter, which can cause the device burn-out. These degradations exhibit activation energies of 1 eV and 1.5 eV, respectively. In samples with Al gate metallization, we measured an increase of parasitic resistances possibly deriving from a degradation of the ohmic contacts.     

Electrical degradation of n-Si/PtSi/(TiW)/Al Schottky contacts induced by thermal treatments

Degradation of n-Si/PtSi/(TiW)/Al Schottky contacts was observed for thermal treatments at 500–550°C. The barrier height decreases from 0.86 to about 0.60 V and then rises to 0.70 V. A striking correlation between metallurgical interdiffusion, growth of intermetallic compounds and electrical degradation is reported.     

Catastrophic Au-Si eutectic formation in certain W/Au metallizations on oxidized silicon wafers

Since Au beam leads are desirable in termination areas of certain large scale integrated circuits (LSI) containing W metallization, the question arises as to whether W/Au combinations on oxidized silicon can withstand any of the high temperature LSI processing steps. We have found that heating certain Si/SiO₂/W/ Au thin film combinations to 900°C can sometimes lead to catastrophic Au-Si eutectic formation. The eutectic formation is always associated with a few pinholes in the SiO₂ and/or cracks in the W film. Once formed, it can spread rapidly over the surface of the Au layer. It tends to wet the W/SiO₂/Si interfaces leaving a brown residue under the W metallization and causing loss of adhesion. It can also promote WSi₂ formation in the W layer. Such catastrophic metallurgical interactions underline the need to control the metal film stresses, especially when multilayer metallization schemes are employed.     

Aluminum alloying in silicon integrated circuits

The metallization step in the fabrication of silicons devices and integrated circuits requires the alloying of silicon to aluminium to create ohmic contacts in the window regions. This heat treatment often results “spearing” which, especially in integrated circuits, represents a significant failure mode. The topology and kinetics of the spearing process are discussed and evidence is presented which tendsto suggest a liquid phase reaction between silicon and aluminium. A variety of metallization techniques, involving aluminium, by which it is believed spearing can be prevented are also discussed.     

The use of novel PtSi thin film structures in preferential sputtering measurements

The yields of silicon and platinum from the argon sputtering of PtSi films were measured by Rutherford backscattering techniques. Novel thin film structures of Al₂O₃ (substrate)/W/PtSi were employed to facilitate the measurements. Before steady state was reached, more silicon than platinum was sputtered off, in good agreement with platinum enrichment measurements in the sputtered samples. At steady state the silicon and platinum sputtering yields were equal.     

Stable ohmic contact to GaAs with TiN diffusion barrier

Ti/TiN/Ag ohmic contacts to p-type GaAs were studied. The contacts were formed by a solid phase reaction between titanium and GaAs. The interposed TiN film acts as an excellent diffusion barrier in two respects. It confines the reactions between titanium and GaAs, and it prevents the intermixing of the top silver layer with titanium and GaAs below. The contact resistivity of this metallization system is stable up to 500°C for 2 h.     

A TaSix barrier for low resistivity and high reliability of contacts to shallow diffusion regions in silicon

It is shown that a thin TaSi_x layer underneath the aluminium-based metallization considerably improves the contacts from the metallization to shallow diffusion regions in silicon. TaSi_x with x < 2 acts as a barrier against aluminium and silicon diffusion at the contacts and thus impedes aluminium spiking as well as silicon precipitates in the contacts. Furthermore the silicon erosion induced by high currents is reduced by one order of magnitude. The contact resistance to n⁺ -Si is decreased by a factor of 3–5. Finally the TaSi_x provides a low barrier Schottky diode on lightly doped n-Si and p-Si.     

Contact resistivity measurements of the buried Si-ZnO:Al interface of polycrystalline silicon thin-film solar cells on ZnO:Al

An experimental method is developed for contact resistivity measurements of a buried interface in polycrystalline silicon (poly-Si) thin-film solar cell devices on aluminum doped zinc oxide (ZnO:Al) layers. The solar cell concept comprises a glass substrate covered with a temperature-stable ZnO:Al film as transparent front contact layer, a poly-Si n⁺/p⁻/p⁺ cell, as well as a metal back contact. Glass/ZnO:Al/poly-Si/metal test stripe structures are fabricated by photolithographic techniques with the ZnO:Al stripes locally bared by laser ablation. The high-temperature treatments during poly-Si fabrication, e.g. a several hours lasting high-temperature step at 600 °C, are found to have no detrimental impact on the ZnO:Al/Si interface contact resistivity. All measured ρ_C values range well below 0.4 Ω cm² corresponding to a relative power loss ΔP below 3% for a solar cell with 500 mV open circuit voltage and 30 mA/cm² short circuit current density. By inclusion of a silicon nitride (SiN_x) diffusion barrier between ZnO:Al and poly-Si the electrical material quality of the poly-Si absorber can be significantly enhanced. Even in this case, the contact resistivity remains below 0.4 Ω cm² if the diffusion barrier has a thickness smaller than 10 nm.     

A comparison of layered metal-semiconductor optical position sensitive detectors

Position sensitive detectors (PSDs), utilize the lateral photovoltaic effect to produce an electrical output that varies linearly with the position of a light spot incident on a semiconductor junction. In fabricating PSDs, two key elements are optimized: the sensitivity, (mV/increment) and the linearity of the electrical output. Sensitivity is optimized by varying properties of the junction layers, particularly resistivity, while linearity is determined primarily by junction uniformity. In this paper, Schottky barrier PSDs are fabricated from the electron-beam deposition of titanium, tantalum and aluminum on to p-type silicon substrates. Devices were tested under focused broad-band white light and the sensitivities and linearities, for the different metals with varying thicknesses, are compared. Overall, Ti and Ta PSDs performed very well over a large range of film thicknesses, 50 to 2000 /spl Aring/, while Al was more limited. The best of all the devices fabricated so far was one with 380 /spl Aring/ film of Ti, giving a sensitivity, or output, of 10.62 mV/mm while maintaining excellent linearity and spatial resolution. The best aluminum devices were obtained with a 100 /spl Aring/ film and resulted in a sensitivity of 8.84 mV/mm and a spatial resolution of better than 10 /spl mu/m. Of the tantalum devices, film thicknesses of around 200 /spl Aring/ produced the highest sensitivities.     

ZnO上欧姆接触的研究进展

为制备高性能的ZnO基器件如UV光发射器，探测器、场效应晶体管，在ZnO上形成优良的金属电极是十分必要的。回顾了近年来ZnO上制备欧姆接触的新进展，对在n型ZnO上制备欧姆接触的Al，A1/Pt，A1/Au，Ti/Al，Ti，AU，Ti/A1/Pt/Au，Re/Ti/Au等金属化方案的性能与特点，以及影响欧姆接触电阻率和热稳定性的因素，如表面处理和退火等进行了分析与归纳。同时，对P型ZnO上难以获得低接触电阻的原因进行了讨论。文章还简要说明了ZnO上透明欧姆接触的研究现状，指出获得低阻、高导电、高透光和高热稳定性的接触是未来ZnO基光电器件的发展方向。     

Influence of silicon in aluminium on the mechanical properties of titanium/aluminium friction joints

The influence of post-weld heat-treatment and of residual silicon in aluminium on the mechanical properties of dissimilar friction joints between titanium and aluminium was investigated. Although joint tensile strength and bend test properties were drastically reduced following post-weld heat treatment, the responses of Ti/h.p. Al and Ti/c.p. Al joints were quite different. The tensile strength and bend test properties of Ti/h.p. Al joints were markedly decreased by heat-treatments involving shorter holding times at lower temperatures.Joint failure in post-weld heat-treated joints was associated with Al₃Ti formation at the bondline region. The growth rate of the Al₃Ti intermetallic layer at the joint interface was much faster in post weld heat-treated Ti/h.p. joints. More than 20 at%Si segregated in the region between the titanium substrate and the Al₃Ti intermetallic phase in heat-treated Ti/c.p. Al joints. It is suggested that silicon segregation retards Al₃Ti formation by acting as a barrier to titanium and aluminium diffusion at the joint interface.     

Single crystalline PtSi nanowires, PtSi/Si/PtSi nanowire heterostructures, and nanodevices

We report the formation of PtSi nanowires, PtSi/Si/PtSi nanowire heterostructures, and nanodevices from such heterostructures. Scanning electron microscopy studies show that silicon nanowires can be converted into PtSi nanowires through controlled reactions between lithographically defined platinum pads and silicon nanowires. High-resolution transmission electron microscopy studies show that PtSi/Si/PtSi heterostructure has an atomically sharp interface with epitaxial relationships of Si[110]//PtSi[010] and Si(111)//PtSi(101). Electrical measurements show that the pure PtSi nanowires have low resistivities approximately 28.6 microOmega.cm and high breakdown current densities>1x10(8) A/cm2. Furthermore, using single crystal PtSi/Si/PtSi nanowire heterostructures with atomically sharp interfaces, we have fabricated high-performance nanoscale field-effect transistors from intrinsic silicon nanowires, in which the source and drain contacts are defined by the metallic PtSi nanowire regions, and the gate length is defined by the Si nanowire region. Electrical measurements show nearly perfect p-channel enhancement mode transistor behavior with a normalized transconductance of 0.3 mS/microm, field-effect hole mobility of 168 cm2/V.s, and on/off ratio>10(7), demonstrating the best performing device from intrinsic silicon nanowires.     

Silicon gettering: Some novel strategies for performance improvements of silicon solar cells

This paper reports the recent performance improvements in crystalline silicon solar cells. These have been achieved by a combination of two mechanisms. One is related to the solar cell design which consists of grooving silicon substrates to obtain a structure suitable to perform an efficient gettering process. The proposed structure consists of buried emitter contacts rear locally diffused. Chemical-vapour etching has been used in the process sequence both to realize buried contacts and opening periodic arrangement of small deep grooving holes, for local aluminum diffusion. The second consists to perform a gettering sequence by Rapid Thermal (RT) heat treatments of p-type silicon in an infrared furnace, in controlled silicon tetrachloride (SiCl₄) and N₂ gas atmosphere. The resulting silicon shows an increase of minority drift mobility determined by Hall Effect to reach 1417 cm² V^{− 1} s^{− 1}, and a decrease in resistivity over 40 μ m on both sides of silicon substrates. Moreover, Light Beam Induced Current (LBIC) investigations show an improvement of diffusion bulk lengths (L_n) to ward 210 μ m as compared to silicon starting substrates.     

Al and Ti/Al contacts on n-GaN

Al(60 nm) and Ti(40 nm)/Al(160 nm) metal layers have been deposited by thermal evaporation onto n-GaN epitaxial layers grown by metal organic chemical vapour deposition (MOCVD) on a c-plane sapphire substrate. The samples have been annealed at 300, 400, 700 or 900 °C for 10 min in vacuum. The microstructural and electrical properties of the contacts have been investigated by electron microscopy, X-ray diffraction and by current-voltage measurements. As-deposited Al and Ti/Al contacts were rectifying with Schottky barrier heights below 0.35 eV and 0.38 eV, respectively. After heat treatment at 300 °C and 400 °C both contacts exhibited linear current-voltage characteristics. After annealing at 700 °C Al contacts became rectifying with a barrier height of 0.42 eV, while Ti/Al contacts remained nearly linear at the same temperature. The electrical characteristics and XRD analysis indicated that the upper metal in Ti/Al contact diffused in the Ti layer already during deposition. Cross-sectional transmission electron microscopy revealed that in the case of Ti/Al contacts, the continuity of the Ti layers ceased when annealing above 700 °C. X-ray diffractions showed, that a Ti₂N interface phase formed in Ti/Al contacts at 700 and 900 °C, and an AlN interface phase developed in the same contact at 900 °C.     

Titanium nitride diffusion barrier for copper metallization on gallium arsenide

The diffusion properties of Cu, Cu/titanium nitride (TiN) and Cu/TiN/Ti metallization on GaAs, including as-deposited film and others annealed at 350-550 °C, were investigated and compared. Data obtained from X-ray diffractometry, resistivity measurements, scanning electron microscopy, energy dispersive spectrometer and Auger electron spectroscopy indicated that in the as-deposited Cu/GaAs structure, copper diffused into GaAs substrate, and a diffusion barrier was required to block the fast diffusion. For the Cu/TiN/GaAs structure, the columnar grain structure of TiN films provided paths for diffusion at higher temperatures above 450 °C. The Cu/TiN/Ti films on GaAs substrate were very stable up to 550 °C without any interfacial interaction. These results show that a TiN/Ti composite film forms a good diffusion barrier for copper metallization with GaAs.     

The role of silicon in wetting and pressureless infiltration of SiCp preforms by aluminum alloys

Silicon plays an important role in the production of Al/SiC metal matrix composites. As an alloying element in aluminum, silicon retards the kinetics of the chemical reactions that result in the formation of the unwanted intermetallics Al₄C₃ and Al₄SiC₄. As a thin coating on silicon carbide, silicon becomes an active participant in a thermally activated chemical reaction that enhances wetting of silicon carbide by aluminum alloys. Consequently, Al/SiC composites made with siliconized silicon carbide and silicon rich aluminum alloys show mechanical properties that are significantly different from those of similar composites produced with unsiliconized silicon carbide or with aluminum alloys that do not contain silicon. It is shown that a silicon coating on SiC significantly enhances wetting of SiC particles by aluminum alloys, reduces porosity, does not affect the modulus of elasticity, but decreases the modulus of rupture of Al/SiC metal matrix composites.