闭环数字输入D类放大器实现卓越音质

传统的开环设计D类放大器对电源的纹波电流很敏感，会把耦合至音频段的纹波放大，产生音频干扰，因此通常需要精密设计、成本较高的低纹波电流电源。 德州仪器（TI）的数字输入20W立体声D类扬声放大器TAS5706采用闭环反馈技术，实现了出色的电源抑制比（PSRR），可补偿电源纹波对功放的影响，降低耦合至音频段的电源噪声，放宽了对电源的要求，在电压波动时也可保持恒定的输出功率，允许工程师设计更低成本的电源。     

一种基于广义预测控制算法的数字功放系统研究

主要介绍了采用广义预测控制算法建立数字功放模型来改善数字功放系统性能.通过Matlab软件对模型进行仿真,验证采用广义预测控制算法能够抑制电源噪声并降低开关管切换时间、电压和电流检测误差及元件参数漂移对输出的影响,提高数字功放的音质.     

互补对称式D类放大器

用两个相同的D类放大器构成的对称互补电路能极大地抑制D类放大器的输出纹波并提高D类放大器的效率.计算机仿真结果表明,互补对称式D类放大器抑制输出纹波作用明显.     

DC/DC电源中的纹波抑制设计

介绍了一种有效抑制纹波的实现方法。并用实验结果表明,采用文中的方案可对DC/DC电源的输出纹波进行有效的抑制,可以改善供电设备的稳定性。     

D类音频功放的自动增益控制系统

设计实现了一种用于D类音频功率放大器中的自动增益控制系统,通过自动调整D类功放的增益,增大了D类音频功放的输入信号范围,避免了削波失真,使得D类音频功放能够在较宽信号输入范围内保持良好的总谐波失真(THD),且不影响输出功率.该集成了自动增益控制系统的2.5 W单声道D类音频功放已经采用0.5 μm CMOS工艺实现.测试表明,在电源电压5 V、功放增益18 dB、负载4 Q的条件下,访D类音频功放能够在0～2.3 Vrms的信号输入范围内保持总谐波失真加噪声(THD+N)<2%,最大输出功率2.1 W.     

开关电源纹波抑制研究

提出开关电源纹波的定义,分析开关电源纹波产生的原因,并提出几种抑制纹波的方法。最后针对一款特殊开关电源,论述了开关电源的输出稳定性问题。该电源输出电流为10A,输出电压为12V,主要用于驱动半导体激光器。为减小输出电流纹波,提高激光功率稳定性,研究分析了几种抑制纹波的方法,包括滤波法,多路叠加法等。该电源的设计采用主、副电源的思路,从主电源采集纹波信号反馈给副电源的控制端,从而使主副电源输出叠加后保持较小的输出纹波。通过实验验证该方法可以使纹波系数保持在1%,使得性能有所提高。     

一种高效2.1声道D类音频功放设计

基于CSMC 0.5μm DPDM CMOS工艺,实现了一种具有2.1声道的D类音频功率放大器的设计,该功放由一个全桥差分输出结构的重低音功率放大器和两个半桥单端输出结构的立体声功率放大器构成。详细介绍了2.1声道D类音频功放的整体结构、前置运算放大器和轨至轨比较器的电路设计。仿真和测试结果表明:在电源电压5 V,该功放可向3Ω负载电阻提供2.5 W+0.6 W×2的输出功率;在电源电压3～6 V范围内,最大转换效率可达90%以上;重低音通道的总谐波失真与噪声之和小于0.7%,立体声通道的总谐波失真与噪声之和小于1%。     

一种星载功放调制电源设计

针对某星载功放调制电源支持连续和脉冲输出两种工作模式,具有负压故障停止功放供电的特殊功能要求,采用了一种以宇航级DC/DC模块作为核心器件,外围辅以浪涌抑制电路、遥控电路、EMI滤波电路、输出调制电路的设计方案。通过实物测试和改进,该功放调制电源能够连续稳定输出,也可以脉冲输出（脉宽为3.5 s、10 s）,连续输出时效率大于82%,纹波小于30 mV。同时,针对星载使用条件,采用抗辐照、高可靠性设计。目前该电源已在轨成功工作,为星载功放调制电源的研发提供了很好的设计参考。     

一种高效率低电源噪声电荷泵的设计

提出了一种高效率低电源噪声的电荷泵DC-DC转换器设计,采用多增益工作模式,可有效提高在不同输入电源电压下的效率;同时采用低噪声控制方法-线型模式控制方法,既可以减小电荷泵输出电压纹波,又可以减小电源电流纹波,降低噪声.基于CSMC 0.6 μm BiCMOS工艺,Cadence仿真结果显示,此设计降低了电源噪声,并且在不同输入电源电压下均能保持较高效率,输出轻负载(36 mA)时效率可达94%.     

基于D类功放的宽范围可调电源的设计

结合PWM电源的原理对D类功放的工作原理进行了分析，提出了在D类功放基础上构建PWM正负可调电源的方法，并在成品D类功放器件基础上实现经济实用的电源进行了成功的尝试。     

A 280 mW, 0.07% THD+N class-D audio amplifier using a frequency-domain quantizer

Pulse density modulation (PDM) based class-D amplifiers can reduce non-linearity and tonal content due to carrier signal in pulse width modulation based amplifiers. However, their low-voltage analog implementations also require a linear loop filter and a quantizer. A PDM based class-D audio amplifier using a frequency-domain quantization is presented. The digital intensive frequency-domain approach achieves high linearity under low supply regimes. An analog comparator and a single-bit quantizer are replaced with a current controlled oscillator (ICO) based frequency discriminator. By using the ICO as a phase integrator, a third-order noise shaping is achieved using only two analog integrators. A single-loop, single-bit, class-D audio amplifier is presented with an H-bridge switching power stage, which is designed and fabricated on a 0.18???m CMOS process with 6 layers of metal achieving a total harmonic distortion plus noise (THD+N) of 0.065% and a peak power efficiency of 80% while driving a 4-?? loudspeaker load. The amplifier can deliver the output power of 280 mW.     

D类音频功率放大器的研究与实现

介绍了采用D类放大器来完成音频信号变换与放大的电路设计。D类放大器采用了改进的方案,即用FPGA作为逻辑控制器实现对PWM H全桥功率放大电路的控制。设计的D类放大器可对数字音源输出的音频信号进行直接放大,为数字音源和功率放大的整合提供了完整的解决方案。他具有比其他类型放大器更高的效率和更低的转换失真,正越来越多地应用在便携式器件中,因此设计课题具有很好的现实意义。     

A high efficiency PWM CMOS class-D audio power amplifier

Based on the difference close-loop feedback technique and the difference pre-amp, a high efficiency PWM CMOS class-D audio power amplifier is proposed. A rail-to-rail PWM comparator with window function has been embedded in the class-D audio power amplifier. Design results based on the CSMC 0.5 μm CMOS process show that the max efficiency is 90%, the PSRR is -75 dB, the power supply voltage range is 2.5-5.5 V, the THD+N in 1 kHz input frequency is less than 0.20%, the quiescent current in no load is 2.8 mA, and the shutdown current is 0.5 μA. The active area of the class-D audio power amplifier is about 1.47 × 1.52 mm2. With the good performance, the class-D audio power amplifier can be applied to several audio power systems.     

低失真正弦波逆变电源设计

D类功率放大器是一种相当成熟的宽频率功率低失真放大器件,直接用他构成当前大量使用的逆变电源核心电路,具有正弦波形失真低,电路结构简化,易于扩展设计等特点。使用现有技术成熟的成品器件有利于减少专用电源器件的开发和设计费用。通过对TDA7490的正弦逆变电源运用设计,尝试出一种利用D类开关音频器件设计低失真逆变电源的方法。     

高效D类音频功率放大器的设计

D类功率放大器适应便携设备高效节能的客观需求,从而在音频模拟集成领域具有优势,随着设计技术的不断进步,D类功率放大器的性能指标也逐渐接近AB类放大器。通过分析基于CMOS工艺的D类音频功率放大器构成、驱动实现、性噪比、失真度等方面的特性来简要描述此类电路的设计思路。同时具体讨论了D类音频放大器各模块的工作原理和设计要点,针对设计要求比较高的驱动部分、抗干扰和噪声抑制部分以及抗EMS的设计都做了较详细的分析和论述。     

Carrier Distortion in Hysteretic Self-Oscillating Class-D Audio Power Amplifiers: Analysis and Optimization

An important distortion mechanism in hysteretic self-oscillating (SO) class-D (switch mode) power amplifiers-carrier distortion-is analyzed and an optimization method is proposed. This mechanism is an issue in any power amplifier application where a high degree of proportionality between input and output is required, such as in audio power amplifiers or xDSL drivers. From an average-mode point of view, carrier distortion is shown to be caused by nonlinear variation of the hysteretic comparator input average voltage with the output average voltage. This easily causes total harmonic distortion figures in excess of 0.1-0.2%, inadequate for high-quality audio applications. Carrier distortion is shown to be minimized when the feedback system is designed to provide a triangular carrier (sliding) signal at the input of a hysteretic comparator. The proposed optimization method is experimentally proven in an audio power amplifier leading to THD figures that are comparable to the state of the art. Experimental hardware is a hysteretic SO bandpass current-mode-controlled single-ended audio power amplifier capable of 45 W into 8 Omega or 80 W into 4Omega from a plusmn34 V supply with less than 0.03% THD from 100 Hz to 6.7 kHz. Carrier distortion is shown to account for this limitation in THD performance.     

CMOS PWM D类音频功率放大器的过流保护电路

基于Class-D音频功率放大器的应用,采用失调比较器及单边迟滞技术,提出了一种过流保护电路,其核心为两个CMOS失调比较器。整个电路基于CSMC0.5μmCMOS工艺的BSIM3V3Spice典型模型,采用Hspice对比较器的特性进行了仿真。失调比较器的直流开环增益约为95dB,失调电压分别为0.25V和0.286V。仿真和测试结果显示,当音频放大器输出短路或输出短接电源时,过流保护电路都能正常启动,保证音频放大器不会受到损坏,能完全满足D类音频放大器的设计要求。过流保护电路有效面积为291μm×59.5μm。     

直接式数字功放技术

音响用的数字功放,普遍由开关电源模块和数字功放模块这两部分组成。非常多的科技人员在研究一个课题:用声频信号调制开关电源模块,开关电源不再输出直流电压,而是直接输出放大的声频信号,进而免去数字功放模块。介绍了一种将开关电源直接设计成数字功放的技术,能简化电路,提高稳定性,能为数字功放带来开关电源软开关技术所具有的优点。     

Performance comparison of integrated fully-differential filterless class-D amplifiers with different feedback techniques

Two integrated stereo fully differential filterless class-D amplifiers are presented in this paper. The object is to develop a modulation of a class-D audio amplifier with high power efficiency in this paper. The traditional H-bridge class-D audio amplifier has a shortcoming of large signal distortion which is worse than realized. However, the proposed circuit improves the drawback and provides high power efficiency at the same time. The circuit implements a modified scheme of pulse-width modulation. In this paper, we presented two class-D amplifiers, compared their differences and explained why the efficiency and distortion performance can be modified. The increase in total harmonic distortion (THD) is due to non-linearity in the triangle wave. To overcome this problem, a negative feedback from the output of the switching power stage is adopted to reduce the THD. When a 0.7-V_PP and 1 kHz sine wave is used as an input signal, the minimum THD is 0.029 % and the maximum power efficiency is 83 %. The fully differential class-D audio amplifier is implemented with a TSMC 0.35-μm 2P4M CMOS process, and the chip area is 2.57 × 2.57 mm² (with PADs).     

An integrated 200-W class-D audio amplifier

An integrated stereo class-D audio power amplifier realized in a silicon-on-insulator (SOI)-based BCD technology is presented. The amplifier is capable of delivering 2/spl times/100 W in two 4-/spl Omega/ loads at a supply voltage of 60 V. A second-order feedback loop is used to suppress supply ripple and pulse-shape errors in the switching power stage. The limiting factor in the performance of any class-D amplifiers is the quality of the switching power stage. A high-speed low-current levelshifter and a robust deadtime control arrangement are proposed that enable the realization of a robust high-quality switching power stage. Some practical issues with respect to robustness and electromagnetic compatibility are discussed.