3D堆叠芯片硅通孔容错设计

3D堆叠芯片采用硅通孔（Through-Silicon Vias,TSVs）技术垂直连接多个裸晶（die）,具有较高的芯片性能和较低的互连损耗,引起工业界和学术界的广泛关注。随着3D芯片堆叠层数的增加,一个TSV小故障都可能导致成本的大幅度增加和芯片良率的大幅度降低。TSV的密度与故障的发生概率有着密切的关系,TSV密度较大时,其发生故障的概率就会增大。为了减少故障产生的概率,提高良率,提出一种以密度为导向的TSV容错结构,首先将TSV平面分成多个密度区间,密度较大区间的信号TSV被分配较多的修复TSV,但同时此区间上设计尽量少的修复TSV,以减少此区间内总的TSV密度。理论分析和实验结果均表明该方法可以有效地减少故障发生的概率,并对故障TSV进行修补,同时具有较小的硬件代价。     

Thermal-Aware Post Layout Voltage-Island Generation for 3D ICs

To reduce the interconnect delay and improve the chip performance, three-dimensional (3D) chip emerged with the rapid increasing of chip integration and chip power density. Therefore, thermal issue is one of the critical challenges in 3D IC design due to the high power density. Multiple Supply Voltages (MSV) technique provides an effcient way to optimize power consumption which in turn may alleviate the hotspots. But the voltage assignment is limited not only by the performance constraints of the design, but also by the physical layout of circuit modules since the modules with the same voltage should be gathered to reduce the power-network routing resource. Especially in 3D designs, the optimization using MSV technique becomes even more complicated since the high temperature also inffuences the power consumption and delay on paths. In this paper, we address the voltage-island generation problem for MSV designs in 3D ICs based on a mixed integer linear programming (MILP) model. First, we propose a general MILP formulation for voltage-island generation to optimize thermal distribution as well as power-network routing resources while maintaining the whole chip performance. With the thermal-power interdependency, an iterative optimization approach is proposed to obtain the convergence. Experimental results show that our thermal-aware voltage-island generation approach can reduce the maximal on-chip temperature by 23.64% with a reasonable runtime and save the power-network routing resources by 16.71%.     

Evaluation of Si liquid cooling structure with microchannel and TSV for 3D application

The development of 3D integration has caused a major technology paradigm shift to all integrated circuit (IC) devices, interconnects, and packages. Despite the benefits of 3D integration, this process faces the key challenge of thermal management, especially for high power and high density IC devices. Due to the limitations of conventional thermal solutions, liquid cooling technology has become a field of great interest for IC thermal management. In this study, an on-chip liquid cooling module with three different through Si vias (TSVs) and a fixed microchannel structure has been fabricated on an Si wafer using deep reactive ion etching and anodic bonding, followed by a grinding and dicing process. Pressure drop, coolant flow, and temperature difference before and after liquid flow were experimentally measured. TSV depth and diameter have been shown to have little effect on the change of pressure drop; however, shallower TSV depth and larger TSV diameter led to improved liquid cooling performance. The trapezoidal TSV showed slightly more effective cooling than did the scalloped TSV or the straight TSV.

     

应用于三维集成电路解析式布局的层分配算法

层分配是解析式三维集成电路布局算法中的关键一步。解析式布局需要通过层分配将连续的三维空间中的单元划分到二维的芯片层上,这个过程会破坏之前三维空间中得到的连续解。为了实现从优化的三维布局到合法的多层二维结构的平滑过渡,提出一种使用最小代价流的层分配方法,尽可能地继承三维优化结果,保护解空间。将此层分配算法嵌入到多层次的解析式三维集成电路布局算法中,以总线长和穿透硅通孔数目的加权总和为目标,面积密度为约束条件,对比当前其他三维布局算法,该算法得到较好的线长结果、穿透硅通孔数量和运行时间。     

A numerical solution for the problem of an impacted fiber-reinforced viscoelastic half-space

The response to a time-dependent external load of a viscoelastic half-space reinforced by oblique elastic fibers is obtained. The viscoelastic matrix is assumed to be described by any model of viscoelasticity, and the fibers are allowed to occupy arbitrary volume within the matrix and to possess any elastic moduli. A numerical method of solution is presented together with its stability and convergence, and the accuracy of the results examined.     

小区三维GIS的一种集成建模方案

三维GIS是GIS的重要发展方向,在数字地球走向深入的今天更具有广阔的市场和前景。但在研发上具有不同于传统GIS的困难和问题,本文通过基于GIS数据分流、对象建模和数据管理的外化,提出一种简化小区运用的三维GIS建模方案。     

Demystifying 3D ICs: the pros and cons of going vertical

This article provides a practical introduction to the design trade-offs of the currently available 3D IC technology options. It begins with an overview of techniques, such as wire bonding, microbumps, through vias, and contactless interconnection, comparing them in terms of vertical density and practical limits to their use. We then present a high-level discussion of the pros and cons of 3D technologies, with an analysis relating the number of transistors on a chip to the vertical interconnect density using estimates based on Rent's rule. Next, we provide a more detailed design example of inductively coupled interconnects, with measured results of a system fabricated in a 0.35-/spl mu/m technology and an analysis of misalignment and crosstalk tolerances. Lastly, we present a case study of a fast Fourier transform (FFT) placed and routed in a 0.18-/spl mu/m through-via silicon-on-insulator (SOI) technology, comparing the 3D design to a traditional 2D approach in terms of wire length and critical-path delay.     

Thermal-aware floorplanner for 3D IC,including TSVs,liquid microchannels and thermal domains optimization

3D stacked technology has emerged as an effective mechanism to overcome physical limits and communication delays found in 2D integration. However, 3D technology also presents several drawbacks that prevent its smooth application. Two of the major concerns are heat reduction and power density distribution. In our work, we propose a novel 3D thermal-aware floorplanner that includes: (1) an effective thermal-aware process with three different evolutionary algorithms that aim to solve the soft computing problem of optimizing the placement of functional units and through silicon vias, as well as the smooth inclusion of active cooling systems and new design strategies, (2) an approximated thermal model inside the optimization loop, (3) an optimizer for active cooling (liquid channels), and (4) a novel technique based on air channel placement designed to isolate thermal domains have been also proposed. The experimental work is conducted for a realistic many-core single-chip architecture based on the Niagara design. Results show promising improvements of the thermal and reliability metrics, and also show optimal scaling capabilities to target future-trend many-core systems.     

A unified numerical approach for thermal stress waves

A unified numerical approach is introduced for the analysis of thermal stress waves. The algorithm is derived from the concept of heat displacement and a variational formulation in Lagrangian form. The objective of the paper is to demonstrate that by using the unified approach an existing computer code for isothermal finite element stress analysis can easily be modified to extend its capability to solve thermal stress problems. Numerical examples are given for the Danilovskaya's problems in dynamic thermoelasticity using a plane analysis computer code. It shows that the unified approach is particularly suitable for the study of thermally-induced waves including thermomechanical coupling effects.     

Scalable parallel implementation for 3D semi-implicit hydrodynamic models of shallow waters

This work presents a parallel implementation for 3D semi-implicit hydrodynamic models of shallow waters that scales in low-cost clusters of computers. The scalability of semi-implicit hydrodynamic models is limited due to the need of all-to-one/one-to-all communications at each simulation time-step as it is here shown. These communications are avoided taking advantage of a nesting implementation, which resolves, in addition to the model at the original grid resolution (nested), a model with a lower grid resolution (parent). Nesting implementations are normally used to simulate both global and local processes with less memory and execution time by using as nested domain just the area where local processes occur while the parent model simulates the complete domain; but here, it is used to improve scalability. A two-level processing structure is proposed for the parallel implementation: pipeline plus domain-decomposition. The resulting parallel implementation with two-level structure scales with a slope near one.     

A controllable liquid mold for fabrication of 3D spherical structures and arrays

This study presents a fabrication method for spherical or ellipsoidal structures, achieved by using a liquid mold in a controlled manner. In order to verify this method, the physical relationship between liquid drops and pre-cured PDMS mixture was investigated during fabrication by altering properties such as density, viscosity, and surface tension. The results show that the lateral capillary force plays a critical role in fabricating hollow dome-like structures in a well-arranged array format. The degree of sphere of the fabricated structures was theoretically examined and was consistent with experimental data. This method is useful for fabricating hollow spherical structures with easy-to-fabricate protocols, and is affordable for general laboratories not equipped with conventional clean room facilities. Standard molding techniques for spherical structures are commonly cumbersome and difficult, since the removal process of the spherical rigid mold from the structure is almost impossible, or destructive to the fabrication. The current fabrication method uses a liquid fabrication mold, therefore providing a noninvasive means of forming spherical structures in pre-cured polymeric mixtures for micro- and meso-scale level applications. This method is also potentially beneficial for producing dynamic culture arrays with a sufficient supply of cell media to maintain controlled cellular environments that can directly induce stem cell differentiation and proliferation.     

Evaluation of a nested-grid implementation for 3D finite-difference semi-implicit hydrodynamic models

This work evaluates the implementation of a nested Cartesian grid in a 3D semi-implicit hydrodynamic model with synthetic and real examples. The outer model provides all the values needed by the governing equations of the nesting (inner) subdomain at the boundary (including tangential velocities). A 3D flux relaxation scheme is applied to prevent mass and energy drift. The influence of tangential velocities in the solution is evaluated, showing a substantial reduction on the results' quality when they are considered negligible and lateral circulation exists. The inner/outer coupling implemented achieves a simulation time equal to the inner execution time and allows a transfer step equal to the inner time-step, removing time interpolation errors. This coupling makes feasible the 3D relaxation implemented. A dramatic improvement in memory requirements and simulation time is achieved, that allows the use of low-cost low-power consumption platforms in the simulations.     

Comparison of ANN approach with 2D and 3D hydrodynamic models for simulating estuary water stage

Accurately predicting tidal levels, including tidal and freshwater discharge effects, is important for human activities in estuaries. The traditional harmonic analysis method and numerical modeling are usually adopted to simulate and predict estuary water stages. This study applied artificial neural networks (ANNs) as an alternative modeling approach to simulate the water stage time-series of the Danshui River estuary in northern Taiwan. We compared this approach with vertical (laterally averaged) 2D and 3D hydrodynamic models. Five ANN models were constructed to simulate the water stage time-series at the Shizi Tou, Taipei Bridge, Rukuoyan, Xinhai Bridge, and Zhongzheng Bridge locations along the Danshui River estuary. ANN models can preserve nonlinear characteristics between input and output variables and are superior to physical-based hydrodynamic models during the training phase. The simulated results reveal that the vertical 2D and 3D hydrodynamic models could not capture the observed water stages during an input of high freshwater discharge from upstream boundaries, while the ANN could match the observed water stage. However, during the testing phase, the ANN approach was slightly inferior to the 2D and 3D models at the Xinhai Bridge, Zhongzheng Bridge, and Rukouyan locations. Our results show that the ANN was able to predict the water stage time-series with reasonable accuracy, suggesting that ANNs can be a valuable tool for estuarine management.     

使用辅助转接板和熔丝的2.5D集成电路测试策略

绑定前转接板的测试对2.5D集成电路的成品率有重要影响。为提高绑定前转接板的测试故障覆盖率,并减少测试成本,提出了仅使用一块辅助转接板针对待测试转接板中的互连线进行开路和短路故障测试的新方案。该方案首先使用邻接矩阵求极大独立集的方法将待测试转接板上的互连线进行分组,使得每组内的互连线不会发生短路故障。分组完成后,在辅助转接板上布置导线,实现互连线的组内连接。接着使用所提出的分组间熔丝连接策略在辅助转接板上布置熔丝,将互连线进行组间连接,最大化可以对开路故障进行并行测试的测试路径数量,并且减少所需的熔丝数量。测试时,首先进行开路故障的测试。待开路故障测试完成,将辅助转接板上的熔丝熔断,再进行短路故障测试。实验结果表明,所提方案有效地提高了开路故障和短路故障的覆盖率,并且减少了硬件开销。