Current-mode integrator for voltage-controllable low frequency continuous-time filters

A novel differential current-mode integrator (CMI) for voltage-controllable low frequency continuous-time filters is presented. An example fifth-order lowpass filter using the proposed CMI and on-chip capacitors was implemented in an AMI 1.2 /spl mu/m CMOS process, and it achieved -3 dB cutoff frequencies ranging from 160 Hz to 5.6 kHz, by changing a single control voltage.     

An elliptic continuous-time CMOS filter with on-chip automatic tuning

A voice-band continuous-time filter is described which was designed based on the technique of fully balanced networks and was fabrication in a 3.5-/spl mu/ CMOS technology. The filter implements a fifth-order elliptic low-pass transfer function with 0.05-dB passband ripple and 3.4 kHz cutoff frequency. A phase-locked loop control system fabricated on the same chip automatically references the frequency response of the filter to an external fixed clock frequency. The cutoff frequency was found to vary by less than 0.1% for an operating temperature range of 0-85/spl deg/C. The absolute value accuracy of the cutoff frequency was 0.5% (standard deviation). With /spl plusmn/5-V power supplies the measured dynamic range of the filter was approximately 100 dB.     

A CMOS transconductance-C filter technique for very highfrequencies

CMOS circuits for integrated analog filters at very high frequencies, based on transconductance-C integrators, are presented. First a differential transconductance element based on CMOS inverters is described. With this circuit a linear, tunable integrator for very-high-frequency integrated filters can be made. This integrator has good linearity properties and nondominant poles in the gigahertz range owing to the absence of internal nodes. The integrator has a tunable DC gain, resulting in a controllable integrator quality factor. Experimental results of a VHF CMOS transconductance-C low-pass filter realized in a 3-μm CMOS process are given. Both the cutoff frequency and the quality factors can be tuned. The cutoff frequency was tuned from 22 to 98 MHz and the measured filter response is very close to the ideal response of the passive prototype filter. Furthermore, a novel circuit for automatically tuning the quality factors of integrated filters built with these transconductors is described     

Continuous-Time 4th Order Butterworth Low-Pass Filter for Video Frequency Applications

In this paper, a continuous-time 4th order Butterworth low-pass filter based on current-mode processing is presented for applications over the video frequency range. A new type of integrator in which both voltage and currents may be integrated is presented and used as the main active block. The filter has been implemented using a very low-cost 2.4 m CMOS process (Mietec). The whole circuit occupies 2.8 mm² and consumes 19 mW from a ±1.5 V supply. Experimental results are given for a 4.5 MHz to 12 MHz tunable low-pass filter with 58 dB of dynamic range at 10 MHz.     

High-frequency CMOS continuous-time filters

Fully integrated, high-frequency continuous-time filters can be realized in MOS technology using a frequency-locking approach to stabilize the time constants. A simple, fully differential integrator, optimized for phase-error cancellation, forms the basic element; a complete filter consists of intercoupled integrators. The center frequency of the filter is locked to an external reference frequency by a phase-locked loop. A prototype sixth-order bandpass filter with a center frequency of 500 kHz dissipates 55 mW and occupies 4 mm/SUP 2/ in a 6-/spl mu/m CMOS technology.     

全差分可调频率四阶Chebyshev滤波器的实现

提出了一种新的全差分运算放大器,该运算放大器在具有电压共模负反馈的同时还具有电流共模负反馈,能较好地稳定其工作点。通过利用MOS管工作在线性区便能作可变电阻之用的特性,设计实现了基于R-MOSFET-C运放的全差分频率连续调节的四阶Chebyshev低通滤波器。该滤波器采用台湾联电(UMC)2层多晶硅、2层金属(2P2M)5V电源电压、0.5m CMOS工艺生产制造。其芯片面积大小为0.36mm~2,截止频率调节范围为20kHz到420kHz,输入信号频率在100kHz,2.5Vpp时的失真小于-65dB,功耗仅为16mW。     

A low-distortion BiCMOS seventh-order Bessel filter operating at2.5 V supply

This paper presents the design of a seventh-order continuous-time Bessel filter using a new low-voltage and highly linear BiCMOS transconductor. A high-gain and parasitic-insensitive integrator is obtained by using an active capacitor scheme. The filter has been designed to operate at a 2.5 V supply with a nominal -3 dB cutoff frequency of 600 kHz. It has been fabricated in 1 μm, double-poly 6-GHz BiCMOS process. The inband group delay variation is less than 10 ns. The total harmonic distortion (THD) measured with a 100 kHz input signal is less than -49 dB for a 2 V_pp amplitude and the dynamic range is 77 dB. The filter can be frequency tuned over almost one decade with a gain variation less than 0.2 dB in the passband. A common-mode rejection ratio (CMRR) of 53 dB in the passband is observed, thanks to a careful common-mode control strategy     

Low-power CMOS continuous-time filters

A design technique for low-power continuous-time filters using digital CMOS technology is presented. The basic building block is a fully-balanced integrator with its unity-gain frequency determined by a small-signal transconductance and MOSFET gate capacitance. Integrator excess phase shift is reduced using balanced signal paths, and open-loop gain is increased using low-voltage cascode amplifiers. Two-pole bandpass and five-pole lowpass ladder filters have been implemented in a 1.2 μm n-well CMOS process. The lowpass prototypes provided 300 kHz-1000 kHz bias-current-tunable -3 dB bandwidth, 67 dB dynamic range with 1% total harmonic distortion (THD), and 30 μW/pole (300 kHz bandwidth) power dissipation with a 1.5 V supply; the bandpass prototypes had a tunable center frequency of 300 kHz-1000 kHz, Q of 8.5, and power dissipation of 75 μW/pole (525 kHz center frequency) from a 1.5 V supply. The active filter area was 0.1 mm²/pole for both designs     

CMOS continuous-time current-mode filters for high-frequencyapplications

Design considerations for high-frequency CMOS continuous-time current-mode filters are presented. The basic building block is a differential current integrator with its gain constant set by a small-signal transconductance and a gate capacitance. A prototype fifth-order low-pass ladder filter implemented in a standard digital 2 μm n-well CMOS process achieved a -3 dB cutoff frequency (f ₀) of 42 MHz; f₀ was tunable from 24 to 42 MHZ by varying a reference bias current from 50 to 150 μA. Using a single 5 V power supply with a nominal reference current of 100 μA, the five-pole filter dissipated 25.5 mW. The active filter area was 0.056 mm²/pole. With the minimum input signal defined as the input-referred noise integrated over a 40 MHz bandwidth, and the maximum input signal defined at the 1% total intermodulation distortion (TIMD) level, the measured dynamic range was 69 dB. A third-order elliptic low-pass ladder filter was also integrated in the 2 μm n-well CMOS process to verify the implementation of finite transmission zeros     

A 1.5-V 75-dB dynamic range third-order G/sub m/-C filter integrated in a 0.18-/spl mu/m standard digital CMOS process

A design methodology of a CMOS linear transconductor for low-voltage and low-power filters is proposed in this paper. It is applied to the analog baseband filter used in a transceiver designed for wireless sensor networks. The transconductor linearization scheme is based on regulating the drain voltage of triode-biased input transistors through an active-cascode loop. A third-order Butterworth low-pass filter implemented with this transconductor is integrated in a 0.18-/spl mu/m standard digital CMOS process. The filter can operate down to 1.2-V supply voltage with a cutoff frequency ranging from 15 to 85 kHz. The 1% total harmonic distortion dynamic range measured at 1.5 V for 20-kHz input signal and 50-kHz cutoff frequency is 75 dB, while dissipating 240 /spl mu/W.     

Design of a tunable frequency CMOS fully differential fourth-order Chebyshev filter

A new fully differential amplifier and a fully differential R-MOSFET-C fourth-order Chebyshev active lowpass filter employing passive resistors and current-steering MOS transistors as variable resistors are proposed. The implementation relies on the tunability of current-steering MOS transistors operating in the triode region which counteract the deviation of resistors in integrated circuit manufacturing technology in order that the cutoff frequency of Chebyshev active filter can be realized accurately tunable. The amplifier is not only with voltage common-mode negative feedback (VCMFB), but also with current common-mode negative feedback (CCMFB), which will benefit for the stability of its DC operating point. A cutoff frequency of 138 kHz fourth-order Chebyshev lowpass filter was designed and fabricated using 3.3 V power supply and 0.35 μm CMOS technology. Chip test results demonstrate better than −68 dB THD with 70 kHz, 2.0V_pp signal, frequency turning range of more than 14,000 from 3 Hz to 420 kHz, chip area of 0.36 mm² and power consumption of 16 mW.     

High-frequency voltage-controlled continuous-time lowpass filter using linearised CMOS integrators

The design and implementation of a continuous-time lowpass filter with voltage-controlled cutoff frequency and passband ripple is presented. The circuit uses a linearised CMOS transconductor as a basic integrating building block. A voltage-controlled phase-adjusting scheme is employed in the integrator to compensate for excess phase in the transconductance at high frequencies. The fabricated filter is capable of realising cutoff frequencies as high as 2 MHz and handles single-ended input signals up to 4 V p-p with less than 1% distortion.     

Integrated switched-capacitor low-pass filter with combined anti-aliasing decimation filter for low frequencies

A new combined antialiasing decimation filter is presented which allows the implementation of a low-frequency switched-capacitor filter on a single chip. Experimental results are presented for a CMOS second-order low-pass filter with 1 dB passband ripple, a cutoff frequency of 2 Hz, and a dynamic range of 84 dB. The decimation filter converts the input clock of 16 kHz into an output clock of 250 Hz. The integrated anti-aliasing filter has a low pole frequency of about 3 kHz.     

A Low Distortion Wide Tuning Range CMOS Fully-Differential Fourth-Order Bessel Filter

A fully differential R-MOSFET-C fourth-order Bessel active low-pass filter employing passive resistors and current-steering MOS transistors as a variable resistor is proposed. The implementation relies on the tunability of the current-steering MOS transistors operating in the triode region which counteract the deviation of resistors in integrated circuit manufacturing technology in order that the group delay of the Bessel active filter can be realized accurately. A 0.75 us group delay 520 kHz frequency fourth-order Bessel lowpass filter based on a passive doubly terminated RLC prototype was designed and fabricated using 3.3 V power supply and 0.35 um CMOS technology. Chip test results demonstrate better than ?65 dB THD with @100 kHz, 1.65-Vpp signal, frequency tuning range of more than ten decades from 0.6 kHz to 550 kHz, chip area of 0.32 mm² and power consumption of 13.3 mW.     

A fully differential class-AB switched-current integrator forsignal processing

A switched-current integrator is designed with a 1.2-μm CMOS process. The use of fully differential and complementary topology also enables class-AB operation in the circuit. Without sacrificing speed, the designed circuit reduces the clock-feedthrough error more than 20 dB compared to a single-transistor SI-cell. With the designed integrator, a fully differential sixth-order switched-current ladder filter with transmission zeros is realized. The designed circuit has a 10-MHz clock with an approximately 600 kHz corner frequency. The measurements show comparable performance to single-ended SC- and active-RC-filters with smaller die area and fabrication costs     

Multimode $G_{m}$– $C$ Channel Selection Filter for Mobile Applications in 1-V Supply Voltage

A CMOS transconductor for multimode channel selection filter is presented. The transconductor includes a voltage-to-current converter and a current multiplier. Voltage-to-current conversion employs linear region MOS transistors, and the conversion features high linearity over a wide input swing range. The current multiplier which operates in the weak inversion region provides a wide transconductance tuning range without degrading the linearity. A third-order Butterworth low-pass filter implemented with the transconductors was designed by TSMC 0.18 mum CMOS process. The measurement results show that the filter can operate with the cutoff frequency of 135 kHz to 2.2 MHz. The tuning range and the linearity performance would be suitable for the wireless specifications of GSM, Bluetooth, cdma2000, and wide-band CDMA. In the design, the maximum power consumption at the highest cutoff frequency is 2 mW under a 1-V supply voltage.     

All-digital gated ring oscillator $$\Delta \Sigma$$ modulators

This paper presents all-digital time-mode \(\Delta \Sigma\) modulators. The proposed modulators consist of a voltage-to-time integrator, a seven-stage gated ring oscillator functioning as a 3-bit quantizer, and seven digital differentiators. A detailed analysis of the nonlinear characteristics of the modulators is provided. Designed in IBM 130 nm 1.2 V CMOS technology with a 100 mV 100 kHz sinusoidal input and a 4.4 MHz frequency clock, the first-order modulator provides 47 dB SNR over 0–150 KHz bandwidth while consuming 1.1 mW while the second-order modulator provides 55 dB SNR over the same bandwidth while consuming consumes 1.45 mW.     

Analog CMOS implementation of high frequency least-mean squareerror learning circuit

A continuous-time analog CMOS circuit with external feedback amplifiers implementing the least-mean square error adaptive learning algorithm has demonstrated a frequency of operation of 80 MHz, an adaptivity of 60 dB, a minimum notch width of 20 kHz, a minimum adapt time constant of 20 μs, and the simultaneous cancellation of two continuous-wave (CW) interferers. Auto-zeroing is used to cancel multiplier and integrator offsets. A fully monolithic adaptive filter circuit was also realized     

A CMOS–MEMS RF-Tunable Bandpass Filter Based on Two High- $Q$ 22-MHz Polysilicon Clamped-Clamped Beam Resonators

This letter presents the design, fabrication, and demonstration of a CMOS–MEMS filter based on two high- $Q$ submicrometer-scale clamped–clamped beam resonators with resonance frequency around 22 MHz. The MEMS resonators are fabricated with a 0.35- $muhbox{m}$ CMOS process and monolithically integrated with an on-chip differential amplifier. The CMOS–MEMS resonator shows high-quality factors of 227 in air conditions and 4400 in a vacuum for a bias voltage of 5 V. In air conditions, the CMOS–MEMS parallel filter presents a programmable bandwidth from 100 to 200 kHz with a $ ≪ hbox{1}$-dB ripple. In a vacuum, the filter presents a stop-band attenuation of 37 dB and a shape factor as low as 2.5 for a CMOS-compatible bias voltage of 5 V, demonstrating competitive performance compared with the state of the art of not fully integrated MEMS filters.      

A Switched Opamp-Based Bandpass Filter: Design and Implementation in a 0.35 μm CMOS Technology

A fully differential SC bandpass filter (central frequency, 58 kHz; Q = 15; and voltage gain, 8) based on the switched-opamp approach is designed and implemented in this work. The filter operates from a single 1 V supply voltage and is realized in a 0.35 m CMOS technology. It has been characterized with a sampling frequency of 1 MHz and its power consumption is about 230 W. As a main internal filter component, an appropiate switched opamp was also designed. Its common-mode feedback circuit was implemented by using an error amplifier and sampling of the output common-mode voltage is carried out by applying a DC offset to level shift the common-mode sample. It provides an accurate common-mode output for a wide temperature and supply voltage ranges.