一种支持线索迁移的分布式存储结构

本文介绍一种基于ＵＮＩＸ的分布式存储结构，用于支持分布多系统中的机间线索迁移，同一地址空间中的多个线索实现为共享地址空间的多个轻权进程，这些进程核心视为普通的ＵＮＩＸ进程，本文主要讨论分式存储和线索迁移的实现机制。     

UNIX操作系统从单机到多机的移植与改造技术

本文根据曙光一号并处理机上移植ＵＮＩＳ操作系统（ＳＮＩＸ）的经验，对Ｕ－ＮＩＸ操作系统从单机到多机的移植与改造技术进行了描述。包括多机硬体系结构的支持，ＵＮＩＸ源码选择，移植环境的建立，源码的改造等多方面所进行的工作。     

UNIX系统发展综述

本文首先分析ＵＮＩＸ的４个发展阶段以及各阶段取得成功的原因，然后在安全性，多处理机，实时处理，微内核，国际化和流机制等几个方面说明ＵＮＩＸ在技术上的发展近况，指出要解决的问题，最后说明了它面临的新挑战。     

曙光一号操作系统SNIX对并行处理的支持

本文在介绍传统单机ＵＮＩＸ在支持并行处理方面不足的基础上，介绍如何通过改造传统ＵＮＩＸ核心并且在用户空间实现线程库函数来支持并处理与计算，主要工作包括共享资源进程的概念以及Ｇａｎｇ调度策略以及在ＳＮＩＸ操作系统中的实现，对Ｐｔｈｒｅａｄ库函数库界面定义以有主在 用代间的实现简述。     

UNIX进程服务器

进程服务器是ＵＮＩＸ模拟系统中的一个重要服务器，本文介绍了怎样用Ｍａｃｈ提供的功能模拟ＵＮＩＸ的进程、与进程相关的操作和对信号的处理。     

UNIX系统进程保留与恢复的设计与开发

本文详细讨论了ＵＮＩＸ系统Ｖ／３、２版中进程保留与恢复实现的方案和有关技术，通过介绍ＵＮＩＸ系统Ｖ与进程控制有关的结构及关系，阐述了保留恢复的原理及内容。     

UNIX系统进程保留恢复的设计与实现

本文详细讨论了ＵＮＩＸ系统Ｖ／３．２版中进程保留与恢复实现的方案和有关技术。通过介绍了ＵＮＩＸ系统Ｖ与进程控制有关的结构及关系，阐述了保留恢复的原理及内容。     

MINIX进程通信功能的分析和扩展

ＭＩＮＩＸ是一个运行的ＩＭＢ ＰＣ微机计算机上的微型ＵＮＩＸ操作系统。其外部功能与ＵＮＩＸ完全相同，而实现原理却截然不同，它吸收了结构化程序设计思想。本文在分析ＭＩＮＩＸ进程通信原理的基础上，对其进行了合理的扩展。以会合和原理为基础，设计并实现了用户进程间消息通信机构。为进一步开发ＭＩＮＩＸ网络功能打下基础。     

UNIX系统中Sybase数据库过程自动执行的实现

本文首先提出了ＵＮＩＸ系统中Ｓｙｂａｓｅ数据库存储过程自动执行的要求，然后介绍ＵＮＩＸ系统中的ｃｒｏｎ进程自动间隔执行的特点。最后是利用ｃｒｏｎ进程，通过ＤＢ－Ｌｉｂｒａｒｙ Ｃ使数据库存储过程自动执行的具体实现。     

一种局域网互联结构的设计与实现

本文利用Ｅｔｈｅｒｎｅｔ技术，Ｎｅｔａｒｅ技术和ＴＣＰ／ＩＰ技术进行种机，异种操作系统的以太局域网互联结构的设计，实现了互联网络上ＤＯＳ客户机，Ｎｅｔｗａｒｅ文件服务器，ＵＮＩＸ客户机及ＵＮＩＸ服务器之间的文件互访，并通过具体实例说明了这种互联结构的设计思想和实现方法。     

多处理机环境下UNIX文件系统的设计和实现

本文论述了在多处理机环境下UNIX 文件系统的设计和实现,以保证文件系统运行的正确性和极大限度地开发信息处理的并发性。文中提出多处理机UNIX 文件系统的模型、结构及特点。着重论述多处理机UNIX 文件系统主要数据结构低层缓冲区和内部其他数据结构的组织和管理。最后论述了多处理机环境中出现的数据一致性问题。     

单机UNIX核心的并行化技术

本文主要阐述UNIX源程序从单处理机到共享存储器多处理机系统的移植技术.主要从三个方面介绍:基本移植技术,提高效率技术以及增加新概念.我们在国外研究成果和经验的基础上提出我们对该问题的看法.     

UNIX平台下进程定位与运行监控的实现

通过对UNIX平台下/proc伪文件系统的访问,可以对进程实施定位和运行监视.对几个主流的UNIX操作系统下访问/proc目录的不同方法进行了描述,进程的启动方法不再局限于fork函数,同时讨论了几种有代表性的其他方法,如:system函数、终端窗口和伪终端.     

Simulation of multiple digital signal processor systems

The high speed needed in solving digital signal processing problems in real time has often given rise to multiple processor hardware designs. Devices such as the TMS32020 digital signal processor possess features designed to support concurrent processing. Progress in this area is currently hampered by the lack of suitable multiprocessor development tools. It is suggested that an incremental approach to multiprocessor development, using several methods of simulating the signal processor, may be used. Two simulation environments specifically for the development and testing of multiple digital signal processor designs are described. Firstly a single processor simulation system where the algorithms which will be performed by other concurrent processors may be executed in a high level language but without any need to simulate the instructions of the other processors. Secondly a multiple TMS32020 digital signal processor system where processors are simulated as several communicating tasks on a host computer using the IBM AIX (UNIX derived) multitasking operating system.     

Simulating the DYNIX operating system parallel programming interface on a UNIX system

This paper presents the implementation of multitasking functions of DYNIX Sequent computers on the UNIX operating system. The Sequent computers are shared memory multiprocessor computers running the DYNIX operating system. These functions support data and function partitioning. They let the user implement subprograms by the processors of a Sequent computer in parallel. The functions can synchronize, lock, and unlock data and program segments. As a result, the simulator allows the users to develop their multitasking programs on a uniprocessor computer such as a SUN workstation, and later port them to a Sequent computer. Further, the simulator adds a level of abstraction on top of UNIX for concurrent programming. The functions of the simulator allow the user to handle the communication and synchronization of the processes in a program at a higher level of abstraction, while concentrating on the design of multitasking algorithms. The simulator is applied to a parallel selection algorithm. © 1998 John Wiley & Sons, Ltd.     

Distributed Matrix-Free Solution of Large Sparse Linear Systems over Finite Fields

We describe a coarse-grain parallel approach for the homogeneous solution of linear systems. Our solutions are symbolic, i.e., exact rather than numerical approximations. We have performed an outer loop parallelization that works well in conjunction with a black box abstraction for the coefficient matrix. Our implementation can be run on a network cluster of UNIX workstations as well as on an SP-2 multiprocessor. Task distribution and management are effected through MPI and other packages. Fault tolerance, checkpointing, and recovery are incorporated. Detailed timings are presented for experiments with systems that arise in RSA challenge integer factoring efforts. For example, we can solve a 252,222 × 252,222 system with about 11.04 million nonzero entries over the Galois field with two elements using four processors of an SP-2 multiprocessor, in about 26.5 hours CPU time. Received June 1, 1997; revised March 10, 1998.     

Windows2000/XP服务与后门技术

Windows下的服务程序都遵循服务控制管理器（SCM）的接口标准,它们会在登录系统时自动运行,甚至在没有用户登录系统的情况下也会正常执行,类似于UNIX系统中的守护进程（daemon）。介绍了Windows服务的基本概念。     

Experience with an efficient parallel kernel memory allocator

There has been great progress from the traditional allocation algorithms designed for small memories to more modern algorithms exemplified by McKusick's and Karels' allocator (McKusick MK, Karels MJ. Design of a general purpose memory allocator for the 4.3BSD UNIX kernel. In USENIX Conference Proceedings, Berkeley, CA, June 1988). Nonetheless, none of these algorithms have been designed to meet the needs of UNIX kernels supporting commercial data‐processing applications in a shared‐memory multiprocessor environment. On a shared‐memory multiprocessor, memory is a global resource. Therefore, allocator performance depends on synchronization primitives and manipulation of shared data as well as on raw CPU speed. Synchronization primitives and access to shared data depend on system bus interactions. The speed of system buses has not kept pace with that of CPUs, as witnessed by the ever‐larger caches found on recent systems. Thus, the performance of synchronization primitives and of memory allocators that use them have not received the full benefit of increased CPU performance. An earlier paper (McKenney PE, Slingwine J. Efficient kernel memory allocation on shared‐memory multiprocessors. In USENIX Conference Proceedings, Berkeley, CA, February 1993), describes an allocator designed to meet this situation. This article reviews the motivation for and design of the allocator and presents the experience gained during the seven years that the allocator has been in production use. Copyright © 2001 John Wiley & Sons, Ltd.