A W-band Frequency Source with Low Spurs and Low Phase Noise

A W-band millimeter wave frequency source is developed by frequency multiplier chain and injection locking. The referenced crystal oscillator (CO) signal 120 MHz is multiplied 400 times to output 48 GHz signal. Then, it is used as a referenced source of fundamental-wave injection-locked harmonic Gunn oscillator with output power more than 10 mW at 96 GHz and spurious output less than ?65 dBc. The measured phase noise is ?97 and ?105 dBc/Hz at 10 kHz and 200 kHz offset, respectively. At last, the influence of the flicker noise, provided by the frequency multipliers and amplifiers, is analyzed.     

A 108-GHz InP-HBT monolithic push-push VCO with low phase noise andwide tuning bandwidth

This paper reports on what is believed to be the highest frequency bipolar voltage-controlled oscillator (VCO) monolithic microwave integrated circuit (MMIC) so far reported. The W-band VCO is based on a push-push oscillator topology, which employs InP HBT technology with peak f_T's and f_max's of 75 and 200 GHz, respectively. The W-band VCO produces a maximum oscillating frequency of 108 GHz and delivers an output power of +0.92 dBm into 50 Ω. The VCO also obtains a tuning bandwidth of 2.73 GHz or 2.6% using a monolithic varactor. A phase noise of -88 dBc/Hz and -109 dBc/Hz is achieved at 1- and 10-MHz offsets, respectively, and is believed to be the lowest phase noise reported for a monolithic W-band VCO. The push-push VCO design approach demonstrated in this work enables higher VCO frequency operation, lower noise performance, and smaller size, which is attractive for millimeter-wave frequency source applications     

A low power and low phase-noise 91~96 GHz VCO in 90 nm CMOS

This paper reports a 94 GHz CMOS voltage-controlled oscillator (VCO) using both the negative capacitance (NC) technique and series-peaking output power and phase noise (PN) enhancement technique. NC is achieved by adding two variable LC networks to the source nodes of the active circuit of the VCO. NMOSFET varicaps are adopted as the required capacitors of the LC networks. In comparison with the conventional one, the proposed active circuit substantially decreases the input capacitance (C_in) to zero or even a negative value. This leads to operation (or oscillation) frequency (OF) increase and tuning range (TR) enhancement of the VCO. The VCO dissipates 8.3 mW at 1 V supply. The measured TR of the VCO is 91~96 GHz, close to the simulated (92.1~96.7 GHz) and the calculated one (92.2~98.2 GHz). In addition, at 1 MHz offset from 95.16 GHz, the VCO attains an excellent PN of – 98.3 dBc/Hz. This leads to a figure-of-merit (FOM) of ?188.5 dBc/Hz, a remarkable result for a V- or W-band CMOS VCO. The chip size of the VCO is 0.75 × 0.42 mm², i.e. 0.315 mm².     

SIW-Based W-Band Low Phase-Noise Injection-Locked Harmonic Oscillator

A W-band planar injection-locked harmonic oscillator (ILHO) based on substrate integrated waveguide (SIW) is implemented. This ILHO has a free-running output frequency around 94.6?GHz while the technique of harmonic extraction from diodes is used as a frequency multiplier. It has an output locking bandwidth of 300?MHz (from 94.45 to 94.75?GHz) as injecting a signal around 47.3?GHz with the fundamental injection-locked behavior, and the output power is more than 5.8 dBm. The combination of simple synchronization with a low-frequency reference signal allows the generation of stable and low phase-noise W-band signals with a fully integrated planar source.     

W波段功率合成六倍频源

通过倍频方法和功率合成方法设计了W波段六倍频源,将Ku或K波段信号倍频至W波段。信号经过Ka波段二倍频、巴仑、有源放大后,输出两路信号功率约为25 dBm,以此推动变容肖特基二极管进行三倍频,并进行功率合成输出。为了抑制偶次谐波和提高输出功率,二极管使用了反向并联平衡电路结构。该六倍频源在90-115 GHz 输出范围内输出功率大于12 dBm、最大输出功率为13.8 dBm、功率平坦度为1.2 dB。该模块提出了W波段源的产生方法,为今后设计W波段TR组件发射源提供了参考价值。     

Design of a new low-phase-noise millimetre-wave quadrature voltage-controlled oscillator

This paper presents a new circuit topology of millimetre-wave quadrature voltage-controlled oscillator (QVCO) using an improved Colpitts oscillator without tail bias. By employing an extra capacitance between the drain and source terminations of the transistors and optimising circuit values, a low-power and low-phase-noise (PN) oscillator is designed. For generating the output signals with 90° phase difference, a self-injection coupling network between two identical cores is used. The proposed QVCO dissipates no extra dc power for coupling, since there is no dc-path to ground for the coupled transistors and no extra noise is added to circuit. The best figure-of-merit is ?188.5, the power consumption is 14.98–15.45 mW, in a standard 180-nm CMOS technology, for 58.2 GHz center frequency from 59.3 to 59.6 GHz. The PN is ?104.86 dBc/Hz at 1-MHz offset.     

A low phase noise PLL using Vackar VCO and a wide-locking range tunable divider for V-band signal generation in 65-nm CMOS

This paper presents a low phase noise integer-N phase-locked loop (PLL) for V-band signal generation. To enhance the frequency stability, we use a new class of Vackar voltage-controlled oscillator (VCO) in the PLL. The Vackar VCO achieves a low phase noise performance by effectively suppressing the AM-PM conversion. To properly align the locking range with the output of the VCO, a divider with wide locking range is realized by the current-mode logic (CML) D-flip-flops with tunable load. For spur reduction, an enhanced charge-pump structure is used to reject transient current glitches. With good static and dynamic current matching achieved in the charge pump, the reference spur is suppressed down to ?50 dBc. The designed PLL is implemented in a 65 nm RFCMOS process, and the measurement demonstrates a low phase noise signal up to 17 GHz. The in-band phase noise (at 1 MHz offset) and out-band phase noise (at 50 MHz offset) are ?103.6 and ?126.8 dBc/Hz, respectively. The PLL consumes 50.7 mW and occupies a chip area of 0.9 mm².     

Design of a W-band Stepped-frequency Synthesizer with Fast Frequency Switching

In this paper, a W-band coherent stepped-frequency synthesizer is proposed, which provides transmitter and local oscillator signals to a high range resolution radar system. This synthesizer is realized by combining the technique of direct digital synthesizer, phase lock loop, up-conversion and multiplier chain, etc. In order to shorten the lock time of the phase lock loop, a new method is introduced in the design of this synthesizer. Measurement results show that the transmitting signal is around 94 GHz, the bandwidth is 504 MHz, the phase noise is about −90 dBc/Hz at 10 kHz offset, and the spurious signals are less than −55 dBc. Especially, the frequency switching time of this synthesizer is about 1 μs. With the W-band stepped-frequency synthesizer, the range resolution of the high range resolution radar system is better than 0.6 m.     

W频段宽带倍频器

介绍了一个W频段宽带倍频器.采用反向并联二极管对结构实现宽带倍频.该倍频器输入为WR-28波导到微带过渡结构,输出为WR-10减高波导.在输入功率为5dBm时,在整个W频段输出功率为0.81±1.80dBm,二次谐波抑制度大于25dBc.该倍频器可把Ka频段的信号源扩展到W频段.     

Design of a W-band Frequency Tripler for Broadband Operation Based on a Modified Equivalent Circuit Model of GaAs Schottky Varistor Diode

This paper presents the design and experimental results of a W-band frequency tripler with commercially available planar Schottky varistor diodes DBES105a fabricated by UMS, Inc. The frequency tripler features the characteristics of tunerless, passive, low conversion loss, broadband and compact. Considering actual circuit structure, especially the effect of ambient channel around the diode at millimeter wavelength, a modified equivalent circuit model for the Schottky diode is developed. The accuracy of the magnitude and phase of S21 of the proposed equivalent circuit model is improved by this modification. Input and output embedding circuits are designed and optimized according to the corresponding embedding impedances of the modified circuit model of the diode. The circuit of the frequency tripler is fabricated on RT/Rogers 5880 substrate with thickness of 0.127 mm. Measured conversion loss of the frequency tripler is 14.5 dB with variation of ±1 dB across the 75?~?103 GHz band and 15.5?~?19 dB over the frequency range of 103?~?110 GHz when driven with an input power of 18 dBm. A recorded maximum output power of 6.8 dBm is achieved at 94 GHz at room temperature. The minimum harmonics suppression is greater than 12dBc over 75?~?110 GHz band.     

A 0.7 V 6.66–9.36 GHz wide tuning range CMOS LC VCO with small chip size

The circuit designs are based on TSMC 0.18 μm CMOS standard technology model. The designed circuit uses transformer coupling technology in order to decrease chip area and increase the Q value. The switched-capacitor topology array enables the voltage-controlled oscillator (VCO) to be tuned between 6.66 and 9.36 GHz with 4.9 mW power consumption at supply voltage of 0.7 V, and the tuning range of the circuit can reach 33.7%. The measured phase noise is ?110.5 dBc/Hz at 1 MHz offset from the carrier frequency of 7.113 GHz. The output power level is about ?1.22 dBm. The figure-of-merit and figure-of-merit-with-tuning range of the VCO are about ?180.7 and ?191.25 dBc/Hz, respectively. The chip area is 0.429 mm² excluding the pads. The presented ultra-wideband VCO leads to a better performance in terms of power consumption, tuning range, chip size and output power level for low supply voltage.     

基于兰姆波压电谐振器的高频低相噪MEMS振荡器仿真研究

发达的现代通信设备对时钟源器件提出了更高的要求,在保障频率信号稳定的同时还需要器件具备可集成、微型化等特点,微机电系统(MEMS)振荡器因其具备这些优势,已逐渐替代传统振荡器,成为电子设备中信号源的常用元器件。该文设计了一种MEMS振荡器并对其进行仿真测试,该振荡器的核心选频器件由Lamb波压电谐振器组成,在应用于振荡电路前,对设计的MEMS谐振器进行了仿真测试,并提出两种优化其寄生模态的方法,所得谐振器的品质因数(Q)为1 357.5,串联谐振频率为70.384 MHz。将优化后谐振器应用于振荡电路后,对振荡器输出信号和相位噪声进行测试,结果表明,MEMS振荡器的输出载波频率为70.58 MHz,相位噪声为-64.299 dBc/Hz@1 Hz及-144.209 dBc/Hz@10 kHz。     

三毫米低相噪锁相系统研究

采用锁相方法，解决了三毫米波信号源的高稳定和低相噪问题，经测试，９２．６ＧＨｚ时其相位噪声指标（傅氏频率为１ＫＨｚ时），为－７５ｄＢｃ／Ｈｚ，杂散优于－５５ｄＢｃ，输出功率大于１０ｍＷ。     

星上光电振荡器的微波信号产生与转发研究

为了降低星上通信系统的质量和体积、增强系统的温度稳定性和抗电磁干扰能力,采用了一个新方法,将光电振荡器用作星上微波本振源,产生微波信号,利用光纤转发,将微波信号的产生、分配、传输与变频处理融为一个系统,并进行了理论分析和实验验证。结果表明,基于光电振荡器产生了11.5GHz的微波本振信号,通过光纤进行多路转发,其中第1路信号频率与本振源相同,相位噪声为-100.5dBc/Hz@10kHz,第2路信号频率为本振信号的2倍,相位噪声为-86.6dBc/Hz@10kHz。与传统电学方法相比,该方法有显著成效,可提高转发效率,减小系统体积和重量,增强系统抗干扰性和温度稳定性,提高系统的带宽和微波信号质量、降低卫星通信成本。     

系统级封装的S频段射频收发模块研制

研制了一种小体积的S频段射频收发系统级封装( SIP)模块,内部集成了基于多种工艺的器件。模块接收通道一次变频,发射通道二次变频,内部集成中频和射频本振信号源。模块采用双腔结构,不同腔体之间通过绝缘子进行垂直互连,大大减小了模块体积,模块体积为40 mm×40 mm×10 mm。模块采用正向设计,其主要指标的测试结果为：接收通道动态范围-100~-40 dBm,输出信号0~2 dBm,噪声系数小于等于2.8 dB,带外抑制大于等于50 dBc;发射通道输出信号大于等于2 dBm,二次、三次谐波抑制大于等于60 dBc,杂波抑制大于等于55 dBc,相位噪声在1 kHz和10 kHz处分别小于等于-82 dBc/Hz和-91 dBc/Hz。实测结果与仿真结果基本一致。     

K波段推-推介质振荡器设计

为了满足现代通信系统对于高频率与高稳定性信号源的需求,提出一种K波段介质振荡器。该振荡器通过推-推结构将两路子振荡器合二为一,使其能够在一个电路中同时实现振荡器和倍频器。在介质谐振器的两条耦合微带线上增加变容二极管模块,通过改变变容二极管的偏置电压调整谐振器中传输信号的相位。变容二极管模块的加入能够有效降低有源器件不一致性对电路的影响,减少两个子振荡器在基频处对输出信号的干扰,同时让振荡器获得200 MHz左右的输出信号频率可调范围。测试结果表明:在输出频率为20.96 GHz时,输出功率约为-4.59 dBm,在10 kHz时达到-66.50 dBc/Hz的相位噪声,在100 kHz时达到-94.31 dBc/Hz的相位噪声,基波抑制度达到-25.42 dBc。     

A technique to improve the linearization of frequency–voltage characteristic of LC-VCO

This paper presents a very low-power linearization technique to improve the linearity of frequency-voltage characteristic of LC-VCO (voltage controlled oscillator) using MOS varactor. This reduces the VCO gain (K _VCO) variation and its required value over the tuning voltage range. Low K _VCO improves noise and reference spur performances at the output of phase lock loop/frequency synthesizer (FS). Low K _VCO variation reduces FS loop stability problem. Using this VCO circuit, a fully on-chip integer-N frequency synthesizer has been fabricated in 0.18 μm epi-digital CMOS technology for 2.45 GHz ZigBee application. The measured VCO phase noise is ?115.76 and ?125.23 dBc/Hz at 1 and 3 MHz offset frequencies, respectively from 2.445 GHz carrier and the reference spur of the frequency synthesizer is ?68.62 dBc. The used supply voltage is 1.5 V.     

Wideband Frequency Synthesizer at X/Ku Band by Mixing and Phase Locking of Half Frequency Output of VCO

A wideband low phase noise frequency synthesizer at X/Ku band has been developed by using phase locking and mixing technique at half frequency of voltage controlled oscillator (VCO). The half frequency output signal of the VCO is down converted by a balanced mixer at C band to obtain an intermediate frequency (IF) signal used for phase locking of the VCO. An ultra low phase noise local signal source at 6 GHz is developed with a frequency multiplying chain driven by a 100 MHz oven controlled crystal oscillator (OCXO). Coupling circuit outside the VCO chip to the mixer does not need to be specially designed, which is beneficial to simplify the circuit scheme and improve the phase noise performance. Measurement results show that the phase noise of the output signal at 10.6 GHz to 11.8 GHz and 12.3 GHz to 13.0 GHz is better than −102 dBc/Hz at 10 kHz away form the carrier center. This frequency synthesizer can be used as local signal source or driving source for the development of wideband millimeter-wave frequency synthesizer systems.     

An all solid-state 330 GHz frequency multiplying Chain for 664 GHz radiometers application

An all solid-state 330 GHz ×6 × 2 × 2 frequency multiplying chain is constructed and tested and it is used as a local oscillator (LO) in 664 GHz radiometers for cirrus clouds and cloud ice detecting. The frequency multiplying chain consists of a W-band sextupler, followed by a power-combined amplifier which delivers 460–540 mW output power, and two cascaded 165 GHz and 330 GHz balanced frequency doublers. The 165 GHz two-ways power-combined doubler applies four three-anode in series GaAs Schottky diodes to generate 50–63 mW output power in the frequency range 160–176 GHz, and its tested typical efficiency is 11.5%. The cascaded 330 GHz doubler uses a four-anode in anti-series arranged GaAs diode to generate 2.5–4.5 mW output power in the frequency range 320–352 GHz, and its tested typical efficiency is 6.0% and the maximum value is 8.0% at 328 GHz. The output power of the multiplying chain is high enough to pump the 664 GHz heterodyne radiometer for space application.     

W-Band Planar Wide-Angle Scanning Antenna Architecture

This paper proposes a hybrid scanning antenna architecture for applications in mm-wave intelligent mobile sensing and communications. We experimentally demonstrate suitable W-band leaky-wave antenna prototypes in substrate integrated waveguide (SIW) technology. Three SIW antennas have been designed that within a 6.5 % fractional bandwidth provide beam scanning over three adjacent angular sectors. Prototypes have been fabricated and their performance has been experimentally evaluated. The measured radiation patterns have shown three frequency scanning beams covering angles from 11 to 56 degrees with beamwidth of 10?±?3 degrees within the 88-94 GHz frequency range.