用于陆地移动无线电台的800MHz频率合成器

为了使大容量陆地移动无线电台电路简易化、小型化,不能采用复杂的倍频电路等方式。有效的方法是实现直接产生本振频率的频率合成器,并将其应用于移动台的本地振荡器。在移动台频率合成器中,要求振荡纯度高,信道转换速度快,在机械振动等环境下稳定性好。高纯度800MHz 电压控制振荡器的研究和相位同步电路的最佳环路设计,完全满足了这些要求。因此实现了能转换1000个信道的800MHz 直接振荡、直接分频频率合成器。该合成器由800MHz 压控振荡器、两块合成器用 LSI 和晶体振荡器构成。与原来的移动台用150MHz 频率合成器相比,体积约为1/9。本论文叙述该800MHz 频率合成器的设计和得到的特性。     

800 MHz射频频率合成器的设计及相位噪声性能分析

介绍了3．5GHz宽带无线固定接入系统射频接收机中800MHz频率合成器的设计,讨论了环路滤波器以及压控振荡器等环路部件对频率合成器输出信号相位噪声性能的影响,提出了低相位噪声频率合成器的设计方法。最后结合实际系统分析了本振信号相位噪声对基带接收机16QAM解调误码性能的影响,并给出计算机仿真的结果。     

射频锁相环型频率合成器的CMOS实现

本论文实现了一个射频锁相环型频率合成器,它集成了压控振荡器、双模预分频器、鉴频鉴相器、电荷泵、各种数字计数器、数字寄存器和控制电路以及与基带电路的串行接口.它的鉴频鉴相频率、输出频率和电荷泵的电流大小都可以通过串行接口进行控制,还实现了内部压控振荡器和外部压控振荡器选择、功耗控制等功能,这些都使得该频率合成器具有极大的适应性,可以应用于多种通信系统中.该锁相环型频率合成器已经采用0.25μm CMOS工艺实现,测试结果表明,该频率合成器使用内部压控振荡器时的锁定范围为1.82GHz~1.96GHz,在偏离中心频率25MHz处的相位噪声可以达到-119.25dBc/Hz.该频率合成器的模拟部分采用2.7V的电源电压,消耗的电流约为48mA.     

DDS+PLL宽带频率合成器的设计与实现

采用DDS PLL技术实现频率合成器,其特点是宽频带(3～6 CHz)、小步进(1 kHz)、低相位噪声,频率捷变.对其进行了理论分析,描述了宽频带和小步进的实现方式,相位噪声以及频率捷变的确定问题.频率合成器由DDS、锁相环路、压控振荡器、放大电路、参考信号和数据处理等电路组成.压控振荡器的信号经过功分、分频、下混频,滤波后和晶振信号在锁相环路进行鉴相,生成误差电压来控制VCO的频率,同时通过改变DDS的频率得到小步进、低相位噪声的输出信号.     

一种新型的四阶低抖动带双控制环路CMOS锁相环

设计了一种四阶低抖动带双控制环路压控振荡器的锁相环（PLL）。该锁相环在恒定的反馈参数下,压控振荡器压频增益几近恒定。锁相环的所有部件都设计在同一芯片上,电路设计基于0．35μmCMOS工艺。HSPICE仿真结果显示,所设计的锁相环路具有很好的抗噪声性能,工作在800MHz频率范围内,整个相位抖动小于4ps rms。     

基于锁相环（PLL）L波段的频率合成技术

频率合成器是电子设备的核心部件,其性能的优劣影响电子设备的整体性能。本文研究了一种基于锁相环（PLL）L波段的锁相频率技术。其设计方案使用MC145152来实现锁相环路,外加环路滤波器LPF和压控振荡器VCO等器件来实现,具有较强的研究设计价值。     

小数频率合成器中的脉冲吞除电路

最基本的数字频率合成器实际上是一个整数数字式锁相环路,电路结构方框图如图1所示.压控振荡器(VCO)的输出频率f_vco经分频器(÷N)分频以后,与基准频率?比相.当环路锁定时有     

基于CRO的低相噪频率合成器设计

频率合成器是现代电子系统的重要组成,本文采用同轴陶瓷介质振荡器(CRO)进行了压控振荡器(VCO)设计,给出了频率合成器的实现原理和设计方法,实现了低相噪的频率合成器模块,并对其性能进行了测试。     

每载波单路(SCPC)卫星通信地球站中频通道用频率合成器

本文在开发了使频率合成器输出相位噪声最佳条件下的锁相环路滤波器参数优化和输出相位噪声模拟计算软件程序的基础上,研制了三阶锁相环路构成的中频通道用频率合成器,其性能指标满足了特定的设计要求。     

数字可编程微波／射频集成锁相源的研制与应用

本文介绍一种数字可编程射频锁相源的设计,及其在ＩＳ－９５标准的码分多址（ＣＤＭＡ）移动通信系统中的应用,它由电荷泵型的数字频率合成器,无源三阶环路滤波器,以及压控振荡器构成。作为ＣＤＭＡ移动通信系统本振源,为其提供射频上／下变频器和中频调制／解调器的本振信号、以及基带部分的参考基准信号,具有低相噪、低工作电压、低功耗的特点。文中还给出了使用ＬＭＸ２３３２Ａ／ＬＭ２３３７双环数字频率合成器研制的锁相振荡源的实例及其测试结果,其相位噪声在偏离载频１０ｋＨｚ处,均优于－９２ｄＢｃ。     

A 1.8-V distributed voltage-controlled oscillator module for 5.8-GHz ISM band

This letter presents the design and implementation of a 1.8-V 5.8-GHz distributed voltage-controlled oscillator module based on bipolar transistors. The oscillator delivered -2-dBm-output power with a current consumption of 11.5 mA. The tuning range achieved was 650 MHz. The measured phase noise was -100 dBc/Hz at 1-MHz offset. The circuit construction was simple and robust and no buffer amplifier was needed. The design can be used for 5.8-GHz ISM band wireless LAN applications.     

Design of a three-stage ring-type voltage-controlled oscillator with a wide tuning range by controlling the current level in an embedded delay cell

This paper presents a new design for a three-stage voltage-controlled differential ring oscillator embedded with a delay cell for a wide tuning range from 59 MHz to 2.96 GHz by adjusting the current level in the delay cell. The ring oscillator consists of a voltage-to-current converter, coder circuit, three-stage ring with delay cells, and current monitoring circuit to extend the tuning range of the proposed voltage-controlled oscillator. Each functional block has been designed for a minimum power consumption using the TSMC 0.18 μm CMOS technology. We simulate the performances of the proposed voltage-controlled oscillator in terms of phase noise, power consumption, tuning range, and gain. Our simulation results show that the proposed oscillator has the linear frequency–voltage characteristics over a wide tuning range. At each tuning range (mode), the calculated phase noise of the proposed ring oscillator at each tuning range (mode) was −87, −85, −81, and −79 dBc/Hz at a 1 MHz offset from the center frequency. The DC power of the proposed voltage-controlled oscillator consumed 0.86–3 mW under a 1.8 V supply voltage.     

W-CDMA/cdma2000/GSM三频/三模移动台射频模块的研究

针对移动通信领域出现的多种模式和多个频段共同存在和使用的形势，提出了合理的W-CDMA／cdma2000／GSM三频／三模的移动台射频模块的设计解决方案，并在6层PCB板上研制了该三频／三模射频模块，其结构简洁，体积小，性能优良。在测试中严格按照3GPP和3GPP2的技术标准进行射频模块的各项指标测试，所测的各项指标均达到了3GPP和3GPP2的相关技术标准。     

Fully integrated W-CDMA IF receiver and IF transmitter including IFsynthesizer and on-chip VCO for UMTS mobiles

A fully integrated, dual intermediate frequency (IF) receiver and an IF transmitter, each with on-chip IF synthesizer, for use in third-generation wide-band code division multiple access (W-CDMA) mobiles has been implemented in a standard, high-frequency, Si-bipolar process with an f_T of 25 GHz. The IF receiver (318 MHz) and IF transmitter (285 MHz) include a complete phase-locked loop (PLL) and on-chip voltage-controlled oscillator (VCO) with integrated varactors and transformers. The VCOs are used for on-chip local oscillator (LO) generation and operate at four times IF, 1272 MHz and 1140 MHz, for Rx and Tx, respectively. Fully integrated, active, analog base-band filters further increase functionality and integration level. In the receiver, a channel select filter, composed of a fifth-order Chebyshev lowpass filter and a first-order all-pass filter, is implemented. In the transmitter, a fifth-order Butterworth low-pass filter functions as a reconstruction filter. Both devices operate on 2.7-3.3-V supply. The designs comply with ARIB W-CDMA and UMTS standards. Each chip is mounted in a small outline, 32-pin, leadless surface mount package     

第三代移动通信测试信号源射频模块的研制

针对WCDMA,cdma2000以及TD-SCDMA这三种主流的第三代移动通信标准,研制了测试信号源射频模块。该模块具有集成度高、成本低、配置灵活等特点。文中给出了该模块的设计方案,对各种模式下的射频性能进行了仿真。研究了多种标准下的射频测试方案。最终研制的射频模块尺寸为7.5cm×6cm,测试结果满足3GPP和3GPP2的技术标准。     

RF VCO tuning using MEMS piezoelectric actuated variable inductors

This paper presents a study on the use of microsystems technology in the design of radio frequency voltage-controlled oscillators. In particular, the application of a micro-electro-mechanical systems (MEMS) based variable inductor for frequency tuning purposes is presented. Although traditionally a MEMS variable inductor is considered as a means to extend the tuning range, in this work it is shown that with correct inductor design it is also possible to facilitate and improve the voltage-controlled oscillator design in terms of phase noise response and power consumption in comparison to a design based on standard capacitive tuning.     

A compact full MMIC module for Ku-band phase-lockedoscillators

A compact Ku-band phase-locked oscillator module has been developed in a full MMIC (monolithic microwave integrated circuit) configuration. The module includes an MMIC voltage-controlled oscillator, an analog frequency divider, and interstage amplifiers. The constituent monolithic chips are integrated in a very small single-package module and operate at the target frequencies without any external trimming or matching network. The oscillator is tuned more than 1 GHz with a constant output amplitude. The frequency-divided output is also obtained over the whole tuning range. Spurious output is not found at any frequency up to 22 GHz. In spite of the very low-Q factor of GaAs monolithic circuitry, the oscillator phase noise exhibited is less than -80 dBc/Hz, due to the high-gain, high-speed phase lock     

On-Pixel Voltage-Controlled Oscillator in Amorphous-Silicon Technology for Digital Imaging Applications

The design and implementation of an on-pixel voltage-controlled oscillator for digital imaging applications based on a ring-oscillator circuit fabricated in amorphous silicon thin-film transistor technology is presented. Preliminary results on sensitivity, voltage to frequency gain, linearity, and simulation results of long-term stability appear promising for its application in large-area digital medical X-ray imagers     

锁相环电路中压控振荡器的分析与设计

本文设计了一个应用于高频锁相环（PLL）系统的负阻LC压控振荡器,在传统LC压控振荡器基础上,通过采用二次谐波滤波技术降低了振荡器的相位噪声,并完成了电路的仿真。仿真结果表明,该压控振荡器的振荡频率在1．9—2．1GHz,其频率调节范围达到200MHz,并且在距中心频率1MHz处其相位噪声为-148．825dBc／Hz...