A 0.5–1 GHz single stage linear-in-decibel VGA with 80 dB gain range in 0.18 μm CMOS

Communication systems require a wide gain range. For example the code-division multiple access system (CDMA) requires more than 80 dB of gain range so that, many variable gain amplifiers (VGAs) must be used, resulting in high power consumption and low linearity because of VGA non-linearity factors. In this paper, a one-stage VGA in 0.18 μm technology is presented. The VGA based on the class AB power amplifier is designed and simulated for a high linearity and an 80 dB tuning range. For the linear-in-decibel tuning range, transistors in sub-threshold region is used. The current control circuit of the VGA changes gain continuously from ?68 to 18 dB at 0.5 GHz and ?60 to 20 dB at 1 GHz with gain error of less than 2 dB. The power consumption enjoys a highest value about 13.5 mW in the maximum gain and P1dB is also about ?3.4 dBm at 0.5 GHz and 2.2 dBm at 1 GHz.     

A monolithically integrated HEMT-HBT low noise high linearityvariable gain amplifier

We report on a 1-6 GHz HEMT-HBT three-stage variable gain amplifier (VGA), which is realized using selective molecular beam epitaxy (MBE). The VGA integrates an HEMT low noise amplifier with an HBT analog current-steer variable gain cell and output driver stage to achieve a combination of low noise figure, wide gain control, and high linearity. The HEMT-HBT VGA MMIC obtains a maximum gain of 21 dB with a gain control range >30 dB, a minimum noise figure of 4.3 dB, and an input IP3 (IIP3) greater than -4 dBm over 25 dB of gain central range. By integrating an HEMT instead of on HBT preamplifier stage, the VGA noise figure is improved by as much as 2 dB compared to an all-HBT single-technology design. The HEMT-HBT MMIC demonstrates the functional utility and RF performance advantage of monolithically integrating both HEMT and HBT devices on a single substrate     

多晶发射极双台面微波功率SiGe HBT

研制成功了可商业化的75mm单片超高真空化学气相淀积锗硅外延设备SGE500,并生长了器件级SiGe HBT材料.研制了具有优良小电流特性的多晶发射极双台面微波功率SiGe HBT器件,其性能为:β=60@VCE/IC=9V/300μA,β=100@5V/50mA,BVCBO=22V,ft/fmax=5.4GHz/7.7GHz@10指,3V/10mA.多晶发射极可进一步提供直流和射频性能的折衷,该工艺总共只有6步光刻,与CMOS工艺兼容且(因多晶发射极)无需发射极外延层的生长,这些优点使其适合于商业化生产.利用60指和120指的SiGe HBT制作了微波锗硅功率放大器.60指功放在900MHz和3.5V/0.2A偏置时在1dB压缩点给出P1dB/Gp/PAE＝22dBm/11dB/26.1%.120指功放900MHz工作时给出了Pout/Gp/PAE＝33.3dBm (2.1W)/10.3dB/33.9%@11V/0.52A.     

Wide dynamic range variable-gain amplifier based on new approximated exponential equation

A new approximated exponential equation is proposed, which offers a wide decibel linear range for use in many applications such as exponential converters, log-domain filters, variable gain amplifiers (VGAs), automatic gain control amplifiers, etc. The proposed equation is implemented into a circuit as a two-stage VGA, which is fabricated in 0.18 mum CMOS technology and offers a gain range of 90 dB (-54-36 dB) and about 82 dB with linearity error of less than plusmn1 dB. The 3 dB bandwidth is 50 MHz at a maximum gain of 36 dB and P1 dB is from -40 to -17 dBm. The power dissipation is 3.7 mA from a 1.8 V supply. The chip, excluding bond pads, occupies 0.34 mm²     

5.2 GHz variable-gain amplifier and power amplifier driver for WLAN IEEE 802.11a transmitter front-end

A 5.2 GHz variable-gain amplifier (VGA) and a power amplifier (PA) driver are designed for WLAN IEEE 802.11a monolithic RFIC. The VGA and the PA driver are implemented in a 50 GHz 0.35 μm SiGe BiCMOS technology and occupy 1.12×1.25 mm2 die area. The VGA with effective temperature compensation is controlled by 5 bits and has a gain range of 34 dB. The PA driver with tuned loads utilizes a differential input, single-ended output topology, and the tuned loads resonate at 5.2 GHz. The maximum overall gain of the VGA and the PA driver is 29 dB with the output third-order intercept point (OIP3) of 11 dBm. The gain drift over the temperature varying from -30 to 85℃ converges within±3 dB. The total current consumption is 45 mA under a 2.85 V power supply.     

GNSS接收机带有滤波功能可变增益放大器的设计

传统GNSS前端接收机系统中,可变增益放大器（VGA）不具备滤波功能,大多数选用片外滤波,这样系统增益和集成度降低,而系统集成的波器选频性能有限。为此,设计一种具有滤波功能的可变增益放大器,采用0．5μmSiGe HBT工艺,可控增益单元与Gm-C滤波单元集成一体,并运用4晶体管回转器结构实现滤波。电路驱动电压为3.3V,电流为11．7mA。线性增益控制范围为-26～62dB,且电压控制范围为0．1．8V,最小增益下输入1dB压缩点为-4dBm。可变增益放大器电路不仅具备大的增益控制范围,而且中频46MHz处滤波性能良好,提高芯片的集成度．降低系统功耗。     

GaAs HBT 0.75-5 GHz multifunctional microwave-analog variable gainamplifier

We report on a GaAs HBT 3-stage variable gain amplifier operating over a 0.75-5 GHz frequency band. The amplifier is broken up into a single-ended HBT LNA pre-amplifier, an analog current steering differential cascode cell for variable gain control, and a differential amplifier output stage. The broadband pre-amplifier is required to reduce the inherently noisy differential cascode stage, and an output differential amplifier is used to provide output drive capability and differential to single-ended conversion. The VGA has a maximum gain of 23.8 dB gain, an IP3>18 dBm, and a noise figure of 6.5 dB. The variable gain control range is >35 dB. This chip demonstrates the versatility of HBT IC technology which can integrate digital, analog, and microwave circuit functions to achieve high performance in a single monolithic chip     

A 2.7-V SiGe HBT variable gain amplifier for CDMA applications

A monolithic SiGe HBT variable gain amplifier with high dB-linear gain control and high linearity has been developed for CDMA applications. The VGA achieves a 30-dB dynamic gain control with a control range of 0-2.7 Vdc in 824-849 MHz band. The maximum gain and attenuation are 23 dB and 7 dB, respectively. Input/output VSWRs keep low and constant despite change in the gain-control voltage. At a low operation voltage of 2.7 V, the VGA produces a 1-dB compression output power of 13 dBm and /spl plusmn/885-kHz ACPR of -57 dBc at a 5-dBm output power.     

A Differential-Ramp Based 65 dB-Linear VGA Technique in 65 nm CMOS

In this paper, a differential-ramp based variable gain amplifier (VGA) technique is introduced. Using the proposed technique, digitally programmable gain amplifiers (PGAs) can be converted to analog controlled, dB-linear VGAs with minimum impact on noise and linearity. This provides an efficient way of realizing an analog controlled VGA for OFDM based applications. The technique is illustrated by converting an opamp based high-linearity, low-noise PGA to a dB-linear VGA for CMOS mobile TV applications. The design including the cascade of a two-stage continuous 65-dB-linear VGA and a third-order Sallen–Key buffer stage is fabricated in a 65 nm CMOS process. The measured in-band OIP3 of the whole chain at maximum gain of 47 dB is 22 dBm, whereas the blockers in the adjacent channel result in 34 dBm OIP3 for the same gain setting. The design achieves 11 nV/$sqrt{hbox{Hz}}$ input referred noise density and occupies a die area of 0.17 ${hbox{mm}}^{2}$. The VGA circuit consumes 1.5 mA of current from a 1.2 V supply with an additional 200 $muhbox{A}$ switch control ramp current from a 2.5 V supply.      

80-GHz Tuned Amplifier in Bulk CMOS

An 80-GHz six-stage common source tuned amplifier has been demonstrated using low leakage (higher V_T) NMOS transistors of a 65-nm digital CMOS process with six metal levels. It achieves power gain of 12 dB at 80 GHz with a 3-dB bandwidth of 6 GHz, noise figures (NF's) lower than 10.5 dB at frequencies between 75 and 81 GHz with the lowest NF of 9 dB. IP_{1 dB} is -21 dBm and IIP3 is -11.5 dBm. The amplifier consumes 27 mA from a 1.2 V supply. At V_DD = 1.5 V and 33 mA bias current, NF is less than 9.5 dB within the 3-dB bandwidth and reaches a minimum of 8 dB at 80 GHz.     

2.4 GHz WLAN InGaP/GaAs Power Amplifier with Temperature Compensation Technique

This letter presents a high performance 2.4 GHz two‐stage power amplifier (PA) operating in the temperature range from ?30…C to +85^oC for IEEE 802.11g, wireless local area network application. It is implemented in InGaP/GaAs hetero‐junction bipolar transistor technology and has a bias circuit employing a temperature compensation technique for error vector magnitude (EVM) performance. The technique uses a resistor made with a base layer of HBT. The design improves EVM performance in cold temperatures by increasing current. The implemented PA has a dynamic EVM of less than 4%, a gain of over 26 dB, and a current less than 130 mA below the output power of 19 dBm across the temperature range from ?30^oC to +85^oC.     

Noise-canceling and IP3 improved CMOS RF front-end for DRM/DAB/DVB-H applications

A CMOS RF (radio frequency) front-end for digital radio broadcasting applications is presented that contains a wideband LNA, I/Q-mixers and VGAs, supporting other various wireless communication standards in the ultra-wide frequency band from 200 kHz to 2 GHz as well. Improvement of the NF (noise figure) and IP3 (third-order intermodulation distortion) is attained without significant degradation of other performances like voltage gain and power consumption. The NF is minimized by noise-canceling technology, and the IP3 is improved by using differential multiple gate transistors (DMGTR). The dB-in-linear VGA (variable gain amplifier) exploits a single PMOS to achieve exponential gain control. The circuit is fabricated in 0.18-μm CMOS technology. The S_(11) of the RF front-end is lower than -11.4 dB over the whole band of 200 kHz-2 GHz. The variable gain range is 12-42 dB at 0.25 GHz and 4-36 dB at 2 GHz. The DSB NF at maximum gain is 3.1-6.1 dB. The IIP3 at middle gain is -4.7 to 0.2 dBm. It consumes a DC power of only 36 mW at 1.8 V supply.     

一种具有温度补偿的宽带CMOS可变增益放大器

设计实现了一个具有温度补偿的宽带CMOS可变增益放大器,该可变增益放大器的核心电路由三级基于改进型Cherry-Hooper结构的可变增益单元级联而成,并通过一种温度系数增强的且可编程的偏置电路和增益控制电路对可变增益放大器的增益进行温度补偿。采用中芯国际0.13μm CMOS工艺流片,测试结果表明可变增益放大器的可变增益范围为-13～27dB,经过温度补偿后,在相同增益控制电压下其增益在0～75°C温度范围内的变化范围不超过3dB。可变增益放大器的3dB带宽为0.8～3GHz,输入1dB压缩点为-50～-21dBm,在1.2V电压下,功耗为21.6mW。     

A packaged broad-band monolithic variable gain amplifierimplemented in AlGaAs/GaAs HBT technology

Broad-band amplifiers find application in fiber-optic communication link and instrumentation or serve as generic components in high-speed electronic test laboratories. With an advanced AlGaAs/GaAs heterojunction bipolar transistor (HBT) technology, we have designed and fabricated broad-band monolithic variable gain amplifiers (VGAs). High-speed packages for the VGAs were carefully designed to minimize insertion and return losses and to suppress undesired package cavity resonances. Accurate and efficient models for the packages were obtained based on experimental data so that their parasitic effects could be considered in the VGA design. The packaged VGAs provided 10-16 dB adjustable gain with approximately ±1 dB gain variations and constant group delay in the DC-26 GHz band, and showed better than 10 dB input/output return losses in the amplifier passband. When the packaged VGAs were inserted in a 30 Gb/s electronic link, error-free operation was achieved for a 2³¹-1 input pseudorandom bit sequence. These VGAs can be used in fiber-optic transmission systems with data rates up to 30 Gb/s     

具有温度补偿及dB线性增益控制的单级宽范围CMOS可变增益放大器

提出了一种新颖的宽范围CMOS可变增益放大器结构.利用可变跨导和新颖的可变输出电阻,基于单独可变增益级的放大器可提供80dB的宽范围调节.同时控制电路的设计完成了温度补偿及dB线性增益特性,实现在整个温度及增益调节范围内绝对增益误差小于±1.5dB.基于0.25μm CMOS工艺验证表明,放大器可提供64.5dB的增益变化范围,其中dB线性范围为55.6dB.输入1dB压缩点为-17.5到11.5dBm,3dB带宽为65MHz到860MHz,2.5V电源供电下功耗为16.5mW.     

应用于TD-LTE的SiGe BiCMOS功率 放大器的设计

针对准第四代无线通信技术TD-LTE中2.570~2.620 GHz频段的应用,设计了一款基于IBM SiGe BiCMOS7WL工艺的射频功率放大器。该功率放大器工作于AB类,采用单端结构,由两级共发射极电路级联构成,带有基极镇流电阻,除两个谐振电感采用片外元件外,其他全部元件均片上集成,芯片面积为(1.004×0.736)mm2。测试结果表明,在3.3 V电源电压下,电路总消耗电流为109 mA,放大器的功率增益为16 dB,输出1 dB增益压缩点为15 dBm。该驱动放大器具有良好的输入匹配,工作稳定。     

A 60-dB 246-MHz CMOS variable gain amplifier for subsampling GSM receivers

A variable gain amplifier (VGA) is designed for a GSM subsampling receiver. The VGA is implemented in a 0.35-/spl mu/m CMOS process and approximately occupies 0.64 mm/sup 2/. It operates at an IF frequency of 246 MHz. The VGA provides a 60-dB digitally controlled gain range in 2-dB steps. The overall gain accuracy is less than 0.3 dB. The current is 9 mA at 3 V supply. The noise figure at maximum gain is 8.7 dB. The IIP3 is -4 dBm at minimum gain, while the OIP3 is -1 dBm at maximum gain. The group delay is 1.5 ns across 5-MHz bandwidth.     

An X‐Band Carbon‐Doped InGaP/GaAs Heterojunction Bipolar Transistor MMIC Oscillator

This paper addresses a fully‐integrated low phase noise X‐band oscillator fabricated using a carbon‐doped InGaP heterojunction bipolar transistor (HBT) GaAs process with a cutoff frequency of 53.2 GHz and maximum oscillation frequency of 70 GHz. The oscillator circuit consists of a negative resistance generating circuit with a base inductor, a resonating emitter circuit with a microstrip line, and a buffering resistive collector circuit with a tuning diode. The oscillator exhibits 4.33 dBm output power and achieves ?127.8 dBc/Hz phase noise at 100 kHz away from a 10.39 GHz oscillating frequency, which benchmarks the lowest reported phase noise achieved for a monolithic X‐band oscillator. The oscillator draws a 36 mA current from a 6.19 V supply with 47.1 MHz of frequency tuning range using a 4 V change. It occupies a 0.8 mm × 0.8 mm die area.     

基于无线功率放大器应用的多指结构SiGe HBT

采用简单的双台面工艺制作了完全平面结构的5个单元、10个发射极指大面积的SiGe HBT.器件表现出了良好的直流和高频特性,最大电流增益β为214.BVCEO为9V,集电极掺杂浓度为1×1017 cm-3,厚度为400nm时,BVCBO为16V.在直流偏置下IC=30mA,VCE=3.0V得到fT和fmax分别为18.0GHz和19.3GHz,1GHz下最大稳定增益为24.5dB,单端功率增益为26.6dB.器件采用了新颖的分单元结构,在大电流下没有明显的增益塌陷现象和热效应出现.     

A 3.1-4.8 GHz CMOS receiver for MB-OFDM UWB

An integrated fully differential ultra-wideband CMOS receiver for 3.1-4.8 GHz MB-OFDM systems is presented. A gain controllable low noise amplifier and a merged quadrature mixer are integrated as the RF front-end. Five order Gm-C type low pass filters and VGAs are also integrated for both I and Q IF paths in the receiver. The ESD protected chip is fabricated in a Jazz 0.18 μm RF CMOS process and achieves a maximum total voltage gain of 65 dB, an AGC range of 45 dB with about 6 dB/step, an averaged total noise figure of 6.4 to 8.8 dB over 3 bands and an in-band lIP3 of-5.1 dBm. The receiver occupies 2.3 mm2 and consumes 110 mA from a 1.8 V supply including test buffers and a digital module.