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1.
A new variational derivation of the coupling coefficient is given for the problem of nondegenerate surface-wave modes on parallel dielectric waveguides. The results coincide with those of a number of different methods in the literature on the degenerate case, but all give distinct results in the nondegenerate case. These differences are examined and compared with the exact solution, whereby the approximations involved can be evaluated for the case of two parallel slab waveguides.  相似文献   

2.
单模光纤与条形波导的耦合封装技术   总被引:1,自引:0,他引:1  
杨fan 《半导体光电》1989,10(2):31-44
本文对单模光纤与条形波导的耦合封装技术进行了评述。使用改进后的“倒装”耦合技术进行了耦合实验,完成了单模光纤耦合 Ti:LiNbO_3波导相位调制器的封装,达到了光纤/器件(2厘米长波导)/光纤总插入损耗小于5dB。同时,阐述了耦合技术的发展方向。  相似文献   

3.
利用法拉第磁光效应可以设计光纤磁场传感器。在磁场传感过程中,磁光晶体薄膜波导的TE模和TM模式之间将发生转换,:其转换效率与磁光晶体的法拉第旋转角度和双折射有关。本文建立了磁光波导的耦合模方程,分析了磁光波导中的TE—TM模转换,提出了通过减小线性双折射和增大法拉第旋转角来提高TE—TM模耦合效率的措施,这些措施有利于增大光束TM模的输出功率并提高光纤磁场传感器的灵敏度。  相似文献   

4.
朱斌 《印制电路信息》2006,(1):36-39,51
盲孔能够大大的增加板的密度,从而减小板面积。介绍了有关高厚径比盲孔电镀的有关工艺,从激光钻孔、金属化孔和电镀几个方面对孔径4mil以上的盲孔电镀进行了研究。  相似文献   

5.
高厚径比贯通孔的无添加剂电镀   总被引:3,自引:0,他引:3  
在多层印制线路板中,为了在贯通孔中生产出均匀厚度的铜镀覆层,加上这些多层PWB持续地发展更厚的板和更小的贯通孔,以满足表面安装技术(SMT)的发展要求,其结果导致孔内镀层厚度均匀性电镀的困难.一系列改进的技术,如射流喷射、化学蒸汽沉积(CVD,Chemical Vapor Deposition)、全加成化学镀和调整(酸性镀铜)等来满足高厚径比多层板制造者的要求.但是这些技术由于高投资,与环境不友善、长的电镀时间、不均匀的镀层厚度,或者要取决于专用(利)的添加剂等.同时,这些技术随着高厚径比的增加而变得越来越无效.但是用于高厚径比的贯通孔和导通孔的周期反向电流(PRC,PeriodicReverse Current)电沉积可获得明显的镀层均匀性和提高生产率,而且有利于保护环境.我们基于PRC工艺而开发出一种无添加剂的高厚径比电镀铜体系.这种工艺已制备出PTH的样品,其板表面/孔内的镀铜厚度接近于1.同时,所镀得铜箔用于机械特性评价已表明抗拉强度和延展性类似于常规DC有添加剂镀液所制得的铜箔的特性.最后,我们采用PRC并在两倍于常规电流密度的50ASF(约5.4A/dm2)下制得高质量电积铜层.初步的结论表明,PRC电镀可在较高电镀生产率而不用有机添加剂下制得精确的镀层控制特性.通过连续努力开发形成一个Database/algorithm以得到所期望的最佳电镀波形特性.这个Database/algorithm将集成到无添加剂的高厚径比电镀系统中.  相似文献   

6.
A high aspect ratio silicon nanowire is proposed for a stiction immune gate-all-around (GAA) MOSFET on a bulk substrate with a fully CMOS compatible technology. Epitaxially grown SiGe serves as a sacrificial layer to yield a suspended nanowire structure. A high aspect ratio structure derived from an epitaxially grown thick-Si film provides a stiction immune property. The fabricated GAA device on a bulk substrate shows superior short-channel effects and improved drive current. In addition, an extremely long suspended nanowire structure can be implemented to a nand string composed of 64 or longer cells.   相似文献   

7.
随着背板的出现,板件厚度越来越高,同时板件的布线密度也越来越大,迫切需要采用精细线路和小孔来应对这种发展趋势。在这种情况下,高厚径比板件将逐渐成为PCB发展的主流。但这将对加工制程提出巨大的挑战,特别是镀锡抗蚀层的退膜蚀刻流程。文章主要针对高AR值(≥8∶1)板件图形电镀制作过程中出现的抗蚀不良孔无铜进行分析和研究,达到提升生产线加工能力和板件品质的目的。  相似文献   

8.
An electrostatically actuated, microwave microelectromechanical system variable capacitor fabricated using deep X-ray lithography is presented. A single exposure has been used to produce the novel high aspect ratio microstructure, which includes a thin, vertically oriented, movable nickel cantilever beam and a 40:1 vertical aspect ratio capacitance gap. The 0.8-pF capacitor operates in the 1-5GHz region and has Q-factors of 36 at 4GHz and 133 at 2 GHz. The variable capacitance ratio is 1.24:1 over a 20-V tuning range at 4GHz  相似文献   

9.
In recent years, the fabrication of Janus materials and their potential applications has been of much interest in Materials Science. Here, we report the fabrication of an entirely novel structure–Janus nanowalls and the phenomenon of lateral buckling in them. Polymeric nanowalls were prepared with the replica molding technique and metal films, of comparable thicknesses, were then deposited on one side of the polymer nanowalls by vacuum process. During the metal deposition, the nanowalls themselves buckle laterally; this buckling is induced by the compressive residual stress in the metal film and geometric confining constraints. The feature of wrinkle patterns resulting from the lateral buckling was theoretically investigated using the scaling analysis. Theoretical results are in good agreement with the experimental observations.  相似文献   

10.
Based on the bent waveguide mode coupling theory, a combined TM01-TE11 mode converter with parallel input and output ports is designed by numerical calculation with the phase rematch technology employed. A numerical calculation comparison between the converter and another double-arc TM01-TE11 mode converter with nonparallel input and output ports shows that the former has obvious advantages over the latter in conversion, bandwidth and compact. Good agreement between tests and calculations shows the converter meets the application well.  相似文献   

11.
High aspect ratio pillared topographies provide a large number of mechanical cues that cells can sense and react to. High aspect ratio pillars have been employed effectively to promote stem cell differentiation and to probe cellular tractions. Yet, the full potential of these topographies for mechanobiology remains insufficiently characterized. Here, the response of progenitor neural stem cells to dense high aspect ratio polymer pillars in the nano‐ and microscale is investigated. Thermal nanoimprinting is utilized to fabricate with high precision well‐defined pillars with high density and aspect ratio. Studies on cell viability, morphology, cell spreading, and migration are performed comparatively to a control flat substrate. The traction forces exerted by the cells on the pillar structures are probed quantitatively by a combined focused ion beam scanning electron microscopy (FIB‐SEM) technique. The cell responses observed are distinctive for each dimension, following the trend that an increase in aspect ratio and feature size from nano‐ to micronscale results in more confined cell morphology with large cytoplasmic penetrations and nuclear deformation. Accordingly, cells seeded on the micrometer scale topography show reduced mobility, a persistent quasi‐directional migration, high traction forces, and a lower rate of proliferation. Cells on the nanotopography show higher rate of proliferation, a large cell spread, high mobility with random migration altogether with lower traction forces.  相似文献   

12.
13.
This paper provides a detailed overview of silicon carrier-based packaging for 3-D system in packaging application. In this work the various critical process modules that play a vital role in the integration and fabrication of silicon carrier with high aspect ratio tapered through-silicon interconnections have been explained and discussed with experimental data. A method of fabricating tapered deep silicon via in a three-step approach has been developed and characterized which controls via depth, sidewall profile, and surface roughness effectively. A low-temperature dielectric deposition process is also developed that has minimum residual stress and good dielectric coverage on the via sidewall. The above processes were then integrated with back-end processes like seed metallization, copper electroplating, chemical mechanical polishing, and wafer thinning to realize a fully integrated silicon carrier fabrication technology. The silicon carriers were finally assembled and tested for through silicon interconnection.   相似文献   

14.
郑志霞 《半导体技术》2012,37(2):130-134
由于石英晶体的刻蚀速率小,要实现石英晶体的高深宽比刻蚀,常用的光刻胶或金属掩膜不能满足工艺要求。提出使用双重掩蔽层的方法实现石英晶体的高深宽比刻蚀,即石英晶体和单晶硅键合,然后在单晶硅表面生长二氧化硅,二氧化硅作为刻蚀单晶硅的掩蔽层,单晶硅作为刻蚀石英晶体的掩蔽层。ICP刻蚀过程使用SF6作为刻蚀气体、C4H8作为钝化气体、He作为冷却气体。控制好气体的流量和配比,选择合适的射频功率,能刻蚀出深度为30μm,宽度为50μm的深槽。该工艺对开发新型石英晶体器件有积极的意义。  相似文献   

15.
概述了来自PCB制造厂的微导通孔填充材料要求和机器加工能力的研究,适宜于高密度高厚径比导通孔的大量生产。  相似文献   

16.
针对目前光电印制板(OEPCB)中光电器件与光波导对接的垂直耦合结构耦合效率较低的问题,分析了传统嵌入式45°反射微镜的垂直耦合结构,提出了一种新的垂直耦合结构,经Matlab仿真验证其具有更高的垂直耦合效率。研究表明,新结构对光电对准精度要求不高,受传统PCB制作工艺的层压的高温高压影响更小、便于兼容传统PCB制作工艺。  相似文献   

17.
在高长径比硅微通道光电化学腐蚀中,需要根据通道尺寸要求实时修正腐蚀电流.研究了物质输运、暗电流对腐蚀电流控制的影响,并提出了腐蚀电流的控制曲线.根据电解液扩散方程和边界条件,推导出通道尖端处HF质量分数与通道长度的关系.根据腐蚀后的暗扫描I-V曲线计算出暗电流密度.与腐蚀电流密度相比,阴离子表面活性剂的暗电流可忽略不计,进而获得了腐蚀电流修正曲线.根据腐蚀电流修正曲线,通过控制光照强度制备出高长径比(大于60)的等径硅微通道阵列.对修正的腐蚀电流进行调整,制备出通道尺寸空间周期性变化的硅微通道结构.研究结果可为高长径比硅微通道的制备提供技术方法.  相似文献   

18.
本文综述了高厚径比多层板特别是厚径比达到3以上的多层板,在制造过程中电镀处理的难点并提出解决方法.  相似文献   

19.
构成“电镀工艺”领域的“最好的实践”的任何加工设备必将在质量、生产率和降低成本方面获得重大的进展,本文就是一个起点。  相似文献   

20.
A new family of a single-switch three-diode dc-dc pulsewidth-modulated (PWM) converters operating at constant frequency and constant duty cycle is presented in this paper. The proposed converters are different from the conventional dc-dc step-up converters, and they posses higher voltage gain with small output voltage ripples. Other advantages of the proposed converters include lower voltage stress on the semiconductor devices, simple structure, and control. Moreover, the reduced voltage stress on the diodes allows using Schottky diodes for alleviating the reverse-recovery current problem, as well as decreasing the switching and conduction losses. The principle of operation, theoretical analysis, and experimental results of one prototype rated 40 W and operating at 94 kHz are provided in this paper to verify the performance of this new family of converters.  相似文献   

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