一种模数混合电路故障诊断新方法

把模拟电路故障诊断的子网络撕裂诊断法与数字电路故障诊断的伪穷举测试法相结合．提出了一种应用于模数混合电路的故障诊断方法。其诊断思想是把串联形式的混合电路，划分成模拟和数字电路两部分．并分别进行诊断。该方法计算量小、诊断定位精度高，适合于工程应用。     

基于双向电流型CMOS电路的谱综合

数字逻辑中的谱技术主要用于数字电路的分析,本文则研究谱技术在数字电路设计中的应用。文中用双向电流CMOS电路实现谱函数,为数字电路设计提供了新的技术手段。     

Switched-current oversampling converters

There are many choices in designing a real-time signal processing system. To exploit the advantages that inexpensive digital CMOS process technologies provide, it is usually a good choice to use digital signal processing circuits extensively and to use analog circuits only as a bridge between the real analog world and digital signal processing circuits. The mixed analog/digital circuits usually have high performance and low cost. SI oversampling converters in particular are the ideal choice as the front ends for the mixed analog/digital design. They serve to bridge the real world and modern process technologies     

指导nM0S数字电路元件级设计的开关信号理论

本文指出了布尔代数在指导数字电路设计中的不足,并在区分描写开关状态与信号的二类变量的基础上建立了能反映数字电路内开关元件与信号相互作用过程的开关信号理论。本文把该理论具体用于对nMOs数字电路的研究,结果表明该理论可很好地指导nMOS数字电路在元件级的逻辑设计。     

High speed GaAs integrated circuits

Much interest has been expressed in the use of GaAs MESFET's for high speed digital integrated circuits (IC's). Propagation delays in the 60- to 90-ps/gate range have been demonstrated by several laboratories on SSI and MSI logic circuits. Recently, large scale digital IC's with over 1000 gates have been demonstrated in GaAs. In this review paper, the device, circuit, and processing approaches presently being explored for high speed GaAs digital circuits are presented. The present performance status of high speed circuits and LSI circuits is reviewed.     

Substrate coupling in digital circuits in mixed-signal smart-power systems

This paper describes theoretical and experimental data characterizing the sensitivity of nMOS and CMOS digital circuits to substrate coupling in mixed-signal, smart-power systems. The work presented here focuses on the noise effects created by high-power analog circuits and affecting sensitive digital circuits on the same integrated circuit. The sources and mechanism of the noise behavior of such digital circuits are identified and analyzed. The results are obtained primarily from a set of dedicated test circuits specifically designed, fabricated, and evaluated for this work. The conclusions drawn from the theoretical and experimental analyses are used to develop physical and circuit design techniques to mitigate the substrate noise problems. These results provide insight into the noise immunity of digital circuits with respect to substrate coupling.     

开关——信号理论与数字电路的开关级设计

本文在分析数字电路的传统设计理论中存在问题的基础上，提出了使用开关变量与信号变量来分别描写数字电路内部元件的开关状态与电路信号等二者，并由此出发建立了开关——信号理论。根据具体数字电路内部的工作原理，本文分别对CMOS与ECL等二种电路进行了讨论．并发展了相应的开关级设计技术。设计实例表明，由于设计中以开关晶体管为构造单元，因此开关级设计的电路要比传统的仃级设计具有较简单的结构。     

Measurement of digital noise in mixed-signal integrated circuits

This paper proposes a method of measuring the influence of digital noise on analog circuits using wide-band voltage comparators as noise detectors. Noise amplitude and r.m.s voltage are successfully measured by this method. A test chip is fabricated to measure the digital noise influence. From the experimental results, it is shown that the digital noise influence can be considerably reduced by using a differential configuration in analog circuits for mixed-signal IC's. The digital noise influence can be further reduced by lowering the digital supply voltage. These results show that the voltage-comparator-based measuring method is effective in measuring the influence of digital noise on analog circuits     

Circuit-level simulation of TDDB failure in digital CMOS circuits

An efficient circuit-level simulator for the prediction of time-dependent dielectric breakdown effects in digital CMOS circuits has been developed and integrated into the reliability simulation tool BERT (Berkeley Reliability Tools). The new module enhances the capability of the earlier SPICE-based oxide breakdown simulator by enabling practical simulations of large digital circuits. We discuss burn-in simulation for digital circuits and show that a significant reduction in oxide breakdown failure probability is possible     

CMOS图像传感器中数字噪声抑制技术研究

设计了一种可以降低CMOS图像传感器(CIS)中数字噪声对模拟信号影响的时序.在时序控制电路中加入了门控时钟,使数字电路各模块可分时工作,在模拟电路采样阶段保持静止以抑制噪声.理论分析和测试结果表明,采样阶段噪声减小70%,其他时间噪声减小20%.     

On integrated circuit bidirectional amplifiers

Describes the development of two bidirectional digital amplifiers for use in cellular switching structures and cellular computers. An evaluation of several circuits resulted in the development of two new and different circuits, which meet the previously mentioned requirements. The circuits have been evaluated by computer simulation and one of the circuits was constructed on an integrated circuit chip to prove its practicality. The resulting circuits are different from all other bidirectional digital amplifiers. They require no clock signals for operation and noise does not cause them to latch up. This represents a significant advance in the design of bidirectional digital amplifiers and makes possible their use in areas in which they were previously considered impractical.     

静态存储单元电路设计工艺的研究

论述了静态存储单元电路对目前高速数字系统的意义。通过采用对双极型(Bipolar)、互补对称式金属–氧化物–半导体型(CMOS)、双极互补金属氧化物半导体型(BiCMOS)三种不同工艺所设计的静态存储单元电路在性能、特点方面进行比较的方法,从而提出一些实际的解决措施,以便研发人员在设计具体的SRAM电路时有所参考。     

程控交换机全数字音信号及多频信号设计方法

本文以新型数字交换机系统为背景,提出了全数字音信号和多频互控信号的设计方法。讨论了电路原理、编码方式,电平设计和脉冲信号的时序关系。最后给出了电原理图和试验数据结果。     

用VHDL实现数字时钟的设计

以一款数字钟设计为例,较详细的介绍了如何用VHDL语言设计数字电路,并给出了部分程序、仿真波形图,并在MAX＋plusⅡ中进行编译、仿真、下载。由此说明利用VHDL开发数字电路的优点。     

GaN HFET digital circuit technology for harsh environments

The first demonstration of GaN digital circuits is reported. First-generation GaN digital technology has already shown high yields for circuits of considerable complexity. Specifically, a 31-stage ring oscillator was implemented using 217 transistors. Properties of the AlGaN/GaN material system that enable outstanding power handling capabilities of GaN heterojunction field effect transistors (HFETs), i.e. large bandgap, high breakdown field and high saturation velocity, also make it attractive for digital applications in harsh environments. Because of these unique material characteristics, GaN digital control circuits have the potential to operate in high radiation environments, at elevated temperatures, and directly from high voltage rails. Successful operation of GaN 31-stage ring oscillators at the highest base-plate temperature attainable by the test setup of 265/spl deg/C, indicates that these circuits can operate at significantly higher temperatures.     

Picosecond optical sampling of GaAs integrated circuits

Direct electrooptic sampling is a noncontact optical-probing technique for measuring with picosecond time resolution the voltage waveforms at internal nodes within GaAs integrated circuits. The factors contributing to system bandwidth, sensitivity, spatial resolution, and circuit perturbation are discussed, as are the circuit requirements for realistic testing of analog and digital devices. Measurements of high-speed GaAs integrated circuits are presented, including time-domain waveform and timing measurements of digital and analog circuits and frequency-domain transfer function measurements of microwave circuits and transmission structures     

An optimal algorithm for cycle breaking in directed graphs

This paper describes an exact algorithm for the identification of a minimal feedback vertex set in digital circuits. The proposed algorithm makes use of graph reduction and efficient graph partitioning methods based on local properties of digital circuits. It has been implemented and applied to ISCAS-89 benchmark circuits. Previously, non-optimum solutions were found. In other cases, the optimality of the solution could not be established for all circuits. By using the proposed algorithm we obtained the optimum results for all the circuits in a relatively short CPU time.Supported in part by the Technion fund for the promotion of research.     

Toward a systematic design methodology for large multigigahertzrapid single flux quantum circuits

Rapid single flux quantum (RSFQ) digital circuits have reached the level of medium- to large-scale of integration. At this level, existing design methodologies, developed specifically for RSFQ circuits, have become computationally inefficient. Applying mature semiconductor methodologies to the design of RSFQ circuits, one encounters substantial difficulties originating from the differences between both technologies. In this paper, a new design methodology aimed at large-scale RSFQ circuits is proposed. This methodology is based on a semiconductor semicustom design approach. An established design methodology for small-stale RSFQ digital circuits, based on circuit (junction-level) simulation and device parameter optimization, is used for the design of basic RSFQ cells. A library composed of about 20 basic RSFQ cells has been developed based on this approach. A novel design methodology for large-scale circuits, presented in this paper, is based on logic (gate-level) simulation and timing optimization. This methodology has been implemented around the Cadence integrated design environment and used successfully at the University of Rochester for the design of two large-scale digital circuits     

数模混合电路中的"地跳动"问题研究

本文针对数模混合电路中接地问题进行研究。从集成芯片的角度讨论了"地跳动"问题的根源,然后运用得到的结论对一般的数模混合电路进行分析,提出一套解决的方案,使数字噪声对模拟电路的干扰降到最低。     

Method for automated waveform analysis of transient responses in digital circuits

A simple but powerful computer-aided technique is presented for the waveform analysis of transient responses in digital circuits. The technique is targeted towards automatic simulation-based timing and signal integrity analysis and design of digital circuits and interconnects.<>