优化传输栅下电势分布改善四管像素的电荷转移效率

提出了一种通过优化传输栅下沿电荷转移路径的电势分布来提高电荷转移效率的方法。通过使用非均匀掺杂传输管沟道,形成了传输管沟道内部的电势分布梯度。通过对R1区与传输栅的交叠长度,R1区的掺杂剂量,防穿通注入（APT）与传输栅交叠长度的调整,减小了传输管沟道与箝位光电二极管（PPD）连接区域的电子势垒与电子势阱,增强了二者的电势连接。仿真结果显示,剩余电荷占总电荷的比例由1/104减小至1/107,转移时间由500 ns缩短为110 ns。这意味电荷转移效率得到了提高。     

超快电荷转移的大尺寸PPD像素器件设计

面向微光环境的高时间分辨成像需求,基于CMOS图像传感器工艺,设计并仿真验证了 一种具有三角形状梯度掺杂且浮置扩散区域中置的超快电荷转移大尺寸光电二极管(PPD)像素器件.它通过N埋层掺杂形状和梯度掺杂设计增强光生电荷传输路径的电势梯度,加速光生电荷从N埋层感光区域向电荷存储区域的转移.同时通过对传输管沟道的梯度掺杂,减小了沟道反弹电荷的水平,有效提升了光生电荷转移效率.仿真结果表明,三角形枝状的圆形像素器件在30 000个电荷的情况下,在电荷转移效率达到99.9％时,电荷转移时间为1 ns,同时其反弹电荷水平在1e-以下.该PPD像素器件可用于微光环境下的高时间分辨率成像.     

CMOS有源像素传感器特性分析与优化设计

设计了一个三管有源像素和其用开关电容放大器实现的双采样读出电路.该电路被嵌入一64×64像素阵列CMOS图像传感器,在Chartered公司0.35μm工艺线上成功流片.在8μm×8μm像素尺寸下实现了57%的填充因子.测得可见光响应灵敏度为0.8V/(lux·s),动态范围为50dB.理论分析和实验结果表明随着工艺尺寸缩小,像素尺寸减小会使光响应灵敏度降低.在深亚微米工艺条件下,较深的n阱/p衬底结光电二极管可以提供合理的填充因子和光响应灵敏度.     

一种梯度自适应宽动态CMOS图像传感器像素结构

提出了一种梯度自适应的宽动态CMOS图像传感器像素结构。该像素结构采用多路分流设计,改变了3T-APS图像传感器的单线性响应率;根据不同的光照强度自适应调整响应率,在低照度时具有较大的响应率,在高照度时具有较小的响应率,从而增大了像素的动态范围。该像素结构简单,无需额外复杂的控制电路即可实现对光照强度的自适应梯度响应。基于0.18 μm 1P4M SMIC工艺,采用SILVACO TCAD仿真软件进行电路设计和仿真。结果表明,该CMOS图像传感器像素结构电路的动态范围可达到112.36 dB。     

1／3寸8百万像素图像传感器

0V8810是一款1／3英寸8百万像素CMOS图像传感器,使用最新推出的1．4μmOmniBSI背面照度技术所研发的CameraChip产品。1／3英寸的OV8810体积小到足以纳入8．5mm×8．5mm×7mm的相机模组当中,并且可以用10fps的速度以最高的8百万像素解析度输出资料。     

CMOS有源像素图像传感器的噪声控制技术

分析了CMOS有源像素图像传感器(APS)的噪声种类及各自产生的原因,介绍了对于不同噪声的噪声控制技术.     

三星电子开发出高质量130万像素CMOS图像传感器芯片

三星电子日前宣布成功开发出高质量的CMOS图像传感器(CIS)芯片和照相机模组。该照相机模组有1／3英寸SXGA(130万像素)、1／5．8英寸VGA(33万像素)两种规格，都包含了CIS和ISP芯片，并将于今年十二月份实现量产。     

1400万像素CMOS传感器高速读出及信号采集的研究

面阵图像传感器的读出电路和信号采集电路是影响图像信号性能的关键部分之一.文章介绍了采用2路双通道AD及USB2.0实现了1400万像素高分辨率CMOS面阵传感器的大动态范围,低读出噪音的高速信号采集系统,并对系统的传输速度、分辨率、图像噪音、光强测量稳定性、近红外响应等进行了实验研究.     

多传感器同步图像采集系统的设计

提出了一种宽带宽、灵活的和可伸缩的多传感器同步图像采集系统的结构.设计了二进制树型拓扑结构传播统一的系统时钟和触发信号,采用CPLD提供传感器间的精确时序和同步.结构中的所有摄像机采用CMOS图像传感器采集图像.可以控制图像的尺寸、帧率以及摄像机之间的曝光顺序.为了适应不同应用对传输带宽和图像质量的不同要求,采用DSP加多种压缩算法对图像进行处理和压缩.来自所有摄像机的图像数据通过USB2.0总线采用同步传输模式传送到PC进行存储.给出了部分实现.     

一种6T像素全局曝光CMOS图像传感器

提出了一种基于6T像素结构的全局曝光CMOS图像传感器。通过采用PPD结构的6T像素、高复位电平和低阈值器件,提高了动态范围,并优化设计了像素单元的版图,使之获得较高的填充系数;模拟读出电路部分,通过采用双采样、增益放大和减小列级固定模式噪声(FPN)处理,以及对列选控制电路进行优化,减小了对全局PGA的运放设计要求。芯片的工作频率为20MHz,动态范围为66dB,实现了全局曝光方式CMOS图像传感器的设计。     

Design of CMOS active pixels based on finger-shaped PPD

To improve the full-well capacity and linear dynamic range of CMOS image sensor, a special finger-shaped pinned photodiode (PPD) is designed. In terms of process, the first N-type ion implantation of the PPD N buried layer is extended under the transfer gate, thereby increasing the PPD capacitance. Based on TCAD simulation, the width and spacing of PPD were precisely adjusted. A high full-well capacity pixel design with a pixel size of 6 × 6 μm² is realized based on the 0.18 μm CMOS process. The simulation results indicate that the pixel with the above structure and process has a depletion depth of 2.8 μm and a charge transfer efficiency of 100%. The measurement results of the test chip show that the full-well capacity can reach 68650e^–. Compared with the conventional structure, the proposed PPD structure can effectively improve the full well capacity of the pixel.     

一种用于优化小尺寸背照式CMOS图像传感器满阱容量与量子效率的新型光电二极管结构

为改善小尺寸背照式CMOS图像传感器像素单元满阱容量不足缺点,本文基于提高光电二极管电容的角度,提出了一种通过改变光电二极管结构来提升满阱容量的新方法。该结构优化由两步实现。第一步,通过在传统光电二极管N型区域下额外注入高能量、低剂量N型掺杂,形成一个浓度渐变,深度扩展的新光电二极管N型区。这种光电二极管的满阱容量将因侧壁结电容的扩展而显著提高;第二步,为了帮助扩展的阱容量实现全耗尽,一个由两步不同能量的P型杂质形成的P型插入区被嵌入到深度得以扩展的光电二极管N型区域内。这个纵向插入的P型插入区保证了该光电二极管结构可以在复位完成后实现电子的全耗尽。仿真结果显示,像素单元满阱容量可以由初始的1289e- 提升到6390e-,且该阱容量扩展技术不会以恶化图像拖尾为代价。除此之外,量子效率在全波段下均得以提升,尤其在520nm处提升6.3%。这项改进不仅可以用于背照式像素结构,而且可以被用于任何PD型正面照射式像素结构中。     

New Active Digital Pixel Circuit for CMOS Image Sensor

A new active digital pixel circuit for CMOS image sensor is designed consisting of four components: a photo-transducer, a preamplifier, a sample & hold (S & H) circuit and an A/D converter with an inverter. It is optimized by simulation and adjustment based on 2 μm standard CMOS process. Each circuit of the components is designed with specific parameters. The simulation results of the whole pixel circuits show that the circuit has such advantages as low distortion, low power consumption, and improvement of the output performances by using an inverter.     

基于多次N型离子注入对4T像素光吸收效率及电荷转移的优化

为了提高像素的光吸收效率,优化电荷的转移,提出了多次N型离子注入的方法形成PPD的N埋层。通过不同能量的N型离子注入拓展了N埋层的吸收深度从而提高了光的吸收效率;通过在N埋层形成横向的非均匀掺杂分布,减小了电荷转移的势垒,优化了电荷的转移。仿真结果表明,经过改进后长波长光的吸收效率可以提高约10％,电荷转移后残留的电子浓度大约可以减小两个数量级。     

Collection efficiency and charge transfer optimization for a 4-T pixel with multi n-type implants

In order to increase collection efficiency and eliminate image lag,multi n-type implants were introduced into the process of a pinned-photodiode.For the purpose of improving the collection efficiency, multi n-type implants with different implant energies were proposed,which expanded the vertical collection region. To reduce the image lag,a horizontal gradient doping concentration eliminating the potential barrier waalso formed by multi n-type implants.The simulation result shows that the collection efficiency can be improved by about 10%in the long wavelength range and the density of the residual charge is reduced from 2.59×10⁹ to 2.62×10⁷ cm^-3.     

A Triphenylamine Dye Model for the Study of Intramolecular Energy Transfer and Charge Transfer in Dye‐Sensitized Solar Cells

A novel dye ( 2TPA‐R ), containing two triphenylamine (TPA) units connected by a vinyl group and rhodanine‐3‐acetic acid as the electron acceptor, is designed and synthesized successfully to reveal the working principles of organic dye in dye‐sensitized solar cells (DSSCs). 2TPA and TPA‐R , which consist of two TPA units connected by vinyl and a TPA unit linked with rhodanine‐3‐acetic acid, respectively, are also synthesized as references to study the intramolecular energy transfer (E_nT) and charge transfer (ICT) processes of 2TPA‐R in CH₂Cl₂ solution and on a TiO₂ surface. The results suggest that the intramolecular E_nT and ICT processes show a positive effect on the performance of DSSCs. However, the flexible structure and less‐adsorbed amount of dye on TiO₂ may make it difficult to improve the efficiency of DSSCs. This study on intramolecular E_nT and ICT processes acts as a guide for the design and synthesis of efficient organic dyes in the future.     

CMOS图像传感器中电荷非完全转移的影响分析

A method to judge complete charger transfer is proposed for a four-transistor CMOS image sensor with a large pixel size.Based on the emission current theory,a qualitative photoresponse model is established to the preliminary prediction.Further analysis of noise for incomplete charge transfer predicts the noise variation.The test pixels were fabricated in a specialized 0.18μm CMOS image sensor process and two different processes of buried N layer implantation are compared.The trend prediction corresponds with the test results,especially as it can distinguish an unobvious incomplete charge transfer.The method helps us judge whether the charge transfer time satisfies the requirements of the readout circuit for the given process especially for pixels of a large size.     

Anodization for Simplified Processing and Efficient Charge Transport in Vertical Organic Field‐Effect Transistors

Vertical organic transistors are an attractive alternative to realize short channel transistors, which are required for powerful electronic devices and flexible electronic circuits operating at high frequencies. Unfortunately, the vertical device architecture comes along with an increased device fabrication complexity, limiting the potential of this technology for application. A new design of vertical organic field‐effect transistors (VOFETs) with superior electrical performance and simplified processing is reported. By using electrochemical oxidized aluminum oxide (AlO_x) as a pseudo self‐aligned charge‐blocking structure in vertical organic transistors, direct leakage current between the source and drain can be effectively suppressed, enabling VOFETs with very low off‐current levels despite the short channel length. The anodization technique is easy to apply and can be surprisingly used on both n‐type and p‐type organic semiconductor thin films with significant signs of degradation. Hence, the anodization technique enables a simplified process of high‐performance p‐type and n‐type VOFETs, paving the road toward complementary circuits made of vertical transistors.