Bit‐depth extension: Overcoming LCD‐driver limitations by using models of the equivalent input noise of the visual system

Abstract— Continuous tone, or “contone,” imagery usually has 24 bits/pixel as a minimum, with 8 bits each for the three primaries in typical displays. However, lower‐cost displays constrain this number because of various system limitations. Conversely, higher‐quality displays seek to achieve 9–10 bits/pixel/color, though there may be system bottlenecks limited to 8. The two main artifacts from reduced bit‐depth are contouring and loss of amplitude detail; these can be prevented by dithering the image prior to these bit‐depth losses. Our technique builds on Roberts's noise‐modulation idea and the subsequently influenced work in halftoning for hardcopy and dithering for displays. However, most halftoning/dithering work was primarily directed to displays at the lower end of bits/pixel (e.g., 1 bit as in halftoning) and higher ppi. We approach the problem from the higher end of bits/pixel/color, for example, 6–8, and lower spatial resolution (<100 ppi), which changes the game substantially from halftoning experience. Instead of spatial dither, it is better to use an amplitude dither. In addition, dynamic displays allow for the use of a temporal dithering component. This paper will report on techniques and observations made in achieving contone quality on ～100‐or‐less‐ppi LCDs starting from 4‐ to 8‐bit driver limits, and resulting with no visible dither patterns, noise, contours, or loss of amplitude detail at viewing distances as close as the near focus limit (～120 mm).     

A 510‐kb SOG‐DRAM for mobile displays with embedded frame memories

Abstract— A system‐on‐glass (SOG) dynamic random access memory (DRAM), which enables the implementation of frame‐memory‐integrated displays, has been developed. A dynamic one‐transistor‐one‐capacitor memory cell, which has a data retention time of over 16.6 msec, and a compression/decompression (CODEC) circuit were developed to reduce the layout area and power. The CODEC enables an 18‐bit/pixel color display, while reducing the memory capacity from 18 to 12 bits/pixel. A frame‐memory macro was created by combining the SOG‐DRAM with an embedded controller that enables independent access for writing and reading. Its operation was verified by chip measurement and demonstration as a frame‐memory operation of 262k‐color QCIF+ displays. The work reported in this paper was the first step to creating a Zero‐Chip Display with an integrated frame memory, and it proved the concept was feasible.     

Key design issues for autostereoscopic 2‐D/3‐D displays

Abstract— Flat‐panel 2‐D/3‐D autostereoscopic displays are now being commercialized in a variety of applications, each with its own particular requirements. The autostereoscopic display designer has two key considerations to address in order to meet customer needs — the optical output of the display (defined by the output window structure) and the choice of optical components. Window structure determines 3‐D image resolution, achievable lateral and longitudinal viewing freedom, crosstalk, and 3‐D fringe contrast. Optical‐component selection determines the quality of the imaging of such windows, viewing distances, device ruggedness, thickness, and brightness. Trade‐offs in window design are described, and a comparison of the leading optical component technologies is given. Selection of Polarisation Activated Microlenses? architectures for LCD and OLED applications are described. The technology delivers significant advantages particularly for minimising nominal viewing distances in high pixel density panels and optimizing device ruggedness while maintaining display brightness.     

Peripheral circuit designs using low‐temperature p‐type poly‐Si thin‐film transistors

Abstract— P‐type low‐temperature (450°C) polycrystalline‐silicon thin‐film‐transistor circuits for peripheral driver integration in active‐matrix displays are proposed and verified. A low‐voltage (5 V) driven poly‐Si scan driver is designed by employing a level shifter and shift register. A source driver for six‐bit digital interface is proposed, and the building blocks such as latch, DAC, and analog buffer are described. The latch samples and holds the digital bits (D and D') without an output voltage loss. A new source‐follower type analog buffer is developed and exhibits a small offset deviation regardless of the V_TH variation of the buffer TFT. The simulation and measurement results ensure that the proposed circuits were successfully designed for p‐type panel integration.     

A 12‐bit segmented resistor‐capacitor digital‐to‐analog converter for a display driver IC of a large TFT‐LCD panel system

Abstract— A 12‐bit segmented R‐C DAC to support a linear gamma curve has been proposed and fabricated in a 720‐channel LCD source driver with a 16‐V 1‐poly 3‐metal high‐voltage CMOS process. The proposed DAC has a global resistor string and sample‐and‐hold buffers. A MSB voltage selected by the upper 6 bits of input data and a LSB voltage selected by the lower 6 bits of input data are summed by using a sample‐and‐hold operation with offset cancellation in the proposed DAC. The measured DNL was less than 0.3 LSB, and the output voltage deviation was less than 3 mV in all gray levels. Although two sample‐and‐hold buffers were adopted to operate alternatively, the die size was as small as 24.9 mm², which was only an 8.3% increase compared to that of a conventional 8‐bit 720‐channel source driver. Because of its good performance with small area, the proposed DAC can be a good low‐cost solution for a 10‐bit TV system.     

Index compression using 64‐bit words

Modern computers typically make use of 64‐bit words as the fundamental unit of data access. However the decade‐long migration from 32‐bit architectures has not been reflected in compression technology, because of a widespread assumption that effective compression techniques operate in terms of bits or bytes, rather than words. Here we demonstrate that the use of 64‐bit access units, especially in connection with word‐bounded codes, does indeed provide the opportunity for improving the compression performance. In particular, we extend several 32‐bit word‐bounded coding schemes to 64‐bit operation and explore their uses in information retrieval applications. Our results show that the Simple‐8b approach, a 64‐bit word‐bounded code, is an excellent self‐skipping code, and has a clear advantage over its competitors in supporting fast query evaluation when the data being compressed represents the inverted index for a large text collection. The advantages of the new code also accrue on 32‐bit architectures, and for all of Boolean, ranked, and phrase queries; which means that it can be used in any situation. Copyright © 2010 John Wiley & Sons, Ltd.     

Invited Paper: Depth reproducibility of multiview depth‐fused 3‐D display

Abstract— A multi‐view depth‐fused 3‐D (DFD) display that provides smooth motion parallax for wide viewing angles is proposed. A conventional DFD display consists of a stack of two transparent emitting screens. It can produce motion parallax for small changes in observation angle, but its viewing zone is rather narrow due to the split images it provides in inclined views. On the other hand, even though multi‐view 3‐D displays have a wide viewing angle, motion parallax in them is discrete, depending on the number of views they show. By applying a stacked structure to multi‐view 3‐D displays, a wide‐viewing‐angle 3‐D display with smooth motion parallax was fabricated. Experimental results confirmed the viewing‐zone connection of DFD displays while the calculated results show the feasibility of stacked multi‐view displays.     

Multi‐view 3‐D display employing a flat‐panel display with slanted pixel arrangement

Abstract— A flat‐panel display with a slanted subpixel arrangement has been developed for a multi‐view three‐dimensional (3‐D) display. A set of 3M × N subpixels (M × N subpixels for each R, G, and B color) corresponds to one of the cylindrical lenses, which constitutes a lenticular lens, to construct each 3‐D pixel of a multi‐view display that offers M × N views. Subpixels of the same color in each 3‐D pixel have different horizontal positions, and the R, G, and B subpixels are repeated in the horizontal direction. In addition, the ray‐emitting areas of the subpixels within a 3‐D pixel are continuous in the horizontal direction for each color. One of the vertical edges of each subpixel has the same horizontal position as the opposite vertical edge of another subpixel of the same color. Cross‐talk among viewing zones is theoretically zero. This structure is suitable for providing a large number of views. A liquid‐crystal panel having this slanted subpixel arrangement was fabricated to construct a mobile 3‐D display with 16 views and a 3‐D resolution of 256 × 192. A 3‐D pixel is comprised of 12 × 4 subpixels (M = 4 and N = 4). The screen size was 2.57 in.     

A 4‐bit ultra‐wideband complementary metal‐oxide‐semiconductor attenuator with low root‐mean‐square amplitude error

This article presents the 4‐bit ultra‐wideband complementary metal‐oxide‐semiconductor (CMOS) attenuator in a standard 0.18‐μm CMOS process. This design adopts switched bridge‐T type topologies for each attenuation bit. Based on insertion losses and input P_1‐dB considerations, the circuit performances can be optimized by the proper bit ordering arrangement. Therefore, the bit ordering 0.5‐4‐2‐1 dB is employed in the 4‐bit attenuator. Moreover, series inductors are added between each bit to further improve the input and output return losses. Measured results demonstrate that the attenuation range of the circuit is 7.5 dB with 0.5 dB step and the root‐mean‐square (RMS) amplitude error is between 0.11 and 0.13 dB from 3.1 to 10.8 GHz. The differences between simulated and measured RMS amplitude errors are less than 0.2 dB, which demonstrates the good agreement and feasibility of the design concept. The measured input P_1‐dB is 15 dBm at 5 GHz and the chip area is 1.12 mm² including all testing pads.     

64‐bit versus 32‐bit Virtual Machines for Java

The Java language is popular because of its platform independence, making it useful in a lot of technologies ranging from embedded devices to high‐performance systems. The platform‐independent property of Java, which is visible at the Java bytecode level, is only made possible thanks to the availability of a Virtual Machine (VM), which needs to be designed specifically for each underlying hardware platform. More specifically, the same Java bytecode should run properly on a 32‐bit or a 64‐bit VM. In this paper, we compare the behavioral characteristics of 32‐bit and 64‐bit VMs using a large set of Java benchmarks. This is done using the Jikes Research VM as well as the IBM JDK 1.4.0 production VM on a PowerPC‐based IBM machine. By running the PowerPC machine in both 32‐bit and 64‐bit mode we are able to compare 32‐bit and 64‐bit VMs. We conclude that the space an object takes in the heap in 64‐bit mode is 39.3% larger on average than in 32‐bit mode. We identify three reasons for this: (i) the larger pointer size, (ii) the increased header and (iii) the increased alignment. The minimally required heap size is 51.1% larger on average in 64‐bit than in 32‐bit mode. From our experimental setup using hardware performance monitors, we observe that 64‐bit computing typically results in a significantly larger number of data cache misses at all levels of the memory hierarchy. In addition, we observe that when a sufficiently large heap is available, the IBM JDK 1.4.0 VM is 1.7% slower on average in 64‐bit mode than in 32‐bit mode. Copyright © 2005 John Wiley & Sons, Ltd.     

A novel driving method for field sequential color using an OCB TFT‐LCD

We report a new technique for the design of field‐sequential‐color liquid‐crystal displays (FS‐LCDs), which maximizes the liquid‐crystal response,t_LC, by dividing the display area into as few sub‐areas,N, as possible. We obtained the following results: (1) ^tLC increased as N increased, although saturation tended to occur. Increasing N from 1 to 2 gave the largest increase in ^tLC. (2) ^tLC was maximized by dividing the display area unequally.     

Moiré‐reduction methods for integral videography autostereoscopic display with color‐filter LCD

Abstract— Moiré‐reduction methods for integral videography displays are proposed. Integral videography is based on the principles of integral photography and extended real‐time video processing. There are two moiré‐reduction methods that can be used for integral videography displays that have a lens array and a liquid‐crystal display. The first is color moiré, and the second is intensity moiré. To reduce color moiré, an optimized color‐filter layout in the liquid‐crystal display was used. To reduce intensity moiré, a defocusing method was used. Adesign of a viewing area for the integral videography display is also presented. To control the viewing area, the lens pitch and the shape of the integral videography elemental image was changed. A 5‐in. integral videography display was implemented by using the proposed methods, and an integral videography display was evaluated.     

A photographic technique for assessing the viewing‐angle performance of liquid‐crystal displays

Abstract— Liquid‐crystal displays (LCDs) have notable variation in luminance and perceived contrast as a function of the angle from which they are viewed. Though this is an important performance issue for LCDs, most evaluation techniques for assessing this variation have been limited to laboratory settings. This study demonstrates the use of a photographic technique for such an evaluation. The technique is based on an actively cooled charge‐coupled‐device (CCD) detector in combination with a macro lens covering a circular angular range (θ) of ±42.5°. The camera was used to evaluate the luminance and perceived contrast properties of an LCD. Uniform field images corresponding to 17 equally spaced gray‐scale values in the digital driving level (DDL) range of the display system were acquired. The 12‐bit gray‐scale digital images produced by the camera were converted to luminance units (cd/m²) via the measured luminance vs. DDL response function of the camera. The changes in perceived contrast as a function of viewing angle were derived from the Barten model of the gray‐scale response of the human‐visual system using the methods proposed by the AAPM TG18 Report. The results of this photographic technique were compared to measurements acquired from a similar display using a Fourier‐optics‐based luminance meter. The results of the two methods generally agreed to within 5%. The photographic methods used were found to be accurate and robust for in‐field assessment of the angular response of LCDs over the FOV of the camera.     

A common approach to characterizing autostereoscopic and polarization‐based 3‐D displays

Abstract— Autostereoscopic and polarization‐based stereoscopic 3‐D displays recreate 3‐D images by providing different images in the two eyes of an observer. This aim is achieved differently for these two families of 3‐D displays. It is shown that viewing‐angle measurements can be applied to characterize both types of displays. Viewing‐angle luminance measurements are made at different locations on the display surface for each view emitted by the display. For autostereoscopic displays, a Fourier‐optics instrument with an ultra‐high‐angular‐resolution VCMaster3D is used. For polarization‐based displays, a standard Fourier‐optics instrument with additional glass filters is used. Then, what will be seen by an observer in front of the display is computed. Monocular and binocular quality criteria (left‐ and right‐eye contrast, 3‐D contrast) was used to quantify the ability to perceive depth for any observer position. Qualified monocular and binocular viewing spaces (QMVS and QBVS) are deduced. Precise 3‐D characteristics are derived such as maximum 3‐D contrast, optical viewing freedom in each direction, color shifts, and standard contrast. A quantitative comparison between displays of all types becomes possible.     

Prototyping and optical evaluation of 9‐in. OCB time‐division‐multiplexing 18‐view 3‐D display

Abstract— An integral imaging time‐division‐multiplexing 18‐view 3‐D display based on the one‐dimensional integral‐imaging (1‐D‐II) technique using a 9‐in. OCB‐LCD, lenticular sheet, and active shutter has been developed. By simulating a lens shape and a shutter structure and analyzing the light‐beam profile of the increasing‐parallax‐number region to find the best conditions, depth range, and viewing angle were an enhanced and a brighter and flicker‐less 3‐D image with smooth motion parallax was obtained.     

3‐D mobile display based on dual‐directional light guides with a fast‐switching liquid‐crystal panel

Abstract— An autostereoscopic display based on dual‐directional light guides with a fast‐switching liquid‐crystal panel was designed and fabricated to provide better 3‐D perception with image qualities comparable to that of 2‐D displays. With two identical micro‐grooved light guides, each with a light‐controlled ability in one direction, two restricted viewing cones are formed to project pairs of parallax images to the viewer's respective eyes sequentially. Crosstalk of less than 10% located within ±8°–±30° and an LC response time of 7.1 msec for a 1.8‐in. LCD panel can yield acceptable 3‐D perceptions at viewing distance of 5.6–23 cm. Moreover, 2‐D/3‐D compatibility is provided in this module.     

Improvement of off‐axis color shift on hybrid viewing‐angle device using dual γ‐voltage method

We have mass production on one kind of liquid crystal display (LCD) device with hybrid viewing‐angle (HVA), which can be switched between the wide viewing‐angle (WVA) and narrow viewing‐angle (NVA) by one button. This device adopts the single cell design that with lower cost, and utilizes the optical properties of electrically tilted LC to achieve the function of NVA display. An issue has received less attention in the past and been indeed found in the production process. It is that the off‐axis color shift will appear in NVA mode. We put forward one method to improve this issue here, which is combined with the concepts of Gray Frame Insertion (GFI) and Impulse‐type driving. By switching the voltage between two different γ values, the color shift will be perfected on the produce.     

Development of a 42‐in. 2‐D/3‐D switchable display using multi‐view technology for public‐information‐display applications

Abstract— A 42‐in. 2‐D/3‐D switchable display operating in a parallax‐barrier‐type system consisting of liquid‐crystal displays (LCDs) has been developed. The system displays 2‐D images in full resolution, without any degradation to the original 2‐D images, and 3‐D autostereoscopic images with resolutions higher than SVGA with wide viewing zones electrically controlled by the parallax‐barrier system. The system is intended for use in public‐information displays (PIDs), a booming field, and as displays for gaming, medical, and simulation applications.     

Development of an 8‐bit VGA LCOS microdisplay with FSC modes using a low‐cost process

Abstract— A VGA‐resolution LCOS microdisplay operated in the field‐sequential color (FSC) mode was fabricated using a low‐cost process. An 8‐bit digital data driver with digital‐to‐analog converters, which can realize a 256‐level gray scale and gamma compensation, has been integrated into a color microdisplay. A top‐to‐bottom approach to the design of an FSC LCOS microdisplay is described. The design of the silicon‐backplane circuits is outlined in detail. Finally, a prototype of this display and its imaging performance are discussed.     

Projection‐type integral 3‐D display with distortion compensation

Abstract— Our research is aimed at developing a spatial‐imaging‐type integral three‐dimensional (3‐D) display based on an integral photography method using an extremely high‐resolution projector. One problem with the projection‐type integral 3‐D display is that geometrical distortion in projected elemental images causes spatial deformation of the displayed 3‐D image. In this study, a general relationship between the geometric distortion of elemental images and the spatial deformation of reconstructed 3‐D images were analyzed. A projection‐type integral 3‐D display with a distortion compensator which corrects the geometrical distortions of projected images in real‐time have been developed. The deformation of the displayed 3‐D images was significantly reduced by the distortion compensation, and the displayed 3‐D images had a resolution of 182 (H) × 140 (V) pixels and a viewing angle of 24.5°.