Recent developments in large‐area photomasks for display applications

One of the most critical areas in the manufacturing process for FPD panels or shadow masks for CRTs is lithography. Most existing lithography technologies require high‐quality large‐area photomasks. The requirements on these photomasks include positioning accuracy (registration) and repeatability (overlay), systematic image quality errors (“mura” or display quality), and resolution (minimum feature size). The general trend toward higher resolution and improved performance, e.g., for TFT desktop monitors, has put a strong focus on the specifications for large‐area‐display photomasks. This article intends to give an overview of the dominant issues for large‐area‐display photomasks, and illustrates differences compared with other applications. The article will also present state‐of‐the‐art methods and trends. In particular, the aspects of positioning accuracy over large areas and systematic image‐quality errors will be described. New qualitative and objective methods have been developed as means to capture systematic image‐quality errors. Results indicating that errors below 25 nm can be found early in the manufacturing process is presented, thus allowing inspection for visual effects before the actual display is completed. Positioning accuracy below 400 nm (3 sigma) over 720 × 560 mm have been achieved. These results will in the future be extended up toward 1 × 1 m for generation 4 in TFT‐LCD production.     

Single‐source dual‐layer amorphous IGZO thin‐film transistors for display and circuit applications

In this study, the authors report on high‐quality amorphous indium–gallium–zinc oxide thin‐film transistors (TFTs) based on a single‐source dual‐layer concept processed at temperatures down to 150°C. The dual‐layer concept allows the precise control of local charge carrier densities by varying the O₂/Ar gas ratio during sputtering for the bottom and top layers. Therefore, extensive annealing steps after the deposition can be avoided. In addition, the dual‐layer concept is more robust against variation of the oxygen flow in the deposition chamber. The charge carrier density in the TFT channel is namely adjusted by varying the thickness of the two layers whereby the oxygen concentration during deposition is switched only between no oxygen for the bottom layer and very high concentration for the top layer. The dual‐layer TFTs are more stable under bias conditions in comparison with single‐layer TFTs processed at low temperatures. Finally, the applicability of this dual‐layer concept in logic circuitry such as 19‐stage ring oscillators and a TFT backplane on polyethylene naphthalate foil containing a quarter video graphics array active‐matrix organic light‐emitting diode display demonstrator is proven.     

Development of 100‐in. TFT‐LCDs for HDTV and public‐information‐display applications

Abstract— LCDs have achieved a full‐high‐definition resolution of 1920 × 1080 (16:9), 600‐nit brightness, 3000:1 dynamic contrast ratio, 92% color gamut, 178° viewing angle, and 5‐msec response time at all gray levels and are targeted for HDTV and public‐information‐display applications. Some unique technologies, such as Cu bus line, advanced wide view polarizer, and wide‐color‐gamut lamp, were applied. A new stitching‐free technology was developed to overcome the size limitation of the photomask in both the TFT and color‐filter processes. The size of the panel (100 in.), based on the wide format (16:9), is determined by the maximum efficiency of the world's first seventh‐generation line (glass size, 1950 × 2250 mm) in LG.Philips LCD's (LPL) Paju display cluster. The issues facing 100‐in. TFT‐LCDs will be discussed.     

Development of a 42‐in. 2‐D/3‐D switchable display using multi‐view technology for public‐information‐display applications

Abstract— A 42‐in. 2‐D/3‐D switchable display operating in a parallax‐barrier‐type system consisting of liquid‐crystal displays (LCDs) has been developed. The system displays 2‐D images in full resolution, without any degradation to the original 2‐D images, and 3‐D autostereoscopic images with resolutions higher than SVGA with wide viewing zones electrically controlled by the parallax‐barrier system. The system is intended for use in public‐information displays (PIDs), a booming field, and as displays for gaming, medical, and simulation applications.     

Oil thermal annealed nano‐structured indium tin oxide thin films for display applications

Indium tin oxide‐coated thin films (200 nm) are deposited on glass substrates by using R.f. sputtering technique. Here, we investigate the influence of new technique of treatment, which is called as “oil thermal annealing” on the nano‐structured indium tin oxide thin films at fixed temperature (150 °C) which improves adhesion strength, electrical conductivity and optical properties (transmittance) of the films. Oil thermal annealing is used to reduce inherent defects that may be introduced during the prepared thin film and cooling processes. Proposed technique is highly suitable for liquid crystal displays, solar cells and organic light emitting diodes, and many other display‐related applications.     

Reliability assessment based on hazard rate model for an embedded OSS porting‐phase

Embedded Open Source Software (OSS) systems have been gaining a lot of attention in the embedded system area. The successful experience of embedded OSSs include Android, BusyBox, TRON, etc. Also, OSS market will be expanded not only to mobile phone OSS areas but also to other embedded OSS areas in the future. However, the poor handling of quality problem and customer support prohibit the progress of embedded OSS. Also, it is difficult for developers to assess the reliability and portability of embedded OSS on a single‐board computer. A method of software reliability assessment based on flexible hazard rate modeling for the embedded OSS is proposed in this paper. Also, several numerical examples are shown by using actual data. Moreover, this paper compares the proposed model with the conventional hazard rate models by using the comparison criteria of goodness‐of‐fit. Copyright © 2011 John Wiley & Sons, Ltd.     

White stacked OLED with 38 lm/W and 100,000‐hour lifetime at 1000 cd/m2 for display and lighting applications

Abstract— The three critical parameters in determining the commercial success of organic light‐emitting diodes (OLEDs), both in display and lighting applications, are power efficiency, lifetime, and price competitiveness. PIN technology is widely considered as the preferred way to maximize power efficiency and lifetime. Here, a high‐efficiency and long‐lifetime white‐light‐emitting diode, which has been realized by stacking a blue‐fluorescent emission unit together with green‐ and red‐phosphorescent emission units, is reported. Proprietary materials have been used in transport layers of each emission unit, which significantly improves the power efficiency and stability. The power efficiency at 1000 cd/m² is 38 lm/W with CIE color coordinates of (0.43, 0.44) and a color‐rendering index (CRI) of 90. An extrapolated lifetime at an initial luminance of 1000 cd/m² is above 100,000 hours, which fulfils the specifications for most applications. The emission color can also be easily tuned towards the equal‐energy white for display applications by selecting emitting materials and varying the transport‐layer cavities.