Peripheral circuit designs using low‐temperature p‐type poly‐Si thin‐film transistors

Abstract— P‐type low‐temperature (450°C) polycrystalline‐silicon thin‐film‐transistor circuits for peripheral driver integration in active‐matrix displays are proposed and verified. A low‐voltage (5 V) driven poly‐Si scan driver is designed by employing a level shifter and shift register. A source driver for six‐bit digital interface is proposed, and the building blocks such as latch, DAC, and analog buffer are described. The latch samples and holds the digital bits (D and D') without an output voltage loss. A new source‐follower type analog buffer is developed and exhibits a small offset deviation regardless of the V_TH variation of the buffer TFT. The simulation and measurement results ensure that the proposed circuits were successfully designed for p‐type panel integration.     

Ultra‐low‐power LTPS TFT‐LCD technology using a multi‐bit pixel memory circuit

Abstract— Two types of low‐temperature poly‐Si TFT LCDs, which integrate a multi‐bit memory circuit and a liquid‐crystal driver within a pixel, have been developed using two different TFT process technologies. Both a 1.3‐in. 116‐ppi LCD having a 2‐bit pixel memory and a 1.5‐in. 130‐ppi LCD having a 5‐bit pixel memory consume very little power, less than 100 μW, which indicates that this technology is promising for mobile displays.     

A 550‐PPI LCD using 1.5 µm channel width LTPS TFTs with low frame rate driving

A 550 PPI low‐temperature polycrystalline silicon thin‐film transistor liquid‐crystal display has been developed. Shrinkage of the channel width of pixel thin‐film transistor together with thinner insulator for the storage capacitor allows high display quality in terms of vertical cross‐talk and flicker. Thirty hertz frame rate driving is implemented to offer low power while keeping high display quality.     

Latest developments for “system‐on‐glass” displays using low‐temperature poly‐Si TFTs

Abstract— A 2.3‐in.‐diagonal QVGA‐formatted “System‐On‐Glass” display has been developed by using low‐temperature poly‐Si TFT‐LCD technology. This display fully integrates 6‐bit RGB digital interface drivers as well as all the power supply circuitry to drive the LCD, which requires neither external driver ICs nor power‐supply ICs. This paper discusses the newly developed TFT circuit technologies used in this LCD. The development trend of the “System‐On‐Glass” display is also reviewed.     

Shoot‐through current reduction scheme for low power LTPS TFT programmable shift register

This paper proposes a programmable pulse width shift register where an output pulse width is adjusted only by changing a start pulse width without any additional signals and reconfiguration for the pre‐charging scheme of high resolution and high frame rate active‐matrix flat‐panel displays. In addition, the overall power consumption of a proposed circuitry is dramatically reduced by alleviating the shoot‐through current of an interval inverter, compared with the previous shift registers with the programmable or fixed output pulse width. The proposed shift register is verified by the simulation program with integrated circuit emphasis (SPICE) simulation at low temperature poly‐Si thin film transistor process for 50 stages. The proposed shift register lessens the power consumption by 34% and 54% for the output pulse widths of two and 10 line times, respectively, compared with those of the previous shift register structures.     

High refresh rate and low power consumption AMOLED panel using top‐gate n‐oxide and p‐LTPS TFTs

A pixel circuit and a gate driver on array for light‐emitting display are presented. By simultaneously utilizing top‐gate n‐type oxide and p‐type low‐temperature polycrystalline silicon (LTPS) thin‐film transistors (TFTs), the circuits provide high refresh rate and low power consumption. An active‐matrix LED (AMOLED) panel with proposed circuits is fabricated, and driving at various refresh rate ranging from 1 to 120 Hz could be achieved.     

Development of a 14.1‐in. UXGA TFT‐LCD using LTPS technology

A 14.1‐in. UXGA low‐temperature poly‐Si TFT‐LCD has been developed using p‐MOS technology. Both the peripheral driving circuits and the pixel switches are implemented using only p‐channel TFTs. The device performance for the driving circuits and the panel design issues, such as crosstalk and flicker, were investigated. The image quality required for the notebook‐PC display has been achieved by optimizing the panel design and by improving the device performance. In addition, the redundant gate driving structure has been developed to minimize the degradation of the panel yield.     

An LTPS active‐matrix process with PECVD doped N+ drain/source areas

Abstract— A low‐temperature polysilicon active‐matrix process without the need for ion implantation to dope drain and source areas of TFTs has been developed. A doped silicon layer is deposited by PECVD and structured prior to the deposition of the intrinsic silicon for the channel. The dopant is diffused and activated during the excimer‐laser crystallization step. N‐channel test TFTs with different geometries were realized. The TFT properties (mobility, on/off ratio, saturation, etc.) are suitable to realize AMLCDs and AMOLED displays and to integrate driver electronics on the displays. In addition to simple TFTs, a full‐color 4‐in. quarter‐VGA AMLCD was realized. The complete display (including photolithographic masks, active‐matrix backplane, and color‐filter/black‐matrix frontplane), and an addressing system were developed and manufactured at the Chair of Display Technology, University of Stuttgart, Germany. The substitution of ion doping by PECVD deposition overcomes a major limitation for panel sizes in poly‐Si technology and avoids large investment costs for ion‐implantation equipment.     

New applications for LTPS array technology including lab‐on‐chip and MEMS actuators

Abstract— The use of low‐temperature poly‐Si technology for new applications beyond displays is presented. These applications include lab‐on‐chip, MEMS actuators, and sensors. As a key example, the use of high‐voltage poly‐Si TFTs for rapid heating and temperature control, as is required for DNA amplification within lab‐on‐chip, is described in detail. Other examples given include MEMS ink‐jet printer heads and the formation of photosensors and impedance sensors for optical and electronic input, which can be used not only in displays and lab‐on‐chip, but also for new applications such as fingerprint sensing and particle counting.     

Low‐power‐consumption TFT‐LCD with dynamic memory embedded in the pixels

A low‐power‐consumption thin‐film‐transistor liquid‐crystal display (TFT‐LCD) with dynamic memory cells embedded in each pixel using low‐temperature poly‐Si technology has been developed. By holding data in the memory, the operating rate of the data driver can be dramatically reduced to 4 Hz. Eight levels of gray scale with low power consumption can be achieved by using the area‐ratio gray‐scale method. This TFT‐LCD can be used for displaying fine still images, with low power consumption.     

Digital‐to‐analog converter with gamma correction on glass substrate for TFT‐panel applications

Abstract— Low‐temperature polysilicon (LTPS) technology has a tendency towards integrating all circuits on glass substrate. However, the poly‐Si TFTs suffered poor uniformity with large variations in the device characteristics due to a narrow laser process window for producing large‐grained poly‐Si TFTs. The device variation is a serious problem for circuit realization on the LCD panel, so how to design reliable on‐panel circuits is a challenge for system‐on‐panel (SOP) applications. In this work, a 6‐bit R‐string digital‐to‐analog converter (DAC) with gamma correction on glass substrate for TFT‐panel applications is proposed. The proposed circuit, which is composed of a folded R‐string circuit, a segmented digital decoder, and reordering of the decoding circuit, has been designed and fabricated in a 3‐μm LTPS technology. The area of the new proposed DAC circuit is effectively reduced to about one‐sixth compared to that of the conventional circuit for the same LTPS process.     

Ultra‐low‐power polysilicon AMLCD with full integration

Abstract— An LTPS TFT‐LCD that only consumes 0.07 mW of power was developed. It is the world's first LCD equipped with all the circuits needed to display still images continuously for up to 1 year on a button battery. At the same time, the panel is capable of displaying 260,000‐color moving pictures.     

Active‐matrix organic light‐emitting diode using inverse‐staggered poly‐Si TFTs with a center‐offset gated structure

Abstract— A low‐cost active‐matrix backplane using non‐laser polycrystalline silicon (poly‐Si) having inverse‐staggered TFTs with amorphous‐silicon (a‐Si) n⁺ contacts has been developed. The thin‐film transistors (TFTs) have a center‐offset gated structure to reduce the leakage current without scarifying the ON‐currents. The leakage current of the center‐offset TFTs at Vg = ?10 V is two orders of magnitude lower than those of the non‐offset TFTs. The center‐offset length of the TFTs was 3 μm for both the switching and driving TFTs. A 2.2‐in. QQVGA (1 60 × 1 20) active‐matrix organic light‐emitting‐diode (AMOLED) display was demonstrated using conventional 2T + 1C pixel circuits.     

Low‐temperature poly‐Si TFT data drivers for an SVGA a‐Si TFT‐LCD panel

Low‐temperature poly‐Si TFT data drivers for an SVGA a‐Si TFT‐LCD panel have been developed. The data drivers include shift registers, sample‐and‐hold circuits, and operational amplifiers, and drive LCD panels using a line‐at‐a‐time addressing method. To reduce the power consumption of the shift register, a dot‐clock control circuit has been developed. Using this circuit, the power consumption of the shift register has been reduced to 36% of that of conventional circuits. To cancel the offset voltage generated by the operational amplifier, an offset cancellation circuit for low‐temperature poly‐Si TFTs has been developed. This circuit is also able to avoid any unstable operation of the operational amplifier. Using this circuit, the offset voltage has been reduced to one‐third of the value without using the offset cancellation circuit. These data drivers have been connected to an LCD panel and have realized an SVGA display on a 12.1‐in. a‐Si TFT‐LCD panel.     

Design and implementation of readout circuit on glass substrate with digital correction for touch‐panel applications

Abstract— A readout circuit on glass substrate with digital correction, which contains a transconductance amplifier, counter, and digital correction circuit, has been designed for touch‐panel applications for 3‐μm low‐temperature polysilicon (LTPS) technology. The voltage difference as a result of a change in capacitance due to a touch event is converted to current by a transconductance amplifier. By charging and discharging the capacitor in the counter, the counter displays different digital‐output codes according to touch or non‐touch events. Furthermore, not only can the touch or non‐touch event be distinguished, but also the influence of LTPS process variation can be compensated by a digital correction circuit in the proposed readout circuit.     

Reflective full‐color LCD using low‐temperature polysilicon TFTs in low‐frequency driving: Analysis of image persistence and flicker with scientific CMOS camera

Image persistence and flicker are major issues for low‐frequency driving of LCDs. Detailed investigation of the mechanisms that produce these phenomena, using image analysis with a scientific CMOS camera, enabled us to reduce it to acceptable levels. We successfully developed a 7.0‐in. WUXGA (1200 × RGBW × 1920) reflective color LCD driven by low‐temperature polysilicon TFTs at 1 Hz.     

PVT‐compensated low‐voltage and low‐power CMOS LNA for IoT applications

In this paper, a low‐noise amplifier (LNA) with process, voltage, and temperature (PVT) compensation for low power dissipation applications is designed. When supply voltage and LNA bias are close to the subthreshold, voltage has significant impact on power reduction. At this voltage level, the gain is reduced and various circuit parameters become highly sensitive to PVT variations. In the proposed LNA circuit, in order to enhance efficiency at low supply voltage, the cascade technique with g_m boosting is used. To improve circuit performance when in the subthreshold area, the forward body bias technique is used. Also, a new PVT compensator is suggested to reduce sensitivity of different circuit's parameters to PVT changes. The suggested PVT compensator employs a current reference circuit with constant output regarding temperature and voltage variations. This circuit produces a constant current by subtracting two proportional to absolute temperature currents. At a supply voltage of 0.35 V, the total power consumption is 585 μW. In different process corners, in the proposed LNA with PVT compensator, gain and noise figure (NF) variations are reduced 10.3 and 4.6 times, respectively, compared to a conventional LNA with constant bias. With a 20% deviation in the supply voltage, the gain and noise NF variations decrease 6.5 and 34 times, respectively.     

A 510‐kb SOG‐DRAM for mobile displays with embedded frame memories

Abstract— A system‐on‐glass (SOG) dynamic random access memory (DRAM), which enables the implementation of frame‐memory‐integrated displays, has been developed. A dynamic one‐transistor‐one‐capacitor memory cell, which has a data retention time of over 16.6 msec, and a compression/decompression (CODEC) circuit were developed to reduce the layout area and power. The CODEC enables an 18‐bit/pixel color display, while reducing the memory capacity from 18 to 12 bits/pixel. A frame‐memory macro was created by combining the SOG‐DRAM with an embedded controller that enables independent access for writing and reading. Its operation was verified by chip measurement and demonstration as a frame‐memory operation of 262k‐color QCIF+ displays. The work reported in this paper was the first step to creating a Zero‐Chip Display with an integrated frame memory, and it proved the concept was feasible.     

Novel write‐erasable input display with memory circuits and photosensors

We have developed a new conceptual liquid crystal display (LCD) with a memory circuit and a photosensor in each pixel to realize excellent handwriting performance. Direct writing and erasing a character in the LCD are available because their direct processing only in the pixel are performed without calculating coordinates by using a light pen and integrated pixel circuits. In addition, this LCD enables to display still image data stored in the pixel memory circuit at a low liquid crystal (LC) driving frequency of 1.0 Hz. In the result, we have achieved faster handwriting response time of 0.5 ms and lower power consumption of 0.7 mW in 7.0‐in. QVGA reflective LCD panel.     

A small‐area and low‐power data driver IC using two‐stage DAC with a capacitor array for active matrix flat‐panel displays

A small‐area and low‐power data driver integrated circuit (IC) using a two‐stage digital‐to‐analog converter (DAC) with a capacitor array is proposed for active matrix flat‐panel displays. The proposed data driver IC employs a capacitor array in the two‐stage DAC so as to reduce the DAC area and eliminate the need for a resistor string, which has high‐power consumption. To verify the proposed two‐stage DAC, a 20‐channel data driver IC with the proposed 10‐bit two‐stage DAC was fabricated using a 0.18‐μm complementary metal–oxide–semiconductor process with 1.8 and 6 V complementary metal–oxide–semiconductor devices. The proposed 10‐bit two‐stage DAC occupies only 43.8% of the area of a conventional 10‐bit two‐stage DAC. The measurement results show that the differential nonlinearity and integral nonlinearity are +0.58/?0.52 least significant bit and +0.62/?0.59 least significant bit, respectively. The measured interchannel deviation of the voltage outputs is 8.8 mV, and the measured power consumption of the 20‐channel data driver IC is reduced to 7.1 mW, which is less than half of the power consumed by the conventional one.