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Yasmin Afsar Jenny Tang Warren Rieutort‐Louis Liechao Huang Yingzhe Hu Josue Sanz‐Robinson Naveen Verma Sigurd Wagner James C. Sturm 《Journal of the Society for Information Display》2016,24(6):371-380
Thin‐film circuits on plastic capable of high‐frequency signal generation have important applications in large‐area, flexible hybrid systems, enabling efficient wireless transmission of power and information. We explore oscillator circuits using zinc‐oxide thin‐film transistors (ZnO TFTs) deposited by the conformal, layer‐by‐layer growth technique of plasma‐enhanced atomic layer deposition. TFTs on three substrates—glass, 50‐µm‐thick freestanding polyimide, and 3.5‐µm‐thick spin‐cast polyimide—are evaluated to identify the best candidate for high‐frequency flexible oscillators. We find that TFTs on ultrathin plastic can endure bending to smaller radii than TFTs on commercial 50‐µm‐thick freestanding polyimide, and their superior dimensional stability furthermore allows for smaller gate resistances and device capacitances. Oscillators on ultrathin plastic with minimized parasitics achieve oscillation frequencies as high as 17 MHz, well above the cutoff frequency fT. Lastly, we observe a bending radius dependence of oscillation frequency for flexible TFT oscillators and examine how mitigating device parasitics benefits the oscillator frequency versus power consumption tradeoff. 相似文献
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Simple pixel circuits for high resolution and high image quality organic light emitting diode‐on‐silicon microdisplays with wide data voltage range
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Sang‐Woon Hong Bong‐Choon Kwak Jun‐Seok Na Seong‐Kwan Hong Oh‐Kyong Kwon 《Journal of the Society for Information Display》2016,24(2):110-116
Two simple pixel circuits are proposed for high resolution and high image quality organic light‐emitting diode‐on‐silicon microdisplays. The proposed pixel circuits achieve high resolution due to simple pixel structure comprising three n‐type MOSFETs and one storage capacitor, which are integrated into a unit subpixel area of 3 × 9 µm2 using a 90 nm CMOS process. The proposed pixel circuits improve image quality by compensating for the threshold voltage variation of the driving transistors and extending the data voltage range. To verify the performance of the proposed pixel circuits, the emission currents of 24 pixel circuits are measured. The measured emission current deviation error of the proposed pixel circuits A and B ranges from ?2.59% to +2.78%, and from ?1.86% to +1.84%, respectively, which are improved from the emission current deviation error of the conventional current‐source type pixel circuit when the threshold voltage variation is not compensated for, which ranges from ?14.87% to +14.67%. In addition, the data voltage ranges of the proposed pixel circuits A and B are 1.193 V and 1.792 V, respectively, which are 2.38 and 3.57 times wider than the data voltage range of the conventional current‐source type pixel circuit of 0.501 V. 相似文献
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Magnetic‐field probes can be used for electromagnetic interference measurement of high‐speed circuits. The main magnetic probe performance includes sensitivity, spatial resolution, electric‐field suppression ratio (EFSR), and measurement accuracy. In this article, a pair of differential magnetic‐field probes is proposed to improve measurement accuracy without reducing sensitivity. The proposed differential probes consist of two asymmetric loop probes, which are designed in the same plane and separated by a row of periodic vias. The proposed differential probes are fabricated under PCB process. High accuracy can be achieved by measuring difference between outputs of the two probes. In addition, EFSR can be improved by size optimization of the differential magnetic‐field probes. Simulation and measurement results show the operating bandwidth is from 100 MHz to 12 GHz, the measurement error is 3.4% and the EFSR is about 40 dB. The proposed probes have higher measurement accuracy and higher EFSR than the conventional single probe, and larger operation bandwidth than the stacked differential probes. 相似文献
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The design, modeling, and optimization of a novel, thermally actuated CMOS‐MEMS switch are presented in this article. This series capacitive MEMS switch solves the substrate loss and down‐state capacitance degradation problems commonly plaguing MEMS switches. The switch uses finger structure for capacitive coupling. The vertical bending characteristic of bimorph cantilever beams under different temperatures is utilized to turn the switch on and off. A set of electrical, mechanical, and thermal models is established, and cross‐domain electro‐thermo‐mechanical simulations are performed to optimize the design parameters of the switch. The fabrication of the switch is completely CMOS‐process compatible. The design is fabricated using the AMI 0.6 μm CMOS process and a maskless reactive‐ion etching process. The measured results show the insertion loss and isolation are 1.67 and 33 dB, respectively, at 5.4 GHz, and 0.36 and 23 dB at 10 GHz. The actuation voltage is 25 V and the power consumption is 480 mW. This switch has a vast number of applications in the RF/microwave field, such as configurable voltage control oscillators, filters, and configurable matching networks. © 2009 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2009. 相似文献
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Tzu‐Ming Wang Yu‐Hsuan Li Ming‐Dou Ker 《Journal of the Society for Information Display》2009,17(10):785-794
Abstract— Low‐temperature polysilicon (LTPS) technology has a tendency towards integrating all circuits on glass substrate. However, the poly‐Si TFTs suffered poor uniformity with large variations in the device characteristics due to a narrow laser process window for producing large‐grained poly‐Si TFTs. The device variation is a serious problem for circuit realization on the LCD panel, so how to design reliable on‐panel circuits is a challenge for system‐on‐panel (SOP) applications. In this work, a 6‐bit R‐string digital‐to‐analog converter (DAC) with gamma correction on glass substrate for TFT‐panel applications is proposed. The proposed circuit, which is composed of a folded R‐string circuit, a segmented digital decoder, and reordering of the decoding circuit, has been designed and fabricated in a 3‐μm LTPS technology. The area of the new proposed DAC circuit is effectively reduced to about one‐sixth compared to that of the conventional circuit for the same LTPS process. 相似文献
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Ryo Sakurai Reiji Hattori Michihiro Asakawa Takuro Nakashima Itsuo Tanuma Akihiko Yokoo Norio Nihei Yoshitomo Masuda 《Journal of the Society for Information Display》2008,16(1):155-160
Abstract— A thin and flexible LSI driver with a thickness of less than 35 μm for a passive‐matrix‐driven Quick‐Response Liquid‐Powder Display (QR‐LPD?) was successfully mounted onto the flexible printed circuit (FPC) and the back substrates of a flexible QR‐LPD?. Amounted LSI driver on a plastic substrate shows no significant degradation in the driving performances and maintains physical flexibility without any connection failures. This technology can realize a fully flexible electronic paper in combination with a plastic‐substrate QR‐LPD? fabricated by a roll‐to‐roll process. 相似文献
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A novel six‐port circuit is proposed and demonstrated. The circuit is based on four quadrature hybrids. A prototype circuit is fabricated and characterized with microstrip lines. Reflection coefficients for a few loads are measured with the fabricated circuit to evaluate its performance. The results agree with those from an HP8510C network analyzer reasonably well. Using active inductors and varactors, the six‐port circuit is also designed with a 0.13 μm CMOS process. The simulation results show that the operating frequency is tunable from 1 to 6.8 GHz. © 2009 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2010. 相似文献
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Taimei Kodaira Saichi Hirabayashi Yuko Komatsu Mitsutoshi Miyasaka Hideyuki Kawai Satoshi Nebashi Satoshi Inoue Tatsuya Shimoda 《Journal of the Society for Information Display》2008,16(1):107-111
Abstract— A paper‐thin QVGA, flexible 2.1‐in. active‐matrix electrophoretic display (AMEPD) that features 100‐μm thick and a 192‐ppi resolution has been developed. An LTPS‐TFT backplane with integrated peripheral driver circuits was first fabricated on a glass substrate and then transferred to a very thin (30‐μm) plastic film by employing surface‐free technology by laser ablation/annealing (SUFTLA®). A micro‐encapsulated electrophoretic imaging sheet was laminated on the backplane. A supporting substrate was used to support the LTPS‐TFT backplane. Fine images were successfully displayed on the rollable AM‐EPD. The integrated driver circuits dramatically reduce the number of external connection terminals, thus easily boosting the reliability of electrical connections even on such a thin plastic film. 相似文献
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Shie‐Chang Jeng Ku‐Hsien Chang Jau‐Min Ding Lung‐Pin Hsin Chun‐Yuan Lin Yan‐Rung Lin Kang‐Hung Liu Chih‐Chiang Lu Yi‐An Sha Hsing‐Lung Wang Chi‐Chang Liao 《Journal of the Society for Information Display》2005,13(6):475-480
Abstract— Several leading technologies for flexible liquid‐crystal displays have been developed recently at ERSO. The roll‐to‐roll compatible techniques, polymer‐added liquid crystal, have been applied on a film‐like substrate. A flexible black‐and‐white cholesteric liquid‐crystal display was also implemented by photo‐induced phase separation. Color filters placed on a plastic substrate by a low‐temperature manufacturing process was successfully fabricated. A novel design of a wide‐viewing‐angle color plastic LCD was also proposed. 相似文献
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A post-CMOS micromachined lateral accelerometer 总被引:2,自引:0,他引:2
Hao Luo Gang Zhang Carley L.R. Fedder G.K. 《Journal of microelectromechanical systems》2002,11(3):188-195
In a post-complementary metal-oxide-semiconductor (CMOS) micromachining technology, the process flow enables the integration of micromechanical structures with conventional CMOS circuits which are low-cost and readily available. This paper presents a lateral capacitive sensing accelerometer fabricated in the post-CMOS process. Design advantages include electrically isolated multimetal routing on microstructures to create full-bridge capacitive sensors, and integration to increase transducer sensitivity by minimizing parasitic capacitance. In a size of 350 μm by 500 μm, this accelerometer has a 1 mG/√(Hz) resolution and a linear range of at least ±13 G. The fundamental limitations of mechanical and electronic noise for acceleration sensing are addressed 相似文献
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This work presents the design of a novel static-triggered power-rail electrostatic discharge (ESD) clamp circuit. The superior transient-noise immunity of the static ESD detection mechanism over the transient one is firstly discussed. Based on the discussion, a novel power-rail ESD clamp circuit utilizing the static ESD detection mechanism is proposed. By skillfully incorporating a thyristor delay stage into the trigger circuit (TC), the proposed circuit achieves the best ESD-conduction behavior while consuming the lowest leakage current (Ileak) at the normal bias voltage among all investigated circuits in this work. In addition, the proposed circuit achieves an excellent false-triggering immunity against fast power-up pulses. All investigated circuits are fabricated in a 65-nm CMOS process. Performance superiorities of the proposed circuit are fully verified by both simulation and test results. Moreover, the proposed circuit offers an efficient on-chip ESD protection scheme considering the worst discharge case in the utilized process. 相似文献
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《Computer Standards & Interfaces》2001,23(2):111-122
Error table compensation can be used to improve the spurious free dynamic range performance of high speed A/D converters. This paper gives details of an error table compensator system that uses a VLSI chip incorporating a transversal filter programmed as a wideband differentiator, additional on-chip circuits including delays and an adder, and a lookup table that is stored in external memory. The cascadable 10GOPS transversal filter differentiator chip has been designed and fabricated and can operate in 32-tap symmetric, 32-tap anti-symmetric or 16-tap non-symmetric modes. It has programmable tap weights and uses 16-bit signed arithmetic with radix-16 multipliers and 4–2 compressors to reduce the transistor count. The chip was fabricated in a 0.35-μm CMOS process, measures 3.1×4.4 mm and contains 310,000 transistors. The chip is pipelined and has a maximum clock rate of 200 MHz. It is shown that the error table compensation system is capable of providing between 7 and 13 dB improvement in the dynamic range of typical high-speed A/D converters. 相似文献
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Hiroto Sato Hideo Fujikake Takeshi Murashige Hiroshi Kikuchi Taiichiro Kurita Fumio Sato 《Journal of the Society for Information Display》2005,13(6):461-468
Abstract— We demonstrated an A4‐paper‐sized flexible ferroelectric liquid‐crystal (FLC) color displays fabricated by using a new plastic‐substrate‐based process which was developed for large‐sized devices. Finely patterned color filters and ITO electrodes were formed on a plastic substrate by a transfer method to avoid surface roughness and thermal distortion of the substrate, which induce disordering of the FLC molecular alignment. The thickness of an FLC/monomer solution sandwiched by two plastic‐film substrates was well controlled over a large area by using flexographic printing and lamination techniques. Molecular‐aligned polymer walls and fibers were formed in the FLC by a two‐step photopolymerization‐induced phase‐separation method using UV‐light irradiation. A fabricated A4‐sized flexible‐sheet display for color‐segment driving was able to exhibit color images even when it was bent. 相似文献
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Paul Drzaic Anne Chiang Roger Stewart Anno Hermanns Yijian Shi Jeffrey Jacobsen 《Journal of the Society for Information Display》2003,11(1):81-87
Abstract— High‐performance compact plastic displays have been built by integrating high‐quality crystalline‐Si NanoBlock IC drivers into plastic films using a fluidic self‐assembly (FSA) process. Plastic‐film‐based liquid‐crystal displays, only 500 μm thick, were integrated into smartcards using NanoBlock IC voltage drivers. In an additional demonstration, polymer‐LED displays were constructed using NanoBlock IC current drivers. FSA technology provides a cost‐effective means of packaging integrated circuits within plastic film, enabling high‐performance backplanes that can be combined with a variety of display media. 相似文献
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Alex Z. Kattamis Noel Giebink I‐Chun Cheng Sigurd Wagner Stephen R. Forrest Yongtaek Hong Vincent Cannella 《Journal of the Society for Information Display》2007,15(7):433-437
Abstract— An active‐matrix organic light‐emitting diode (AMOLED) display driven by hydrogenated amorphous‐silicon thin‐film transistors (a‐Si:H TFTs) on flexible, stainless‐steel foil was demonstrated. The 2‐TFT voltage‐programmed pixel circuits were fabricated using a standard a‐Si:H process at maximum temperature of 280°C in a bottom‐gate staggered source‐drain geometry. The 70‐ppi monochrome display consists of (48 × 4) × 48 subpixels of 92 ×369 μm each, with an aperture ratio of 48%. The a‐Si:H TFT pixel circuits drive top‐emitting green electrophosphorescent OLEDs to a peak luminance of 2000 cd/m2. 相似文献
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An important problem in designing RFIC in CMOS technology is the parasitic elements of passive and active devices that complicate design calculations. This article presents three LNA topologies including cascode, folded cascade, and differential cascode and then introduces image rejection filters for low‐side and high‐side injection. Then, a new method for design and optimization of the circuits based on a Pareto‐based multiobjective genetic algorithm is proposed. A set of optimum device values and dimensions that best match design specifications are obtained. The optimization method is layout aware, parasitic aware, and simulation based. Circuit simulations are carried out based on TSMC 0.18 μm CMOS technology by using Hspice. © 2010 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2010. 相似文献
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The influence of guard‐ring (GR) on the direct current (DC) and high‐frequency performance of deep‐submicrometer metal oxide semiconductor field effect transistors (MOSFETs) is investigated in this study. MOSFETs with four different GRs are fabricated using 90 nm complementary metal oxide semiconductor (CMOS) process, and a detailed comparative study on their device performances is performed. A united DC and small signal equivalent circuit model that takes into the effect of GR is developed. A set of simple, but efficient formulas provide a bidirectional bridge for the S parameters transformation between devices with different GRs. The corresponding model parameters for MOSFETs with different GRs are determined from S parameter on‐wafer measurement up to 40 GHz. © 2013 Wiley Periodicals, Inc. Int J RF and Microwave CAE 24:259–267, 2014. 相似文献