An efficient numerical approach for modeling microstrip-typeantennas

An efficient numerical approach to model antennas that include a microstrip element radiating in the presence of material layers is developed. The class of antennas considered is fed through the ground plane by a coaxial transmission line. The reaction integral equation is formulated by treating the coaxial aperture as part of the antenna. The substrate thickness can be arbitrary, making this numerical technique suitable for high-frequency applications. The effects of the substrate are also included in the analysis. Numerical results are obtained for the current distribution and input impedance. The algorithm is validated with experimental results     

An efficient technique for modeling and synthesis of automotiveengine sounds

This paper presents a new method for modeling and synthesis of automotive engine sounds using a deterministic-stochastic signal decomposition approach. First, the deterministic component is extracted using a synchronous discrete Fourier transform method and this is subtracted out from the original signal. Next, the (residual) stochastic component is modeled (and synthesized) using a new multipulse excited time-series modeling technique. The effectiveness of the proposed methodology is demonstrated using recorded data sets of actual engine sounds. The results of both numerical and subjective assessment tests are presented     

Simple CAD technique to develop high-frequency transistors

The emitter and base impurity concentration profiles and the epitaxial thickness of the collector of n-p-n microwave transistors have been optimized for f/SUB max/ by a simple computer-aided design technique. The optimized profile was synthesized and led to devices with f/SUB max/ between 15 and 18 GHz when fabricated with a mask with 1.5-/spl mu/ emitter widths. The details of the optimization procedure, the synthesis procedure and the r.f. results of fabricated devices are described.     

An optimization technique for efficient channel allocation in cellular network

For today’s wireless mobile communication systems, efficient use of limited radio spectrum with minimum interferences is required. Itinvestigates an Optimal Genetic Algorithm approach (GA) for Hybrid Channel allocation (NP hard) focusing on reduction in interference in cellular Network. Obtained an interference graph based fitness function to enhance the performance of HCA for interference reduction. It is shown that the use of integer genetic representation for Crossover and mutation operation enhances the speed of GA leading to less computation time. Comparison of proposed method is done with reported literature for KUNZ 4 which results in less co-channel and co-site interference depicted by interfering edges and also number of generations required are less. The result for KUNZ 1, KUNZ 2 and KUNZ 3 are obtained with minimum interference along with computation time.     

An efficient numerical technique for the solution of the monodomain and bidomain equations

Most numerical schemes for solving the monodomain or bidomain equations use a forward approximation to some or all of the time derivatives. This approach, however, constrains the maximum timestep that may be used by stability considerations as well as accuracy considerations. Stability may be ensured by using a backward approximation to all time derivatives, although this approach requires the solution of a very large system of nonlinear equations at each timestep which is computationally prohibitive. In this paper we propose a semi-implicit algorithm that ensures stability. A linear system is solved on each timestep to update the transmembrane potential and, if the bidomain equations are being used, the extracellular potential. The remainder of the equations to be solved uncouple into small systems of ordinary differential equations. The backward Euler method may be used to solve these systems and guarantee numerical stability: as these systems are small, only the solution of small nonlinear systems are required. Simulations are carried out to show that the use of this algorithm allows much larger timesteps to be used with only a minimal loss of accuracy. As a result of using these longer timesteps the computation time may be reduced substantially.     

Equation formulation considerations for efficient numerical modeling of semiconductor phenomena

This paper highlights the importance of equation formulation and associated programming efficiency with respect to modeling of semiconductor phenomena via numerical methods.Two numerical modeling efforts are developed in this paper for one-space dimension device modeling. It is shown on a per iteration basis that the ratio of the computational effort between the two methods is a factor of sixteen. The reduction in the computational effort between the two methods was realized by reformulating the mathematical equations and by reconsidering the effect of programming efficiency. A by-product of the reformulation was a factor of two to three improvement in the convergence rate of the nonlinear iteration. With all considerations, the overall improvement in the solution times for one-space dimension device numerical modeling was determined to be a factor of 30–50.When considering equation formulation alone, the per iteration improvement is a factor of 1·43. Coupled with the two to three convergence rate improvement the overall improvement due to equation formulation was approximately 3·67.     

An integrated circuit technique for saturation control of switching transistors

A limited-saturation device technique found to improve the absolute value, spread, and temperature dependence of storage times in integrated transistors, and compatible to existing integrated-circuit processing is described.     

An efficient technique for eigenspace-based adaptive interferencecancellation

This paper presents a technique for the computation of the interference subspace for eigenspace-based interference cancellation. Using a subarray partitioning scheme, we construct the interference subspace from the subarray interference subspaces. In the case of uniform linear arrays, the proposed technique has the advantages of reclaiming the lost degrees of freedom due to signal blocking and reduced computational burden over existing techniques. The proposed technique also possesses the capabilities to cope with the case of using nonuniform linear arrays in the environment of partially correlated signals. A computer simulation example is provided for illustration and comparison     

New ? equivalent circuit for high-frequency bipolar transistors

A simplified equivalent circuit having the whole of Cob, between the base terminal and the collector junction is derived, and conditions for its validity are given. This simplification is shown to apply to integrated bipolar transistors having fr?2.5 GHz.     

Performance potential of high-frequency heterojunction transistors

Assuming a state-of-the-art microwave planar geometry, the maximum frequency of oscillation has been calculated for GaAs-Ge heterojunction transistors utilizing either doped or high-resistivity space-charge-limited emitters. This is compared with a Ge homojunction transistor of the same geometry. A detailed equivalent circuit is used which accounts for the parasitics of the chip. It is shown that if chip parasitics are neglected, GaA-Ge devices should outperform Ge devices by about 4 to 1 in power gain. In the geometry assumed, however both heterojunction and homojunction transistors are limited by wafer parasitics, particularly base contact resistance. The calculated figures of merit of the two types of devices are therefore quite similar.     

An efficient numerical model of CMOS latch-up

A one-dimensional numerical model of latch-up in bulk CMOS structures is presented. The model simulates the triggering and sustaining regimes of the parasitic SCR, yielding results nearly equivalent to those obtained using two-dimensional analysis, but with two orders of magnitude-lower computational cost. The model is used to obtain the SCR switching characteristics of typical CMOS based on two-dimensional impurity cross sections, and parameter sensitivities are examined.     

An application of device modeling to microwave power transistors

A new approach for modelling bipolar transistors in the microwave region under class-C conditions is presented. The following features were combined in the modelling procedure: 1) modelling at microwave frequencies, 2) modelling under large-signal class-C conditions, 3) modelling under mismatched conditions, and 4) correlation between measurements and modelling results. A model has been economically implemented and sufficient accuracy was obtained for: 1) device modelling over a range of operating conditions for which direct experimental characterization is not economically obtainable, 2) optimizing decisions for improved device fabrication, and 3) computer optimization of matching networks for microwave transistors.     

Macromodeling of single-electron transistors for efficient circuitsimulation

In this study, the possibility of compact modeling in single-electron circuit simulation has been investigated. It is found that each Coulomb island in single-electron circuits can be treated independently when the interconnections between single-electron transistors are large enough and a quantitative criterion for this condition is given. It is also demonstrated that, in those situations, SPICE macromodeling of single-electron transistors can be used for efficient circuit simulation. The developed macromodel produces simulation results with reasonable accuracy and with orders of magnitude less CPU time than usual Monte Carlo simulations     

An efficient technique for evaluating direct-sequencespread-spectrum multiple-access communications

A technique is presented for obtaining bounds on the average probability of error for direct-sequence spread-spectrum multiple-access (DS/SSMA) communications. The technique is of interest because it yields arbitrarily right bounds, involves a small amount of computation, avoids numerical integrations, and applies to many types of detection. As an illustration, the technique is applied to binary DS/SSMA communications, an additive white Gaussian noise channel, and a coherent correlation receiver. It is assumed that all the signature sequences are deterministic. Each transmitter is assumed to have the same power, although the approach can accommodate the case of transmitters with unequal powers. Expressions are given for the density functions of the random variables that model the multiple-access interference. These expressions are used to obtain arbitrarily tight upper and lower bounds on the average probability of error without making a Gaussian approximation or performing numerical integrations to incorporate the effects of multiple-access interference     

An efficient noise isolation technique for SOC application

A highly efficient CMOS process technique of suppressing the transmission of high-frequency noise induced by spiral inductors, ultrafast-switching MOS gates, or supply ringing through silicon substrate has been attained. The isolated n/sup +/-pocket structure formed by a promising process technique designed in this work has proven to be most effective in guarding vulnerable devices from remnant high-frequency noise roaming in the substrate among the structures we have used in the experiment: p/sup +/ guard ring, proton implant, and pocket structures. Excellent noise suppression efficiency of -75 dB with source and sense separated by only 21 /spl mu/m at 1 GHz has been achieved for the test keys with n/sup +/-pocket structure in contrast to -38 dB at 1GHz of unprotected devices. The isolated n/sup +/-pocket structure has manifested itself to possess the potential of becoming a key technology for mixed-mode circuits in future success of Si-based wireless communication system-on-chip (SOC) applications.     

An efficient approach for multiple criteria redundancy optimization problems

The present paper provides an efficient approach to multiple criteria redundancy optimization problems, often encountered in reliability design of engineering systems. A search technique introduced earlier [10,11] in combination with the multicriteria optimization methods, based on min-max concept for finding Pareto optimal solution of multicriteria optimization problems, provides an efficient and excellent approach for solving redundancy optimization problems. The approach is illustrated through several numerical examples. Further, based on this approach, a very general computer code called ESMOP (Efficient Search Multi-Objective Programming) has also been developed. It is capable of considering any type of redundancy, constraint or individual cost function and thus offers to solve many reliability design problems.     

Small-signal, high-frequency theory of field-effect transistors

In this theory a field-effect transistor of planar geometry is considered as an active, distributed, nonuniform transmission line. The wave equation of this line is determined and solved by an approximation method. From this solution theyparameters are determined. By comparing the results for y11with van der Ziel's expression for the high-frequency gate noise of field-effect transistors, it is shown that the noise temperature of y11is of the order of the device temperature. The conductance part g11of y11varies as ω²over a wide frequency range. The high-frequency cutoff of the field-effect transistor is determined.     

Small-signal high-frequency performance of power MOS transistors

The performance of power MOS transistor in high frequency linear applications is investigated in this paper. In particular, a model relating structural and layout parameters is developed and used to investigate the characteristics and limitations of the devices and to establish which device offers the best high frequency performance.     

Geometry optimization for carbon nanotube transistors

The performance of carbon nanotube-based transistors is analyzed numerically, employing the non-equilibrium Green’s function formalism. The effect of geometrical parameters on the device performance is investigated. Our results clearly show that device characteristics can be optimized by appropriately selecting geometrical parameters.