Characterization of silicon-on-sapphire IGFET transistors

Under dynamic operation conditions, the potential of the floating substrate in a silicon-on-sapphire (SOS) device is primarily controlled by the capacitive coupling of the substrate to other device terminals. However, a key parameter that plays a major role in defining that potential during switching is the avalanche multiplication current produced by the channel current carriers in the surface space charge region adjacent to the drain. A closed form expression is derived for the avalanche current, enabling the development of a nonlinear equivalent circuit model of the device. Comparison of measurements with device terminal characteristics, as well as the switching behavior of the device, shows good agreement.     

Equivalent Circuit Model for Si Avalanche Photodetectors Fabricated in Standard CMOS Process

We present an equivalent circuit model for CMOS-compatible avalanche photodetectors. The equivalent circuit model includes an inductive component for avalanche delay, a current source for photogenerated carriers, and several components that model the device structure and parasitic effects. The model provides accurate impedance characteristics and photodetection frequency responses.     

Characterization and modeling of avalanche multiplication in HBTs

The accurate modeling of weak avalanche breakdown of HBTs in compact bipolar transistor models for circuit simulation is presented. Based on various device electrical characteristics that are grouped into three classes, a modified VBIC avalanche multiplication model is proposed. By simply replacing one constant avalanche model parameter with current linear dependence, the new model predicts well broad behaviors of breakdown from weak avalanche up into high level injections.     

Excess gate current analysis of junction gate FET's by two- dimensional computer simulation

Gate current in a JFET under high drain bias is much higher than expected from the classical theory for reverse-biased p-n junctions. This excess gate current is caused by minority carriers generated by low-level impact ionization in the conducting channel, while the so-called breakdown voltage is determined by high-level avalanche multiplication near the gate edge at the surface. A simple one-dimensional model for the excess gate current is proposed. This model is based on the results of two-dimensional numerical analysis, which neglects the minority carrier motion. The excess gate current and avalanche breakdown voltage are calculated from one-dimensional ionization integrals, which are obtained numerically by utilizing the solution of two-dimensional analysis. The reverberant effect of the generated carriers on the potential distribution is assumed to be negligible. The results of the calculation are in good agreement with experimental results, without any adjustable parameters. Moreover, various impurity doping profiles are analyzed for the purpose of minimizing excess gate current. The present model requires a reasonably short computation time and is useful for designing JFET devices.     

Electroluminescence in porous silicon at a reverse bias voltage applied to the Schottky barrier

A model of electroluminescence originating in a structure composed of a metal and porous silicon at a reverse bias voltage applied to the arising Schottky barrier is suggested. In this model, the avalanche multiplication of hot charge carriers and nonradiative Auger recombination in porous silicon are taken into account. It is ascertained that the difference in the systematic features of an increase in electron and hole currents due to generate nonequilibrium charge carriers, as a result of avalanche multiplication of hot electrons, brings about a superlinear increase in the radiative-recombination intensity as a current function. The radiative-recombination efficiency is lowered in the conditions of an avalanche breakdown as a result of an increase in the contribution of the Auger processes. It is shown that an increase in the concentration of nanocrystallites in porous silicon represents a way for increasing the electroluminescence efficiency in this material.     

High-frequency properties of avalanche multiplication of photocarriers in structures with negative feedback

The high-frequency characteristics of photosensitive avalanche Si-SiC structures were studied. It is shown that their high-speed operation is substantially superior to that of silicon avalanche photodiodes. A theoretical analysis of the high-frequency properties of avalanche photodiodes is carried out and analytical expressions for the gain-bandwidth product are obtained. It is shown that this product is not a universal parameter for a metal-insulator-semiconductor structure with a negative feedback, since, for high amplification factors, the effective value of the relation of the impact-ionization coefficients for different types of charge carriers in such structures turns out to be significantly different from that in avalanche photodiodes.     

Investigation of the degradation of InGaAs/InP double HBTs underreverse base-collector bias stress

In this paper, we report on the degradation of DC performance of InP/InGaAs/InP double heterojunction bipolar transistors (DHBTs) during electrical stress. Devices with different sizes were investigated under highly reverse base-collector (B-C) bias stress. The increase of B-C and emitter-base (E-B) junction leakage and decrease of current gain were observed. The increase of the junction leakage for both B-C and E-B junctions was found to scale with the junction perimeters which suggests that the stress-induced damages are localized at the junction peripheries. For the devices with larger emitter periphery-to-area ratio, a more pronounced decrease of current gain due to the stress was observed. The obtained experimental data indicate that the stress-induced degradation happens in high reverse B-C bias voltage (avalanche) regime. The degradation is believed to be induced by hot carriers rather than current. A physical model is proposed to explain the experimental observations     

Modelling of channel enhancement effects on the write characteristics of FAMOS devices

Physical modelling of floating-gate avalanche-injection MOS (FAMOS) devices in the program (write) mode is complicated by a feedback effect to the channel from the floating gate. The floating gate takes on a potential by virtue of capacitive coupling to the drain; this induces a channel near the source; the channel injects carriers into the depletion region near the drain and greatly enhances the avalanche multiplication current. This paper presents a simple method for taking account of this effect using empirical data, and thereby arriving at a first-order model of the FAMOS device. Measurements of drain current are subdivided into channel current and avalanche multiplication current, and a constant hot-carrier injection efficiency is assumed. The hot-carrier (avalanche) injection current is associated with a dielectric resistivity, whose dependence on the electric field in the oxide can be approximated by a simple exponential function. Model predictions for the write characteristics of FAMOS devices are in reasonable agreement with experiment.     

Problems related to the avalanche and secondary breakdown of silicon P-N junction

The paper provides an analysis of some still unsolved problems related to avalanche and secondary breakdown. An evaluation is given of four models of energy accumulation, necessary for impact ionization: Wolf's diffusion model, Shockley's model of ‘lucky’ electrons, Ridely's model of ‘lucky-drift’ and Gribnikov's model of ‘light’ electrons. It is shown that impact ionization is mainly realized in conformity with the model of ‘light’ charge carriers.It is indicated that the bright avalanche breakdown channels, called microplasmas, are encircled by a weakly shining ring-shaped cloud. Apparently this cloud is caused by the ‘light’ charge carriers. As the p-n junction is heated under the influence of a high avalanche breakdown current and reaches a certain temperature, the luminous clouds expand and by force of the magnetic pinch created by the current itself tend towards the centre, where they meet and assume the form of a ring. Then the weakly shining cloud (pre-mesoplasma) contracts rapidly and bright circular mesoplasma lights up (secondary breakdown appears) which moves in the direction of higher temperature and higher voltage until it localizes at a large defect or contact. A model is proposed according to which pre-mesoplasma and mesoplasma is a flow of ‘light’ charge carriers. This model allows us to explain many peculiarities of pre-mesoplasma and mesoplasma.     

Avalanche-multiplication-region operation of n-p-n?-n+ power transistors

Internal behaviour of an n-p-n?-n+ high-voltage power transistor for the avalanche-multiplication-region operating conditions is presented as obtained by a mathematical model. This model incorporates the avalanche generation of carriers due to electric field and current density and the resulting semiconductor transport equations are solved in two dimensions by numerical methods.     

Effects of Ionization Velocity and Dead Space on Avalanche Photodiode Bit Error Rate

A model is presented for the bit error rate (BER) contributed by the receiver in an optical telecommunications system that includes the effects of ionizing carrier velocity and dead space in the avalanche photodiode (APD) and of additive circuit noise. The probability distribution functions of bit charge used to calculate BER are not, as is commonly assumed, Gaussian, confirming the need to directly compute the receiver statistics. Integrating the current over the central section of the bit period can minimize intersymbol interference. The assumption that carriers travel to ionization with infinite velocity underestimates BER in InP APDs with short avalanche region widths, and overestimates BER when . Models assuming constant carrier velocity or allowing for velocity enhancement predict distinctly different BER over a wide range of avalanche width and multiplication because of the manner in which the current evolves during the bit period.     

Experimental observation of the dependence of avalanche noise on carrier ionization coefficients

McIntyre has predicted that avalanche noise is strongly dependent on the ionization coefficients of the carriers initiating the avalanche process. Carriers with lower ionization coefficient produce higher avalanche noise. The experimental results described here confirm the theoretical prediction that in silicon, where the ionization coefficient of holes is an order of magnitude smaller than the ionization coefficient of electrons, the avalanche noise generated by the hole current can be as much as two orders of magnitude larger than the avalanche noise generated by electron current.     

Substrate current model for submicrometer MOSFETs based on meanfree path analysis

The nonequilibrium effects of hot carriers are investigated to analyze avalanche generation for submicrometer MOSFET devices. A simple analytical expression for the impact ionization utilizing the mean free path concept is developed. It is incorporated into a conventional drift-diffusion equation solver (PISCES) to obtain the substrate current in submicrometer MOSFET devices. The transconductance for high drain bias and breakdown conditions are analyzed based on the proposed impact ionization model     

Field and carrier current density profiles in linearly graded silicon avalanche diodes

A detailed study for the d.c. field and carrier current density profiles of linearly graded double drift avalanche diodes is presented taking into account the effect of impurity and mobile charge density and the realistic field dependance of the ionization rates and drift velocities for the charge carriers. The study involves finding the location and magnitude of the electric field maximum by an iterative method. A small shift in the position of the electric field maximum towards the p-side of the metallurgical junction is observed which increases with increasing current density and decreasing doping gradient. The maximum field and the depletion layer width change sharply with doping gradient but very slightly with d.c. current density. Over a larger fraction of the depletion layer, hole current density exceeds electron current density and hole dominance increases with decreasing doping gradient. The avalanche centre where J_p = J_n is found to be always on the n-side of the junction.     

全固态快沿电磁脉冲源的模拟及特性分析

为了给脉冲源的参数选择和电磁脉冲防护提供理论支撑,首先对雪崩三极管的雪崩效应以及全固态快沿电磁脉冲源的工作原理进行阐述。然后通过对雪崩三极管导通过程简化,建立了该脉冲源的等效模型,分析了 该脉冲源的时域特性,通过自定义曲线拟合方法,首次得到了脉冲源输出波形的数学表达式,并验证了它的有效性,最终确定了脉冲源的具体理论模型。依据此表达式的参数,通过对脉冲电流的频域分析表明:电流的振幅主要集中在0 ~200MHz 之间,90%以上的能量都分布在810MHz 以内。     

On the statistics of extra generation in an avalanche diode

The fluctuation characteristics of the output current from an avalanche diode are investigated, allowing a spatial creation of extra carriers in the space charge layer. A spectral density is obtained for the extra generation current, assuming a uniform thermal or optical activation.     

DC modeling and characterization of AlGaAs/GaAs heterojunctionbipolar transistors for high-temperature applications

The large signal dc characteristics of AlGaAs/GaAs heterojunction bipolar transistors (HBT) at high temperatures (27°-300°C) are reported. A high-temperature SPICE model is developed which includes the recombination-generation current components and avalanche multiplication which become extremely important at high temperatures. The effect of avalanche breakdown is also included to model the current due to thermal generation of electron/hole pairs causing breakdown at high temperatures. A parameter extraction program is developed and used to extract the model parameters of HBT's at different temperatures. Fitting functions for the model parameters as a function of temperature are developed. These parameters are then used in the SPICE Ebers-Moll model for the dc characterization of the HBT at any temperature between (27°-300°C)     

Microwave properties of a proposed read-like device with variable current multiplication in the avalanche zone and an additional transverse field in the drift zone

A study of the high-frequency properties of a Read-like IMPATT device, which is arranged to have a variable current multiplication in the avalanche zone by means of controlled injection of minority carriers into the reverse biased junction, and also an additional transverse field in the intrinsic drift region, is presented. The additional field shifts the direction of space-charge waves emerging from the avalanche layer without altering the drift velocity which is already saturated. It is shown that the frequency of the maximum negative conductance, avalanche frequency, magnitude of the negative conductance, and susceptance of the device can be controlled over a wide range by varying the current multiplication in the avalanche zone. It is also shown that a fine variation of the negative conductance without altering the avalanche frequency or susceptance can be obtained by means of the additional transverse field.     

The effects of carrier accumulation at the cathode on the negative resistance induced by avalanche injection in Si bulk devices

An analytical model for the negative resistance induced by avalanche injection in bulk semiconductors is developed including diffusion, recombination and accounting for the properties of the majority carrier injecting electrode with respect to the avalanche generated carriers.

Two limiting situations are discussed in detail namely that of a n⁺-n cathode which is blocking for the avalanche generated holes and that of a metal-semiconductor ohmic contact with an infinite surface recombination rate.

The calculations show that in the first case the avalanche ionization is extremely low and the negative resistance occurs because a low-field neutral region creates into the solid thus reducing the voltage; in the other case, the multiplication is relatively high and the negative resistance is due to the lowering of the field in the region of scattering-limited velocity. As a consequence, from the first to the second situation the peak voltage changes by a factor of two and the peak current by a factor of three or more.

These results give a new insight of a number of experimental observations reported in the literature. The performance of devices made with different techniques which approximate one or the other limiting situations mentioned above is accurately predicted by the proposed model.     

Current impulse response of thin InP p-i-n diodes

The simulation of current impulse response using random response time model in avalanche photodiode (APD) is presented. A random response time model considers the randomness of times at which the primary and secondary carriers are generated in multiplication region. The dead-space effect is included in our model to demonstrate the impact on current impulse response of thin APDs. Current impulse response of homojunction InP p⁺-i-n⁺ diodes with the multiplication widths of 0.1 and 0.2 μm are calculated. Our results show that dead-space gives a slower decay rate of current impulse response in thin APD, which may degrade the bit-error-rate of the optical communication systems.