测量系统中20位精度带通∑-△调制器的设计

设计了一种用于测量系统的20位精度带通∑-△调制器。采用低失真离散时间单环4阶1比特量化结构,以实现高精度的指标。对带通调制器中最关键的模块-谐振子进行了研究,设计了一种对电容非线性和失配不敏感并具有精确谐振频率的高Q值谐振子。仿真结果表明,该调制器在100kHz中频处20Hz带宽内实现了20位分辨率。本调制器采用AMI0．35μm标准CMOS工艺实现,整个调制器的总面积仅为2．5mm^2,在3．3V供电电压下,调制器的总功耗仅为4mW。     

低电压Σ-Δ调制器关键技术及设计实例

介绍了低电压开关电容Σ-Δ调制器的实现难点及解决方案,并设计了一种1 V工作电压的Σ-Δ调制器.在0.18 μm CMOS工艺下,该Σ-Δ调制器采样频率为6.25 MHz,过采样比为156,信号带宽为20 kHz;在输入信号为5.149 kHz时,仿真得到Σ-Δ调制器的峰值信号噪声失真比达到102 dB,功耗约为5 mW.     

1.8V音频Σ-Δ调制器的设计

介绍了一种适用于语音信号处理的16位24 kHzΣ-Δ调制器。该电路采用单环三阶单比特量化形式,利用Matlab优化调制器系数。电路采用SIMC 0.18μm CMOS工艺实现,通过Cadence/Spectre仿真器进行仿真。仿真结果显示,调制器在128倍过采样率时,带内信噪比达到107 dB,满足设计要求。     

窄带射频接收系统中带通Σ-Δ调制器的设计

设计了一种适用于无线窄带射频接收系统的带通Σ-Δ调制器,并将其成功集成于一个无线射频收发芯片之中.该调制器采用0.35 μm CMOS工艺实现,采用斩波-稳零,动态元件匹配,以及正交采样等技术,提高系统的信噪比,并解决通道间失配的问题.模拟结果表明,该电路在30 kHz带宽内,信噪比为83.4 dB,而两个通道消耗的总电流仅为1 mA.     

一种用于带通Σ-Δ调制器的25MHz低功耗开关电容谐振器

介绍了一种运用于带通Σ-Δ调制器的谐振频率为25MHz的低功耗开关电容DD谐振器电路.电路采用了运算放大器共享技术和双采样技术,同时对单元电路进行优化,达到功耗最小化.该谐振器电路采用SMIC 0.25μm混合信号CMOS工艺进行设计,整个电路模块面积仅为0.09mm2.测试结果表明,使用该谐振器电路的带通Σ-Δ调制器工作于100MHz采样频率时,对于信号带宽为1kHz的输入信号,调制器的输出在谐振频率处SFDR约为77dB.整个谐振器功耗为10.5mW.     

采用 DWA技术的多位Σ-Δ调制器的设计

设计一个内部采用2位量化器的二阶单环Σ‐Δ调制器．为解决反馈回路中多位DAC元件失配导致的信号谐波失真问题,该调制器采用了数据加权平均（Data Weighted Averaging ,DWA ）技术来提高多位DAC的线性度．Σ‐Δ调制器信号带宽为50 kHz ,过采样率（OSR）为64,采用MXIC公司的0．35μm混合信号CMOS工艺实现,工作电压为12 V ．后仿真结果显示,在电容随机失配5％的情况下,该调制器可以达到55．8 dB的信噪比（SNR）和60.4 dB的无杂散动态范围（SFDR）．打开DWA电路比关闭DWA电路的情况下,SNR和SFDR分别提高8 dB和13 dB ．整个调制器功耗为48 mW ,面积仅为0.6mm2．     

Σ-Δ调制器的非理想特性建模与验证

Σ-Δ调制器是常用于混合信号电路中的一个关键模块.基于一个的二阶低通调制器,对包括非理想开关、色噪声模型、非线性运放直流增益和多比特量化器中的电容适配在内的非理想效应,进行了分析和建模.该调制器在HJTC 0.18μm工艺下实现并进行了流片测试.通过对行为级仿真和实际测试数据的对比,验证了提出的高层次建模方法,可以准确高效地指导调制器系统级和电路级设计.     

一种高性能多位量化Σ-Δ调制器的设计

实现了一种适用于信号检测的低功耗Σ-Δ调制器。调制器采用2阶3位量化器结构,并使用数据加权平均算法降低多位DAC产生的非线性。调制器采用TSMC 0.18μm混合信号CMOS工艺实现。该调制器工作于1.8V电源电压,在50kHz信号带宽和12.8MHz采样频率下,整体功耗为3mW,整体版图尺寸为1.25mm×1.15mm。后仿真结果显示,在电容随机失配5‰的情况下,该调制器可以达到91.4dB的信噪失真比(SNDR)和93.6dB的动态范围(DR)。     

带通Σ-Δ调制器的双线性变换设计方法

本文论述了带通式Σ-Δ调制器的双线性变换设计方法,通过线性化的插入式网络分析技术,将带通式Σ-Δ调制器的设计问题转化为了IIR带阻数字滤波器的设计问题.文章给出了该方法的原理和设计步骤,并对一位Σ-Δ代码的产生和检验方法以及调制器的稳定性问题进行了说明和讨论,最后给出了利用Matlab的计算机仿真结果,结果表明,该方法简单可靠,便于计算机仿真和检验,可大大加快带通Σ-Δ调制器的设计过程.     

电源电压可变的性能可调Σ-Δ调制器设计

基于SMIC 0.18 μm CMOS工艺,设计了一种应用于自适应系统的可重构2阶Σ-Δ调制器。引入动态电压调整技术,研究了不同输入信号下如何通过降低电源电压来节省ADC功耗。首先在Simulink下对非理想参数进行数学建模和分析,然后在Cadence下完成电路设计,并完成版图设计和后仿真。除了采用运放的差分对宽长比和尾电流等传统调整方案,本设计还可根据输入信号的幅度调整电源电压,进一步提高系统灵活性。仿真结果表明,在系统有效位数要求为12 bit时,使用3.3 V电源电压供电的功耗为123 μW,电压降为1.8 V时功耗仅为51 μW,通过降低电源电压节省功耗的效果明显。版图总面积为0.06 mm²。     

一种12位开关电流型Σ-△调制器

开关电流电路（ＳＩ）是近年兴起的一种模拟电路。文中引用了新型的两步采样开关电流技术（Ｓ＾２Ｉ）,对该电路中减小时钟馈漏效应的几种方法进行了分析。利用差分平衡结构的Ｓ＾２Ｉ存储单元设计了平衡Ｓ＾２Ｉ积分器,并在此基础上设计出一种平衡差分结构的二阶∑－△调制器。该调制器能够完全与标准ＣＭＯＳ数字工艺兼容。利用标准１．２μｍ数字ＣＯＭＳ工艺的ＨＳＰＩＣＥ模型参数进行了分析,该电路信噪比达到７３．３ｄＢ,     

A Prototype Bandpass Sigma-Delta Modulator Employing Crystal Resonator

This paper describes an initial work on a second-order bandpass Sigma-delta modulator employing crystal resonator. The aim of this work is to explore the possibilities of realizing bandpass sigma-delta modulator using non-electronic resonators, such as micro-mechanical resonators. The initial study is based on crystal resonators as they have similar characteristics as the other types of resonator and are readily available. In order to obtain the desired loop transfer function, a compensation circuit is proposed to cancel the anti-resonance in the crystal resonator. The modulator chip is fabricated in a 0.6-μ m CMOS process. The bandpass noise shaping is demonstrated in the experiment with a 1- and 8-MHz crystal resonator, respectively. Yong Ping Xu graduated from Nanjing University, P.R. China in 1977. He received his Ph.D. from University of New South Wales (UNSW) Australia, in 1994. From 1978 to 1987, he was with Qingdao Semiconductor Research Institute, P.R.China, initially as an IC design engineer, and later the deputy R&D manager and the Director. From 1993 to 1995, he worked on an industry collaboration project with GEC Marconi, Sydney, Australia, at the same university, involved in design of sigma-delta ADCs. He was a lecturer at University of South Australia, Adelaide, Australia from 1996 to 1998. He has been with the Department of Electrical and Computer Engineering, National University of Singapore since June 1998 and is now an Associate Professor. His general research interests are in the areas of mixed-signal and RF integrated circuits, and integrated MEMS and sensing systems. He is a Senior Member of IEEE. Xiaofeng Wang was born in Shangqiu, China, in 1980. He received B.Eng. degree from Northwestern Polytechnical University, Xi'an, China, in 2000 and M. Eng. degree from National University of Singapore, Singapore, in 2003, both in electrical engineering. He is currently working toward the Ph.D. degree at Tufts University, Medford, USA. His research is on high speed ADC design. Wai Hoong Sun was born in Taiping, Malaysia in 1976. He received the B. App. Sc. (Honours) degree in electrical engineering from the University of Toronto, Canada in 1999. After graduating, he joined Sharp Electronics Singapore as an R&D Engineer where he was involved in FPGA and digital IC design of display related circuits. In 2001 and 2002, he did full time research in the National University of Singapore on bandpass sigma-delta modulators. During that period, he was also a Graduate Tutor in electronics for second year electrical and computer engineering students. He then joined Philips Electronics Singapore in 2002 as a Lead Engineer. He did board-level designs for LCD and plasma televisions. He was also development project leader for a project that was successful in bringing to the market a range of LCD and plasma televisions. Currently, he is a Hardware Architect where he is responsible for the system-level electrical design of the television board.     

一种高阶1 bit插入式∑-△调制器的设计

介绍了插入式∑-△ A/DC调制器的设计过程,并给出了调制器行为级SIMULINK模型,通过对调制器系统级仿真可以确定调制器的信噪比、增益因子等参数,为其电路设计提供依据.设计了一个4阶调制器,仿真结果显示在128的过采样比、输入信号相对幅度-6 dB的条件下,可获得110 dB的信噪比,达到18 bit的分辨率.     

16-Bit三阶级联结构Sigma—Delta调制器的设计

设计一款可应用于压力传感器的高精度三阶2—1级联结构Sigma—delta调制器。MatlabSimulink建模仿真表明,信号带宽为500Hz,过采样率为128的情况下,该调制器信噪比高达119dB。通过对调制器非理想因数的分析,采用典型的0．35μm工艺整体实现该调制器,并用Spectre仿真,电路信噪比可达106．2dB,高于16住要求的98dB,整个调制器的功耗约为7mW。     

一种5阶1位∑-△调制器的设计

提出了一种稳定的5阶∑-△调制器的设计与调试方法.电路采用5阶级联结构,主要用CMOS开关电容技术实现,文章重点放在调制器结构的设计及几种防止系统发散和改进性能的途径上.模拟实验表明,经过改进的系统有较好的性能.     

Using Triangularly Weighted Interpolation to Get 13-Bit PCM from a Sigma-Delta Modulator

We present and analyze a method of interpolation that improves the amplitude resolution of an analog-to-digital converter. The technique requires feedback around a quantizer that operates at high speed and digital accumulation of its quantized values to provide a PCM output. We show that use of appropriate weights in the accumulation has important advantages for providing finer resoution, less spectral distortion, and white quantization noise. The theoretical discussion is supplemented by the report of a practical converter designed especially to show up the strengths and weaknesses of the technique. This converter comprises a sigma-delta modulator operating at 8 MHz and an accumulation of the 1-bit code with triangularly distributed weights. 13-bit resolution at 8 kwords/s is realized by periodically dumping the accumulation to the output. We present a practical method for overcoming a thresholding action that distorts low-amplitude input signals.     

一种低功耗高精度Sigma-Delta调制器

提出了一种改进的三阶单环Sigma-Delta调制器,噪声传递函数采用前馈方式实现极点,降低了积分器输出信号的幅度,从而降低功耗;采用局部反馈实现零点,从而优化了输出信噪比。采用0.35μm CMOS工艺设计了该调制器,过采样率128,信号带宽24kHz,分辨率16bit,在3.3V工作电压下,模拟电路部分功耗2.7mW,数字部分功耗0.5mW。电路用开关电容技术实现,在HSPICE中通过多工艺角验证。     

A Wideband Sigma-Delta Modulator With Cross-Coupled Two-Paths

The performance of a sigma-delta analog-to-digital converter (ADC) critically depends on one or more of the main three parameters: over-sampling ratio, the order of the modulators, and the number of bits used. Increasing each one of these parameters presents a degree of challenge (i.e., the increase in the over-sampling ratio is limited by the technology and the power consumption requirement). This paper presents a method to obtain high order noise shaping with $N$-path architectures that are based on first-order or second-order modulators. The desired noise transfer function (NTF) is obtained by suitable cross-coupling paths. The method was applied to a two-path first-order modulator for obtaining a second-order noise shaping. The performances of the proposed sigma-delta ADC were verified at the behavioral and transistor level implemented in 90-nm CMOS technology.      

A Triple-Mode Sigma-Delta Modulator for Multi-Standard Wireless Radio Receivers

A 1.8 V sigma-delta modulator with a 4 bit quantizer has been designed for GSM/WCDMA/WLAN receivers in a 0.18 um CMOS process. The modulator makes use of low-distortion sigma-delta modulator architecture and Pseudo-Data-Weighted-Averaging technique to attain high linearity over a wide bandwidth. Power dissipation is minimized by optimizing the architecture and by a careful design of analog circuitry. In GSM mode, the modulator achieves 96/104 dB peak SNR/SFDR over 100 kHz bandwidth and dissipates 18 mW at a sampling frequency of 32 MHz. The modulator achieves 92/68 dB peak SFDR and 77/54 dB peak SNR over a 2 MHz/10 MHz bandwidth and dissipates 23/39 mW at a sampling frequency of 64 MHz/160 MHz in WCDMA/WLAN. Ana Rusu received degrees of diploma engineer in electronics and telecommunications engineering from Technical University of Iasi, Romania, in 1983 and Ph.D. in electronics engineering from Technical University of Cluj-Napoca, Romania, in 1998. During 1983–1986 she was with Research Institute for Electronics Iasi, as researcher engineer. From 1986 to 1988 she was with Territorial Computer Centre, Piatra-Neamt, Romania, as a programmer in software engineering. Since 1988 she has been with the Technical University of Cluj-Napoca, Electronics and Telecommunications Faculty. In 1999 she was appointed as an associate professor. She has been in visiting researcher positions in University of Bradford, England, and Institute National Politechnique of Grenoble, France, in 1997 and 2001, respectively. Since September 2001, she has been with the Royal Institute of Technology (KTH), Stockholm, Sweden, where she is a senior researcher in radio and mixed-signal systems group. Her research interests include data conversion techniques for wireless communications and the design of low-voltage low-power analog and mixed-signal ICs. Ana Rusu has authored or coauthored five books (published in Romanian language) and more than 40 papers in international conference proceedings and journals. Alexey Borodenkov received his B.Sc. degree in computer science and engineering from St. Petersburg Electrotechnical University, Russia in 2002 and M.Sc. degree in electrical engineering from Royal Institute of Technology (KTH), Stockholm, Sweden in 2004. In October 2004 he joined Samsung Electronics Co. Ltd., Gyeunggi-Do, Korea, where he is involved in the design of multi-standard transceivers for wireless communications. His current research interests include integrated-circuit development of frequency synthesizers and data converters. Mohammed Ismail received the B.S. and M.S. degrees in electronics and telecommunications engineering from Cairo University, Egypt, in 1974 and 1978 and the Ph.D. in electrical engineering from the University of Manitoba, Canada, in 1983. He is a Professor with the Department of Electrical Engineering, The Ohio State University, Columbus. Since April 2003, he is also a Professor with the Department of Microelectronics and Information Technology, Royal Institute of Technology (KTH) Stockholm, Sweden. He has over 20 years experience of R&D in the fields of analog, RF and mixed signal integrated circuits. He has held several positions in both industry and academia and has served as a corporate consultant to nearly 30 companies in the US, Europe and the Far East. His current interest lies in research involving digitally programmable/configurable fully integrated radios with focus on low voltage/low power first-pass solutions for 3G and 4G wireless handhelds. He publishes intensively in this area and has been awarded 11 patents. He has co edited and coauthored several books. He co-founded ANACAD-Egypt (now part of Mentor Graphics, Inc.) and Spirea AB, Stockholm (now Firstpass Semiconductors AB), a developer of CMOS radio and mixed signal IPs for handheld wireless applications. Dr. Ismail has been the recipient of several awards including the US National Science Foundation Presidential Young Investigator Award, the US Semiconductor Research Corp Inventor Recognition Awards in 1992 and 1993, and a Fulbright/Nokia fellowship Award in 1995. He is the founder of the International Journal of Analog Integrated Circuits and Signal Processing, Springer and serves as the Journal's Editor-In-Chief. He has served as Associate Editor for many IEEE Transactions, was on the Board of Governors of the IEEE Circuits and Systems Society and is the Founding Editor of “The Chip” a Column in The IEEE Circuits and Devices Magazine. He is a Fellow of IEEE. Hannu Tenhunen received degrees of diploma engineer in electrical engineering and computer sciences from Helsinki University of Tehnology, Helsinki, Finland, in 1982 and Ph.D. in Microelectronics from Cornell University, Ithaca, NY, U.S.A., in 1986. During 1978–1982 he was with Electron Physics Laboratory, Helsinki University of Technology, and from 1983 to 1985 at Cornell University as a Fullbright scholar. From September 1985 he has been with Tampere University of Technology, Signal Processing Laboratory, Tampere, Finland, as an associate professor. He was also a coordinator of National Microelectronics Program of Finland during 1987–1991. Since January 1992, he has been with Royal Institute of Technology (KTH) Stockholm, Sweden, where he is a professor of electronic system design. His current research interests are VLSI circuits and systems for wireless and broadband communication, and related design methodologies and prototyping techniques. He has made over 400 presentations and publications on IC technologies and VLSI systems worldwide, and has over 16 patents pending or granted.