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1.
We develop a two-dimensional model for the high electron mobility transistor (HEMT) including conduction outside the quantum well. The model uses the continuity and power balance moment equations for both inside and outside the well, with electron concentration and average energy as dependent variables, and with parameters determined by Monte Carlo simulation. We show that conduction outside the well is dominant in the "pinchoff" region and that consequently the speed advantage of the HEMT over conventional devices does not arise from high saturation velocities in the quantum well but rather from a lower access resistance as suggested by a velocity profile calculation. It is further demonstrated that several effects which are unimportant in conventional FET's are of significance in the HEMT. Among these effects are electronic heat conduction and to some extent real space transfer.  相似文献   

2.
A traveling-wave high electron mobility transistor (THEMT) is proposed. The device is unique in that it includes an integral distributed load resistor and uses a HEMT as the active device. A rigorous analysis of the device is carried out, using a small-signal equivalent circuit model for an incremental section of the device. Losses and reflected waves are not neglected, as has been done in other work. Treating the device as a four-port network, closed-form expressions for S-parameters are derived. Theoretical calculations, using equivalent circuit parameter values for a HEMT reported in the literature, show that the proposed device is capable of exponential increase in gain with device width. Power gain of more than 10 dB at 50 GHz and remarkably flat response in the frequency range 10-100 GHz are shown to be achievable for a 1-mm-wide device  相似文献   

3.
赵俐  龙北生 《半导体光电》1996,17(2):134-136
介绍了通过插入InAs层到InGaAs沟道中,改善了InAlAs/InGaAs高电子迁移率晶体管(HEMT)的性质,合适的InAs层厚度和准确的插入位置会使在300K时此结构的HEMT比普通结构的HEMT的迁移率和电子速度分别提高30%和15%。  相似文献   

4.
Circuit simulation models for the high electron mobility transistor   总被引:1,自引:0,他引:1  
A three-terminal model is formulated for the high electron mobility transistor (HEMT) using charge-voltage relationships derived from the Boltzmann transport. Emphasis is placed on modeling the current transport of the two-dimensional electron gas (TEG) and the capacitance of the embedded parasitic MESFET structure. Furthermore, a distributed circuit topology is used to better model high-frequency effects, such as the transit time delay, in both small-signal and large-signal-transient analysis. The HEMT model is implemented in the circuit simulation program HP-SPICE. Both dc and ac simulation results are discussed.  相似文献   

5.
《Solid-state electronics》1987,30(11):1197-1203
A two-dimensional numerical drift-diffusion model for the High Electron Mobility Transistor (HEMT) is presented. Special attention is paid to the modeling of the current flow over the heterojunction. A finite difference scheme is used to solve the equations, and a variable mesh spacing was implemented to cope with the strong variations of functions near the heterojunction. Simulation results are compared to experimental data for a 0.7 μm gate length device. Small-signal transconductances and cut-off frequency obtained from the 2-D model agree well with the experimental values from S-parameter measurements. It is shown that the numerical models give good insight into device behaviour, including important parasitic effects such as electron injection into the bulk GaAs.  相似文献   

6.
Quarter-micron gate length high electron mobility transistors have been fabricated using an electron-beam direct-writing technique. A maximum stable gain of 10 dB at 18 GHz has been measured at room temperature. A room-temperature cutoff frequency fT as high as 45 GHz has also been obtained.  相似文献   

7.
A microwave power high electron mobility transistor (HEMT) has been developed and tested in theK-band frequency range. The HEMT has a unique configuration of a selectively low-doped (AlGa)As/GaAs/(AlGa)As double heterojunction resulting in both capability of high-current density and high gate breakdown voltage. The structure showed electron mobility of 6800 cm2/V.s and two-dimensional (2-D) electron density as high as 1.2 × 1012cm-2at room temperature. An output power of 660 mW (550 mW/mm) with 3.2-dB gain and 19.3-percent power added efficiency was achieved at 20 GHz with 1-µm gate length and 1.2-mm gate periphery. A similar device with 2.4-mm gate width produced an output power of 1 W with 3-dB gain and 15.5-percent efficiency. These results offer microwave high power capability in a double-heterojunction HEMT (DH-HEMT).  相似文献   

8.
A model to explain the noise properties for AlGaAs/GaAs HEMT's, AlGaAs/InGaAs/GaAs pseudomorphic HEMT's (P-HEMT's) and GaAs/AlGaAs inverted HEMT's (I-HEMT's) is presented. The model Is based on a self-consistent solution of Schrodinger and Poisson's equations. The influence of the drain-source current, frequency and device parameters on the minimum noise figure Fmin and minimum noise temperature Tmin, for different HEMT structures are presented. The study shows that P-HEMT's have a better noise performance than the normal and inverted HEMT's. The present model predicts that a long gate P-HEMT device will exhibit a better noise performance than a conventional HEMT. There is a range of doped epilayer thickness where minimum noise figure is a minimum for pseudomorphic HEMT's which is not observed in conventional and inverted HEMT's. The calculated noise properties are compared with experimental data and the results show excellent agreement for all devices  相似文献   

9.
简要介绍毫米波频率合成器的重要性,分析两种毫米波频率合成器实现方案的优劣,综合其优点,并采用直接数字频率合成(DDS)技术,提出毫米波频率合成器的设计方案。进行方案系统实验,结果表明,相位噪声为-85dBc/Hz@10kHz,提升了整个毫米波通信系统的性能。  相似文献   

10.
Thermal noise in HEMT devices is evaluated for arbitrary drain voltages including saturation. The results closely resemble those for MOSFETS. The consequences of hot electron effects are indicated, and the effects due to feedback via the series resistance Rs on the source side of the channel are evaluated. For very short channels the noise resistance Rn can be relatively large because the transconductance gmax at saturation is so much smaller than the drain conductance gd0 at zero drain bias.  相似文献   

11.
The I-V characteristics of MBE-grown AlGaAs/GaAs high electron mobility transistors (HEMT's) are studied using a bias and temperature sequence between 77 and 300 K to control trap occupancy. Low-temperature threshold voltage, transconductance, and saturation current are found to be either increased or decreased significantly relative to their 300 K values depending on the gate bias condition during cool down. This behavior is shown to be caused by variations in trap occupancy in the highly doped AlGaAs layer.  相似文献   

12.
We develop a model for the high electron mobility transistor (HEMT) in which we include both hot-electron effects and conduction outside the quantum subband system using hydrodynamic-like transport equations. With such a model we can assess the significance of the various physical phenomena involved in the operation of the HEMT. We calculate results with a two-dimensional numerical technique for both steady-state and transient operation. For a 3-µm device at 77 K, we determine a transconductance of 450 mS/mm, a current-switching speed of 6 ps, and a capacitive charging speed of 4 ps/fanout gate which corresponds to the performance measured by other workers. We also see that electronic heating, velocity overshoot, and conduction outside the quantum well are significant near the pinchoff point. We conclude that the advantage of HEMT is twofold. The excellent conduction in the quantum well results in a low access resistance, and the low impurity concentration in the GaAs results in optimum overshoot effects.  相似文献   

13.
A 1-kbit static RAM with enhancement and depletion-mode devices was designed and fabricated using the high electron mobility transistor (HEMT) technology. The RAM circuit was optimized to achieve ultra-high-speed performance. A subnanosecond address access time of 0.6 ns was measured at room temperature for a total power dissipation of 450 mW. The minimum WRITE-ENABLE pulse width required to change the state of memory cell is less than 2 ns on probe testing. The best chip has 3 bits that failed to function, which corresponds to a bit yield of 99.7 percent. According to the simulation, variations of the threshold voltage inside the memory cell greatly reduce its stable functional range. High-speed operation requires more uniform threshold voltage control to achieve fully operational LSI memory circuits.  相似文献   

14.
In this paper, the effect of a body contact (BC) to quench breakdown effects and increase the breakdown voltage in high-electron mobility transistors (HEMTs) is theoretically investigated. The body contact is formed by a highly p-type doped substrate connected to an ohmic back contact. By means of a two-dimensional (2-D) self consistent Monte Carlo simulator we show that the BC prevents holes generated by impact ionization (II) from accumulating in the channel and in the buffer, thus inhibiting the parasitic bipolar effect (PBE). This improves the breakdown behavior and extends the range of the usable drain voltages  相似文献   

15.
Photoluminescence (PL) has been used for some time the evaluation of pseudomorphic high electron mobility transistor material structures. Among the results routinely obtained from these structures are estimates of electron sheet density in the InGaAs channel, either from empirical relationships or from first principles (from direct observation of the Fermi level). We present a semiempirical line shape model for the study of PL line shapes at low temperatures. We show that the primary source of error for optical measurement of the sheet density is in the filling of the channel by electrons injected by the incident laser. We also demonstrate the potential for extraction of structural parameters such as channel composition and thickness from careful observation of variations in PL transition energies.  相似文献   

16.
The induced-gate thermal noise in high electron mobility transistors (HEMTs) is evaluated by a very general schematic and the minimum noise figure Fmin?1 due to thermal noise is calculated over a wide frequency range. The results are applied to the conductance g(V) per unit length proposed by Delagebeaudeuf and Linh, and the effects of hot electrons in very short channels are indicated. The measurements of Fmin by Delagebeaudeuf and Linh can be explained by taking the hot electrons effect into account. The possibility that a somewhat different expression for g(V) may be needed is left open and is easily incorporated in the general schematic of the discussion.  相似文献   

17.
The noise properties of high electron mobility transistors   总被引:1,自引:0,他引:1  
A simple analytic model for the HEMT, based on the Pucel theory for MESFET's, is developed which can be used to calculate the noise properties of the transistor. Good agreement between calculation and experiment is found. The dependence of noise temperature on gate length and channel thickness is presented.  相似文献   

18.
We present a theoretical model of an AlGaN-GaN high electron mobility field effect transistor (HEMT) that includes a nonlinear model of the strain polarization fields produced at the heterointerface. Recent experimental work has indicated that the macroscopic polarization in III-nitride alloys is a nonlinear function of the material composition. It is well known that the behavior of a GaN-AlGaN HEMT depends greatly upon the properties of the strain-induced polarization fields formed at the GaN-AlGaN heterointerface. It is the purpose of this paper to provide a detailed model of a GaN-AlGaN HEMT that includes a nonlinear formulation of the polarization. The model is found to agree well with recent experimental measurements made for GaN-AlGaN HEMTs when the nonlinear polarization model is included. The cutoff frequency, transconductance, and current-voltage characteristics are computed. The effect of the nonlinear polarization model on the sheet carrier density is also presented.  相似文献   

19.
20.
A high-electron mobility transistor (HEMT) 4.1 K-gate array has been developed, using a selective dry etching process and a MBE (molecular-beam epitaxy) growth technology. The circuit design uses direct-coupled FET logic (DCFL). The chip contains 4096 NOR gates, each with a 0.8-μm gate length, and measures 6.3 mm×4.8 mm. A basic gate delay of 40 ps has been achieved. A 16×16-bit parallel multiplier, used to test this array, has a multiplication time of 4.1 ns at 300 K, where the power dissipation is 6.2 W  相似文献   

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