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1.
通过对电子元器件破坏性物理分析(DPA)试验中发现的混合电路中塑封器件检查、X射线检查密封宽度判据、剪切强度判据和半导体二极管芯片目检等问题进行分析、探讨,加强对DPA试验评价电子元器件固有可靠性机理的认识,以实现恰当、灵活运用标准开展DPA工作。  相似文献   

2.
李巍  宋玉玺  童亮 《半导体技术》2014,(4):305-308,314
介绍了塑封器件的优缺点以及发展情况,针对塑封半导体器件本身在材料、结构和工艺等方面的特点,对塑封器件的失效模式和在试验中暴露的问题进行探讨,针对塑封器件的温度适应性、密封性、工艺控制及使用长期可靠性方面制定了相应的质量评价方案。半导体塑封器件通过质量评价方案的试验项目,包括筛选试验、可靠性鉴定试验和破坏性物理分析(DPA)三方面的试验,降低了塑封器件在应用中的风险,对我国高可靠领域中对塑封器件的选用具有一定的借鉴意义。  相似文献   

3.
塑封微电子器件失效机理研究进展   总被引:2,自引:0,他引:2  
李新  周毅  孙承松 《半导体技术》2008,33(2):98-101
塑封器件在现在的封装产业中具有无可比拟的优势,相关研究引起了人们广泛关注.简要介绍了塑封微电子器件的发展史,以及国内外塑封器件可靠性的研究现状.对塑封器件的主要失效机理研究进展进行深入探讨,如腐蚀、分层、开裂等,提出了几种提高塑封器件可靠性的措施.论述了用于塑封器件质量评估的试验方法,并展望了塑封器件在军工领域的潜在应用前景.  相似文献   

4.
在塑封半导体器件内部裂纹、空洞和分层缺陷的检测中,同样的样品不同单位、不同试验人员总会出现一些器件检测结果不一致的情况。为研究导致检测结果不一致的原因,通过对超声扫描检测技术原理和适用判据标准的阐述,对不同设备的比对验证以及对塑封器件材料的吸湿影响试验和分析,探讨了塑封器件分层检测不合格和不一致的原因,为同行业者提供借鉴和参考。  相似文献   

5.
黄炜  付晓君  徐青 《微电子学》2017,47(4):590-592
在电子元器件封装领域中,塑封器件正逐步替代气密性封装器件。目前工业级塑封器件已不能满足器件的高可靠性要求,工业级塑封器件在严酷的环境应力试验中经常出现失效。研究了工业级塑封器件在可靠性筛选试验中出现失效的问题,通过X射线观察和芯片切面分析等方法,查明了造成器件失效的原因,并提出了优化改进措施。  相似文献   

6.
《电子与封装》2017,(1):10-14
铜线替代传统的金线键合已经成为半导体封装工艺发展的必然趋势,因其材料和制造工艺的特点,其破坏性物理分析方法不同于金线或铝线键合的器件。提出铜丝键合塑封器件破坏性物理分析的步骤及判据参照标准,讨论了器件激光开封技术的工艺步骤和参数值以及键合强度测试判据和典型断裂模式,以解决铜线键合塑封器件的破坏性物理分析问题。  相似文献   

7.
王旭亮 《电子器件》2020,43(1):39-45
超声扫描检测因为其灵敏度高、对样品没有损伤的特点,被广泛地应用到塑封器件的筛选和检测中,但是目前不存在一个完整的超声扫描检测方法。对塑封器件缺陷进行分析,提出一种塑封器件缺陷的超声扫描检测方法。该方法采用A扫描与C扫描检测塑封器件内部的缺陷,其过程为塑封体缺陷检测与重要界面缺陷检测。与现有GJB 4027A要求的聚焦6个重要界面的检测方法相比,本方法只需要聚焦两个界面即可观察到6个界面的情况,可以提升检测效率。  相似文献   

8.
军用塑封器件失效机理研究和试验流程   总被引:1,自引:0,他引:1  
由于其结构和材料等因素,侵蚀、"爆米花"效应和易受温度形变是塑封器件常见的失效机理,在其装入整机之前必须经过严格的可靠性评价或筛选以降低风险。推荐了一套优化的塑封器件试验流程,试验评价流程组合包括无损的外目检、X射线检查、声学扫描显微镜检查,以及具有破坏性的DPA、寿命试验和耐潮性项目。该试验评价程序针对主要的失效机理,充分考虑了塑封器件的批质量一致性、高温下的器件寿命和耐潮性,可以作为军用塑封器件的主要评价手段。  相似文献   

9.
由于技术进步的需要,航天器不可避免地遇到了选用不到高等级器件、而只能选用商用塑封器件的情况,商用塑封器件的质量保证方法是国内外宇航机构研究的热点问题。在分析商用塑封器件设计、生产特点的基础上,针对其特有的失效模式,给出了商用塑封器件的质量保证方法,为航天器应用商用塑封器件提供借鉴和指导。  相似文献   

10.
随着塑封器件在武器系统中的使用越来越广泛,塑封器件在使用中也暴露出了一些问题,如塑封器件易打磨、翻新,内部易进入水汽产生爆米花效应或内部界面分层等。作者总结近几年塑封器件DPA试验中出现的各种失效,重点对塑封器件内部界面分层以及分层产生的原因、危害进行了论述。同时,论述了声学扫描显微镜检查对内部界面分层的辨别、原理及其相关试验标准等,提出了塑封器件在型号产品中的使用建议。  相似文献   

11.
塑封集成电路离层对可靠性的影响及解决方法   总被引:2,自引:2,他引:0  
塑封集成电路因其是非气密性封装,封装材料热膨胀系数的不同以及被粘接材料表面能低,是造成塑封电路离层或开裂的内部原因。通过选择特殊的封装材料(特别是框架材料)和工艺可以解决离层或开裂问题,大大提高塑封集成电路的稳定性和可靠性。水汽是造成塑封集成电路离层或开裂的外部原因,可以通过驱除和防潮措施来解决。要提升塑封集成电路可靠性,必须从技术和工艺上解决塑封电路离层或开裂问题。我们在这方面做了有益的尝试,取得了良好的效果,为拓展塑封集成电路的应用领域创造了条件。  相似文献   

12.
基于封装工艺识别翻新塑封集成电路   总被引:1,自引:0,他引:1  
塑封集成电路在高可靠性领域应用越来越广泛,国内已有相当数量的塑封集成电路应用于国防领域。但是,目前大部分关键塑封集成电路依赖进口,采购渠道不是很通畅,市场中存在大量的翻新件。文章基于塑封集成电路封装工艺,简要介绍如何识别翻新塑封集成电路。  相似文献   

13.
Improper storage is one factor than can precipitate failures in electronic products, especially in a hostile environment. In this case study, failures were observed in the propulsion logic modules on trains that were stored in Taiwan for nearly 3 years.Failure analysis was conducted to identify the root cause of IC failures. External inspection showed that contaminants were deposited on the external lead frames. The failure modes in the ceramic packages were observed to be open metallization, although both visual inspection and scanning electron microscopy revealed no trace of corrosion or damage to the die surface. Internal inspection of the plastic dual-in-line packages (P-DIP)s revealed damage to the metallization and glassivation on the die surfaces, and contaminants were found at the failure sites. The major failure mechanism was ionic corrosion, probably caused by high humidity as well as the presence of contaminants in the storage environment or from the device themselves.  相似文献   

14.
Barrier layers for Cu ULSI metallization   总被引:1,自引:0,他引:1  
Barrier layers are integral parts of many metal interconnect systems. In this paper we review the current status of barrier layers for copper metallization for ultra-large-scale-integration (ULSI) technology for integrated circuits (ICs) manufacturing. The role of barrier layers is reviewed and the criteria that determine the process window, i.e. the optimum barrier thickness and the deposition processes, for their manufacturing are discussed. Various deposition methods are presented: physical vapor deposition (PVD), chemical vapor deposition (CVD), electrochemical deposition (ECD), electroless deposition (ELD), and atomic layer CVD (ALCVD) for barrier layers implementation. The barrier integration methods and the interaction between the barrier and the copper metallization are presented and discussed. Finally, the common inspection and metrology for barrier layer are critically reviewed.  相似文献   

15.
对多批不同束源的LEC SI-GaAs进行了15K及变温、变激发光强的光致发光PL测量,并对不同PL峰值能量下PL强度随样品位置的变化进行了一维线性扫描和二维空间扫描。对三个能谱区的分析和讨论表明,PL测量可作为高性能微波GaAs FET及GaAs IC用衬底的无损评价方法。  相似文献   

16.
A highly accelerated humidity test for plastic encapsulated IC reliability short-term evaluation has been studied. 2-Vessel pressure cooker test (PCT) equipment capable of controlling relative humidity and temperature independently, and of keeping specimens free from water droplet condensation, has been designed. This equipment consists of a test chamber and a vapor chamber. Humidity conditions are set by controlling the temperature difference between the test chamber and the vapor chamber. Humidity levels are controlled with the direct pressure adjustment. The whole test chamber is heated in an oven, thereby obtaining temperature stability and uniformity. Using this equipment, humidity tests were carried out on plastic molded ICs. As a result, good test reproducibility and excellent correlation in test results between PCT and conventional humidity test such as 85°C/85%RH, were obtained. As a consequence, it was found possible, in a short time, to evaluate plastic molded IC reliability quantitatively in humidity ambients using this 2-vessel PCT equipment. This equipment can be used for quality assurance testing of plastic-encapsulated ICs in a short time.  相似文献   

17.
Analytic approaches of thermal stress in plastic-encapslated ICs reliability have been studied using a simple, 2-dimensional model of the cross section of ICs by the finite-element method. To test the validity of the model, the actual stress within the silicon chip was measured using piezoresistive devices. The calculated stress in the silicon chip agreed with the experimental values. The stress distributions were changed by lead-frame properties. Package cracking, and delamination between the molding plastic and the lead-frame were qualitatively explained. We estimated the effect of the plastic properties on stress quantitatively. Furthermore, to test the validity of this model, the temperature change at the silicon chip was measured using the Vf temperature dependency of a diode. The calculated temperature change at the silicon chip agreed with the observed values. A very high temperature gradient was observed near the surface of the plastic immediately after solder dipping. The non-uniform temperature distributions produced different thermal stress distributions than those observed in the steady-state. This result indicated that rapid thermal shock could delaminate the plastic from the lead-frame. We believe that these results can guide the development of an optimum low-stress plastic.  相似文献   

18.
Plastic encapsulation is now a highly reliable method of packaging microelectronics and can be significantly more reliable than military specified “hermetic components” in field deployments of electronics in humid tropical climates. MIL883 hermeticity is an inadequate safeguard against penetration by high levels of moisture in the atmosphere. In this new work, tropical climates are analysed and shown to be significantly more severe than those safeguarded by current MIL883 standards. Field failure returns have revealed that MIL 883 hermetic CerDIP (ceramic dual-in-line) packaged ICs installed in digital switching systems failed catastrophically with a failure rate of 1755 FITs. The cause of failure was severe ingress of moisture, resulting in dewpoints up to 30°C. Alternative indigenous developments of modular digital switches for widespread rural use in India have incorporated plastic encapsulated components selected according to the criteria developed from earlier extensive and successful reliability work by British Telecommunications (BT). Such criteria include the use of HAST (highly accelerated stress technique, invented at BT Labs). The BT Labs pioneering work demonstrated that commercial transfer-moulded epoxy packaged devices from certain sources were more reliable than their hermetic counterparts.Evidence from other published pioneering work has confirmed that plastic packaging now endures as a high reliability method of packaging microelectronics. Such pioneering work is also reviewed in this paper. In the USA, the IEEE Gel Task Force followed the earlier BT Laboratories initiative and concluded that silicone gels are indeed suitable for high reliability applications. AT&T undertook comprehensive materials analyses to show that silicone gels possess remarkably useful properties to safeguard high reliability integrated circuits. CALCE, University of Maryland, conducted studies of simple logic circuits and showed that the achieved reliability in temperature climatic conditions is three times greater than that predicted for military parts. BT Labs continued its work and extended its applicability to optoelectronics. Analyses of MCM applications for satellites by the author also show that plastics are a preferred option. The evidence is that plastic encapsulation is now a very reliable and cost-effective option.  相似文献   

19.
我国塑料管业的增长率位居世界首位,2018年,我国塑料管道产量突破1600万吨大关,随着我国经济的增长,塑料管道的产量仍有较大的上升空间。但国内对管道的缺陷检测一直比较落后,本文针对管道内部检测的难题设计了管道检测实时反馈的伺服控制系统。从而提高管道生产检测过程中的效率和检测质量,扩大管道检测在工业生产中的范围。  相似文献   

20.
The effect of ionizing radiation on the characteristics of silicon-germanium microwave ICs has been experimentally studied. Radiation tolerance criteria have been established and absolute tolerance levels of the SiGe ICs to dose and pulse ionizing radiation have been determined. Comparative analysis of the tolerance factors of the microwave ICs fabricated using different technologies is made.  相似文献   

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