Broad-band MMICs based on modified loss-compensation method using 0.35-/spl mu/m SiGe BiCMOS technology

Using the concept of loss compensation, novel broad-band monolithic microwave integrated circuits (MMICs), including an amplifier and an analog multiplier/mixer, with LC ladder matching networks in a commercial 0.35-mum SiGe BiCMOS technology are demonstrated for the first time. An HBT two-stage cascade single-stage distributed amplifier (2-CSSDA) using the modified loss-compensation technique is presented. It demonstrates a small-signal gain of better than 15 dB from dc to 28 GHz (gain-bandwidth product=157 GHz) with a low power consumption of 48 mW and a miniature chip size of 0.63 mm² including testing pads. The gain-bandwidth product of the modified loss-compensated CSSDA is improved approximately 68% compared with the conventional attenuation-compensation technique. The wide-band amplifier achieves a high gain-bandwidth product with the lowest power consumption and smallest chip size. The broad-band mixer designed using a Gilbert cell with the modified loss-compensation technique achieves a measured power conversion gain of 19 dB with a 3-dB bandwidth from 0.1 to 23 GHz, which is the highest gain-bandwidth product of operation among previously reported MMIC mixers. As an analog multiplier, the measured sensitivity is better than 3000 V/W from 0.1 to 25 GHz, and the measured low-frequency noise floor and corner frequency can be estimated to be 20 nV/sqrt(Hz) and 1.2 kHz, respectively. The mixer performance represents state-of-the-art result of the MMIC broad-band mixers using commercial silicon-based technologies     

Monolithic SiGe Up‐/Down‐Conversion Mixers with Active Baluns

The purpose of this paper is to describe the implementation of monolithically matching circuits, interface circuits, and RF core circuits to the same substrate. We designed and fabricated on‐chip 1 to 6 GHz up‐conversion and 1 to 8 GHz down‐conversion mixers using a 0.8 µm SiGe hetero‐junction bipolar transistor (HBT) process technology. To fabricate a SiGe HBT, we used a reduced pressure chemical vapor deposition (RPCVD) system to grow a base epitaxial layer, and we adopted local oxidation of silicon (LOCOS) isolation to separate the device terminals. An up‐conversion mixer was implemented on‐chip using an intermediate frequency (IF) matching circuit, local oscillator (LO)/radio frequency (RF) wideband matching circuits, LO/IF input balun circuits, and an RF output balun circuit. The measured results of the fabricated up‐conversion mixer show a positive power conversion gain from 1 to 6 GHz and a bandwidth of about 4.5 GHz. Also, the down‐conversion mixer was implemented on‐chip using LO/RF wideband matching circuits, LO/RF input balun circuits, and an IF output balun circuit. The measured results of the fabricated down‐conversion mixer show a positive power conversion gain from 1 to 8 GHz and a bandwidth of about 4.5 GHz.     

A SiGe HBT Translinear Harmonic Mixer

A novel even-order harmonic mixer is proposed. Based on the translinear loop of BJT/HBTs, frequency doubling and single-to-differential conversion circuits have been employed in the design of harmonic mixer. The proposed mixer has been verified in a SiGe HBT process by SpectreRF simulations.     

基于SiGe HBT工艺的GNSS接收机混频器设计

针对目前国内RFIC发展比较滞后的现状,设计了3款应用于GNSS接收机的基于0．5μm SiGe HBT工艺的混频器（Ⅰ、Ⅱ、Ⅲ）,并采用针对混频器的优良指数FOM（figure—of-merit）对这3个混频器进行结构和综合性能比较。3款混频器的供电电压为3-3V,本振LO输入功率为-10dBm,其消耗总电流、转换增益、噪声系数、1dB增益压缩点依次为：Ⅰ）8．7mA,15dB,4．1dB,-17dBm;Ⅱ）8．4mA,10dB,4．6dB,-10dBm;Ⅲ）5．4mA,11dB,4．9dB,-10dBm。而3款混频器的FOM分别为-57．8、-56．6、-54．3,表明混频器Ⅲ的综合性能最佳,混频器Ⅱ次之,最后为混频器Ⅰ。     

A 210 GHz Dual-Gate FET Mixer MMIC With ${>}$2 dB Conversion Gain, High LO-to-RF Isolation, and Low LO-Drive Requirements

We demonstrate the first active mixer monolithic microwave integrated circuit (MMIC) with positive conversion gain beyond 200 GHz. The presented dual-gate topology is realized in a 100 nm gate length metamorphic high electron mobility transistor technology. Without any pre- or post-amplification, the down-conversion mixer achieves $>$ 2 dB conversion gain and $>$16 dB local oscillation to radio frequency (LO-to-RF) isolation at 210 GHz, outperforming state-of-the-art resistive MMIC mixers. The conversion gain becomes positive for LO power levels larger than 0 dBm, making the mixer suitable for being driven by an MMIC-based frequency doubler. A comparison to state-of-the-art G-band mixers is given.      

Structural parameters improvement of an integrated HBT in a cascode configuration opto-electronic mixer

We analyze an integrated electrically pumped opto-electronic mixer, which consists of two InP/GaInAs hetero junction bipolar transistors(HBT), in a cascode configuration. A new HBT with modified physical structure is proposed and simulated to improve the frequency characteristics of a cascode mixer. For the verification and calibrating software simulator, we compare the simulation results of a typical HBT, before modifying it and comparing it with empirical reported experiments. Then we examine the simulator on our modified proposed HBT to prove its wider frequency characteristics with better flatness and acceptable down conversion gain. Although the idea is examined in several GHz modulation, it may easily be extended to state of the art HBT cascode mixers in much higher frequency range.     

A 1-17-GHz InGaP-GaAs HBT MMIC analog multiplier and mixer with broad-band input-matching networks

An InGaP-GaAs heterojunction bipolar transistor (HBT) analog multiplier/mixer monolithic microwave integrated circuit (MMIC) is developed that adopts a Gilbert-cell multiplier with broad-band input-matching networks to widen the bandwidth up to 17 GHz. This MMIC was fabricated using a commercially available 6-in InGaP-GaAs HBT MMIC process. It achieved a measured sensitivity of above 1100 V/W for an analog multiplier and a conversion gain of better than 9 dB for a mixer. It also demonstrated a lower corner frequency and noise than that of an InP HBT analog multiplier. The measured low-frequency noise was 10 nV/sqrt(Hz), which is about half of that of an InP HBT analog multiplier with a similar architecture. The corner frequency of the low-frequency noise was roughly estimated to be 15 kHz. The measured performance of this MMIC chip with gain-bandwidth-product (GBP) of 47 GHz rivals that of the reported GaAs-based analog multipliers and mixers. The high GBP result achieved by this chip is attributed to the HBT device performance and the broad-band input-matching network.     

A low-power oscillator mixer in 0.18-/spl mu/m CMOS technology

A downconversion double-balanced oscillator mixer using 0.18-/spl mu/m CMOS technology is proposed in this paper. This oscillator mixer consists of an individual mixer stacked on a voltage-controlled oscillator (VCO). The stacked structure allows entire mixer current to be reused by the VCO cross-coupled pair to reduce the total current consumption of the individual VCO and mixer. Using individual supply voltages and eliminating the tail current source, the stacked topology requires 1.0-V low supply voltage. The oscillator mixer achieves a voltage conversion gain of 10.9 dB at 4.2-GHz RF frequency. The oscillator mixer exhibits a tuning range of 11.5% and a single-sideband noise figure of 14.5 dB. The dc power consumption is 0.2 mW for the mixer and 2.94 mW for the VCO. This oscillator mixer requires a lower supply voltage and achieves a higher operating frequency among recently reported Si-based self-oscillating mixers and mixer oscillators. The mixer in this oscillator mixer also achieves a low power consumption compared with recently reported low-power mixers.     

Current-reuse bleeding mixer

A novel mixer topology is proposed. The proposed mixer bleeds the driver stage current using a current source, the current source being used as part of the driver stage. A design example is given of a 900 MHz down-conversion mixer using a 0.35 μm CMOS process. Comparison with conventional mixers shows that the topology leads to better performance in terms of conversion gain, linearity, noise figure, and LO isolation     

A 77 GHz SiGe sub-harmonic balanced mixer

A novel SiGe 77 GHz sub-harmonic balanced mixer is presented with a goal to push the technology to its limit [SiGe2-RF transistor (f/sub T/=80 GHz)]. This new topology uses a compact input network not only to achieve high isolation between the LO and RF ports, but also to result in excellent 2LO-RF isolation. The measured results demonstrate a conversion gain of 0.7 dB at 77 GHz with an LO power of 10 dBm at 38 GHz, LO-RF isolation better than 30 dB, 2LO-RF isolation of 25 dB, and a P/sub 1dB/ of -8 dBm. The mixer core consumes 4.4 mA at 5 V. The circuit demonstrates that SiGe sub-harmonic mixers have comparable performance with GaAs designs, at a fraction of the cost.     

GaInP/GaAs HBT Sub-Harmonic Gilbert Mixers Using Stacked-LO and Leveled-LO Topologies

This paper discusses and demonstrates the most popular sub-harmonic Gilbert mixers in 2-mum GaInP/GaAs HBT technology. High two local oscillators (2LO)-to-RF isolation is important to alleviate the self-mixing problem of the sub-harmonic mixer. The demonstrated GaInP/GaAs HBT stacked-local oscillator (LO) mixer topology has achieved the best 2LO-to-RF isolation when compared with the previous literature. On the other hand, the leveled-LO sub-harmonic mixers have advantages in terms of the high speed and low dc supply voltage at the cost of much larger LO pumping power. Among all the structures, the bottom-LO sub-harmonic mixer has the lowest current consumption and the simplest circuit structure at the expense of the 2LO-to-RF isolation     

Balanced Colpitt oscillator MMICs designed for ultra-low phase noise

Balanced voltage-controlled oscillator (VCO) monolithic microwave integrated circuits (MMICs) based on a coupled Colpitt topology with a fully integrated tank are presented utilizing SiGe heterojunction bipolar transistor (HBT) and InGaP/GaAs HBT technologies. Minimum phase noise is obtained for all designs by optimization of the tank circuit including the varactor, maximizing the tank amplitude, and designing the VCO for Class C operation. Fundamental and second harmonic VCOs are evaluated. A minimum phase noise of less than -112 dBc at an output power of 5.5 dBm is achieved at 100-kHz carrier offset and 6.4-GHz oscillation frequency for the fundamental InGaP/GaAs HBT VCO. The second harmonic VCO achieves a minimum measured phase noise of -120 dBc at 100 kHz at 13 GHz. To our best knowledge, this is the lowest reported phase noise to date for a varactor-based VCO with a fully integrated tank. The fundamental frequency SiGe HBT oscillator achieves a phase noise of -108 dBc at 100 kHz at 5 GHz. All MMICs are fabricated in commercial foundry MMIC processes.     

A 2.5-V 45-Gb/s decision circuit using SiGe BiCMOS logic

A 45-Gb/s BiCMOS decision circuit operating from a 2.5-V supply is reported. The full-rate retiming flip-flop operates from the lowest supply voltage of any silicon-based flip-flop demonstrated to date at this speed. MOS and SiGe heterojunction-bipolar-transistor (HBT) current-mode logic families are compared. Capitalizing on the best features of both families, a true BiCMOS logic topology is presented that allows for operation from lower supply voltages than pure HBT implementations without compromising speed. The topology, based on a BiCMOS cascode, can also be applied to a number of millimeter-wave (mm-wave) circuits. In addition to the retiming flip-flop, the decision circuit includes a broadband transimpedance preamplifier to improve sensitivity, a tuned 45-GHz clock buffer, and a 50-/spl Omega/ output driver. The first mm-wave transformer is employed along the clock path to perform single-ended-to-differential conversion. The entire circuit, which is implemented in a production 130-nm BiCMOS process with 150-GHz f/sub T/ SiGe HBT, consumes 288 mW from a 2.5-V supply, including only 58 mW from the flip-flop.     

Low-power low-noise active mixers for 5.7 and 11.2 GHz usingcommercially available SiGe HBT MMIC technology

The authors demonstrate the application of a commercially available SiGe heterojunction bipolar transistor monolithic microwave integrated circuit technology to active mixers in future communication systems at 5.7 GHz and above. This technology can be used to realise circuits with less than 50 mW power consumption, conversion gains above 15 dB and small double sideband noise figures of 3.6 and 9.4 dB for 5.7 and 11.2 GHz Gilbert cell mixer circuits, respectively     

UWB Gilbert downconverter utilising a wideband LR-CR quadrature generator

An ultra-wideband (UWB) I/Q downconverter with an LR-CR quadrature generator is demonstrated using 0.35 μm SiGe HBT technology. The I/Q outputs of this generator are always in quadrature phase at any frequency while the BJT-type active mixer inherently tolerates much LO power difference for a flat gain response. Consequently, the amplitude imbalance and phase error of the I/Q outputs are less than 1 dB and 2° in the RF frequency range 3?11 GHz.     

Extending the bandwidth performance of heterojunction bipolartransistor-based distributed amplifiers

An InAlAs-InGaAs-InP HBT CPW distributed amplifier (DA) with a 2-30 GHz 1-dB bandwidth has been demonstrated which benchmarks the widest bandwidth reported for an HBT DA. The DA combines a 100 GHz fmax and 60 GHz fT HBT technology with a cascode coplanar waveguide DA topology to achieve this record bandwidth. The cascode gain cell offers 5-7 dB more available gain (MAG) than a common-emitter, and is used to extend the amplifier's upper frequency performance. A coplanar waveguide design environment is used to simplify the modeling and fabrication, as well as to reduce the size of the amplifier. Novel active load terminations for extending the DA's lower frequency response were separately demonstrated. The active loads are capable of extending the lower bandwidth performance by two decades resulting in performance below 45 MHz. This work explores both design techniques and technology capability which can be applied to other distributively matched HBT circuits such as active baluns for mixers, active combiners/dividers, and low DC power-broadband amplifiers     

Wide-band MMIC Kowari mixer/phase shifters

A series of wide-band image-reject monolithic-microwave integrated-circuit mixer/phase shifters were designed, fabricated, and tested for operation in the microwave and millimeter-wave bands. Mixers based on diode and resistive-high electron-mobility transistor (HEMT) nonlinear elements are presented and compared in this paper. The diode-based Kowari mixers have a bandwidth of approximately 45%, with up- and down-conversion loss [RF to/from IF (in this paper, we use “IF,” “LO,” and “RF” to label the ports associated with particular signals, not necessarily to describe the nature of the signals themselves)] less than 10 dB and up-conversion output power greater than 0 dBm. At band center, the down-conversion loss is approximately 7 dB. The novel resistive-HEMT-based Kowari mixers have a measured IF-to-RF up-conversion loss of approximately 2 dB and LO-to-RF conversion loss of approximately 13 dB over 17-25.5 GHz. While both circuit types realize wide-band 360° phase shifters when appropriate control voltages are applied, the resistive-HEMT-based Kowari has better linearity and a smaller insertion loss     

InAlAs/InGaAs HBT X-band double-balanced upconverter

We report on an InAlAs/InGaAs HBT Gilbert cell double-balanced mixer which upconverts a 3 GHz IF signal to an RF frequency of 5-12 GHz. The mixer cell achieves a conversion loss of between 0.8 dB and 2.6 dB from 5 to 12 GHz. The LO-RF and IF-RF isolations are better than 30 dB at an LO drive of +5 dBm across the RF band. A pre-distortion circuit is used to increase the linear input power range of the LO port to above +5 dBm. Discrete amplifiers designed for the IF and RF frequency ports make up the complete upconverter architecture which achieves a conversion gain of 40 dB for an RF output bandwidth of 10 GHz. The upconverter chip set fabricated with InAlAs/InGaAs HBT's demonstrates the widest gain-bandwidth performance of a Gilbert cell based upconverter compared to previous GaAs and InP HBT or Si-bipolar IC's     

Even harmonic double-balanced active mixer for use in direct conversion receivers

An active double-balanced even harmonic mixer implemented in a 0.35-/spl mu/m SiGe BiCMOS process is described. The effect of local oscillator wave shape and duty cycle on conversion gain are examined. Measured data for an even harmonic mixer is compared to a conventional Gilbert cell mixer and applications to the front-end of a direct conversion receiver are described.     

An Si-SiGe BiCMOS direct-conversion mixer with second-order and third-order nonlinearity cancellation for WCDMA applications

This paper presents a general analysis of the third-order nonlinearity of a differential common-emitter RF amplifier and an improved technique to cancel the third-order nonlinearity. A thorough analysis of the mechanisms leading to the second-order nonlinearity of bipolar double-balanced active mixers is also presented. An SiGe BiCMOS WCDMA direct-conversion mixer is designed based on the third- and the second-order cancellation schemes. The mixer achieves +6-dBm third-order input intercept point, +49-dBm second-order input intercept point, 16-dB gain and 7.2-dB double-sideband noise figure with only 2.2-mA current at 2.1 GHz.