A high-efficiency CMOS image sensor with air gap in situ MicroLens (AGML) fabricated by 0.18-/spl mu/m CMOS technology

The air gap in situ microlens (AGML) above-pixel sensor with 0.18-/spl mu/m CMOS image sensor technology has been successfully developed to dramatically improve the optical crosstalk and pixel sensitivity. We demonstrated excellent crosstalk diminution with the structure on small pixels. Compared with conventional 2.8 /spl mu/m square pixel, adopting the AGML can reduce the optical crosstalk up to 64%, and provide 21% in enhancement of photosensitivity at 0/spl deg/ incident angle. Furthermore, under 20/spl deg/ incident angle the optical crosstalk reduction and sensitivity enhancement are increased to 89% and 122%, respectively. Therefore, the AGML structure makes pixel size be further scaled down to less than 2.8 /spl mu/m square and maintain good performance.     

Dramatic reduction of optical crosstalk in deep-submicrometer CMOS imager with air gap guard ring

A dielectric structure, air gap guard ring, has been successfully developed to reduce optical crosstalk thus improving pixel sensitivity of CMOS image sensor with 0.18-/spl mu/m technology. Based on refraction index (RI) differences between dielectric films (RI = 1.4 /spl sim/ 1.6) and air gap (RI = 1), total internal reflection occurred at dielectric-film/air-gap interface, thus the incident light is concentrated in selected pixel. Excellent optical performances have been demonstrated in 3.0 /spl times/ 3.0 /spl mu/m pixel. Optical spatial crosstalk achieves 80% reduction at 20/spl deg/ incidence angle and significantly alleviates the pixel sensitivity degradation with larger angle of incident light.     

Light guide for pixel crosstalk improvement in deep submicron CMOS image sensor

Light guide, a novel dielectric structure consisting of PE-Oxide and FSG-Oxide, has been developed to reduce crosstalk in 0.18-/spl mu/m CMOS image sensor technology. Due to the difference in refraction index (1.46 for PE-Oxide and 1.435 for FSG-Oxide), major part of the incident light can be totally reflected at the interface of PE-Oxide/FSG-Oxide, as the incidence angle is larger than total reflection angle. With this light guide, the pixel sensing capability can be enhanced and to reduce pixel crosstalk. Small pixels with pitch 3.0-/spl mu/m and 4.0-/spl mu/m have been characterized and examined. In 3.0-/spl mu/m pixel, optical crosstalk achieves 30% reduction for incidence angle of light at 10/spl deg/.     

Color mixing improvement of CMOS image sensor with air-gap-guard ring in deep-submicrometer CMOS technology

In this letter, color mixings of a CMOS image sensor with air-gap-guard-ring (AGGR) and conventional structures were investigated in 0.18-/spl mu/m CMOS image sensor technology. As the light incident angle is increased from 0/spl deg/ to 15/spl deg/, conventional pixel shows serious color mixing. For example, the maximum photo responses of blue, green1, green2, and red pixels are shifted from 490 to 520 nm, 530 to 500 nm, 530 to 600 nm, and 600 to 580 nm, respectively. However, pixels with AGGR not only keep correct spectral response without peak shift but also achieve 5%-50% crosstalk reduction, thus preventing the sensor from color mixing efficiently.     

A 2.0-/spl mu/m pixel pitch MOS image sensor with 1.5 transistor/pixel and an amorphous Si color filter

In this paper, an ultrafine pixel size (2.0/spl times/2.0 /spl mu/m/sup 2/) MOS image sensor with very high sensitivity is developed. The key technologies that realize the MOS image sensor are a newly developed pixel circuit configuration (1.5 transistor/pixel), a fine 0.15-/spl mu/m design rule, and an amorphous Si color filter (Si-CF). In the new pixel circuit configuration, a unit pixel consists of one photodiode, one transfer transistor, and an amplifier circuit with two transistors that are shared by four neighboring pixels. Thus, the unit pixel has only 1.5 transistors. The fine design rule of 0.15 /spl mu/m enables reduction of wiring area by 40%. As a result, a high aperture ratio of 30% is achieved. A newly developed Si-CF realizes the 1/10 thickness of that of the conventional organic-pigment CF, giving rise to high light-collection efficiency. With these three technologies combined, a high sensitivity of 3400 electrons/lx/spl middot/s is achieved even with a pixel size of 2.0/spl times/2.0 /spl mu/m/sup 2/.     

Study of CMOS APS responsivity enhancement: ring-shaped photodiode

In this brief, the possibilities of complementary metal-oxide-semiconductor (CMOS) active pixel sensor (APS) spectral response improvement are discussed. Thorough submicrometer scanning results obtained from various ring-shaped pixel photodiodes with different inner radius, implemented in a standard CMOS 0.35-/spl mu/m technology, are compared with numerical computer simulations and verified analytically. The functional dependence of the pixel response on the ring opening size was discovered and formulated for various wavelengths illumination. We show that the photodiodes with a small ring-opening exhibit better sensitivity in the blue spectrum range (420-460 nm). Comparison between the simulation and measurement results shows a good agreement, hence, proving that specific photodiode designs enable to selectively improve pixel color sensitivity.     

A sensitivity and linearity improvement of a 100-dB dynamic range CMOS image sensor using a lateral overflow integration capacitor

In a CMOS image sensor featuring a lateral overflow integration capacitor in a pixel, which integrates the overflowed charges from a fully depleted photodiode during the same exposure, the sensitivity in nonsaturated signal and the linearity in saturated overflow signal have been improved by introducing a new pixel circuit and its operation. The floating diffusion capacitance of the CMOS image sensor is as small as that of a four transistors type CMOS image sensor because the lateral overflow integration capacitor is located next to the reset switch. A 1/3-inch VGA format (640/sup H//spl times/480/sup V/ pixels), 7.5/spl times/7.5 /spl mu/m/sup 2/ pixel color CMOS image sensor fabricated through 0.35-/spl mu/m two-poly three-metal CMOS process results in a 100 dB dynamic range characteristic, with improved sensitivity and linearity.     

640 /spl times/ 512 pixel long-wavelength infrared narrowband, multiband, and broadband QWIP focal plane arrays

A 640 /spl times/ 512 pixel, long-wavelength cutoff, narrowband (/spl Delta//spl lambda///spl lambda//spl sim/10%) quantum-well infrared photodetector (QWIP) focal plane array (FPA), a four-band QWIP FPA in the 4-15 /spl mu/m spectral region, and a broadband (/spl Delta//spl lambda///spl lambda/ /spl sim/ 42%) QWIP FPA having a 15.4 /spl mu/m cutoff have been demonstrated. In this paper, we discuss the electrical and optical characterization of these FPAs, and their performance. In addition, we discuss the development of a very sensitive (NEDT /spl sim/ 10.6 mK) 640 /spl times/ 512 pixel thermal imaging camera having a 9 /spl mu/m cutoff.     

Characterization and deblurring of lateral crosstalk in CMOS image sensors

Lateral crosstalk in CMOS imaging arrays deter effective utilization of small pixel sizes (e.g., < 5.0 /spl mu/m /spl times/ 5.0 /spl mu/m) now permitted by technology scaling. A simple measurement setup for empirical characterization of lateral crosstalk in CMOS image sensors is presented. A demonstration of deblurring operations based on the obtained blur model of lateral crosstalk is also provided. Several well-known linear deconvolution filters are employed in the demonstration. The tradeoffs in sharpness restoration, high-frequency noise amplification, and the intensity clipping effect in the design of linear deblurring operation for the application of lateral crosstalk are illustrated.     

A digital pixel sensor array with programmable dynamic range

This paper presents a digital pixel sensor (DPS) array employing a time domain analogue-to-digital conversion (ADC) technique featuring adaptive dynamic range and programmable pixel response. The digital pixel comprises a photodiode, a voltage comparator, and an 8-bit static memory. The conversion characteristics of the ADC are determined by an array-based digital control circuit, which linearizes the pixel response, and sets the conversion range. The ADC response is adapted to different lighting conditions by setting a single clock frequency. Dynamic range compression was also experimentally demonstrated. This clearly shows the potential of the proposed technique in overcoming the limited dynamic range typically imposed by the number of bits in a DPS. A 64 /spl times/ 64 pixel array prototype was manufactured in a 0.35-/spl mu/m, five-metal, single poly, CMOS process. Measurement results indicate a 100 dB dynamic range, a 41-s mean dark time and an average current of 1.6 /spl mu/A per DPS.     

Validation of a crosstalk correction algorithm for ASTER/SWIR

The mechanism of crosstalk phenomena in the shortwave infrared (SWIR) subsystem of the Advanced Spaceborne Thermal Emission and Reflection Radiometer, which has six bands in the wavelength region of 1.6-2.43 /spl mu/m, is investigated. It is found that light incident to band 4 is reflected at the detector and the filter boundary, and then transported to other bands by multiple reflections in the focal plane area. A crosstalk correction algorithm is developed to improve the spectral separation performance of SWIR. Parameters of the crosstalk model, i.e., the amount of stray light and its area of influence, are determined by image analysis. By careful investigation of SWIR images around peninsulas, lakes, and islands, the crosstalk model is validated. Therefore, the correction algorithm is implemented in the preprocessing of higher level data products.     

A CMOS image sensor with a double-junction active pixel

A CMOS image sensor that employs a vertically integrated double-junction photodiode structure is presented. This allows color imaging with only two filters. The sensor uses a 184*154 (near-QCIF) 6-transistor pixel array at a 9.6-/spl mu/m pitch implemented in 0.35-/spl mu/m technology. Results of the device characterization are presented. The imaging performance of an integrated two-filter color sensor is also projected, using measurements and software processing of subsampled images from the monochrome sensor with two color filters.     

Realization of multigigabit channel equalization and crosstalk cancellation integrated circuits

In this paper, we present integrated circuit solutions that enable high-speed data transmission over legacy systems such as short reach optics and electrical backplanes. These circuits compensate for the most critical signal impairments, intersymbol interference and crosstalk. The finite impulse response (FIR) filter is the cornerstone of our architecture, and in this study we present 5- and 10-Gsym/s FIR filters in 2-/spl mu/m GaAs HBTs and 0.18-/spl mu/m CMOS, respectively. The GaAs FIR filter is used in conjunction with spectrally efficient four-level pulse-amplitude modulation to demonstrate 10-Gb/s data throughput over 150 m of 500 MHz/spl middot/km multimode fiber. The same filter is also used to demonstrate equalization and crosstalk cancellation at 5 Gb/s on legacy backplane. The crosstalk canceller improves the bit error rate by five orders of magnitude. Furthermore, our CMOS FIR filter is tested and demonstrates backplane channel equalization at 10 Gb/s. Finally, building blocks for crosstalk cancellation at 10 Gb/s are implemented in a 0.18-/spl mu/m CMOS process. These circuits will enable 10-Gb/s data rates on legacy systems.     

Development of compact and low-crosstalk PLC-WDM filters for hybrid-integrated bidirectional optical transceivers

This paper reports on the development of planar-lightwave-circuit wavelength-division-multiplexing (PLC-WDM) filters based on double polynomial curve directional couplers, which will be integrated into compact and low-cost bidirectional optical transceivers for FTTx systems. Silica-based PLC-WDM filters smaller than 5 mm/spl times/100 /spl mu/m for Ethernet passive optical network (E-PON) applications were designed and fabricated to have low bidirectional crosstalk (lower than -40 dB) as well as low insertion losses (lower than 1 dB) within the operating temperatures of -40 to 80/spl deg/C. Several features and design guides that can reduce the size of directional couplers and improve the level of bidirectional crosstalk are discussed.     

A micropower centroiding vision processor

A biologically-inspired hybrid vision chip is presented for real-time object-based processing for tasks such as centroiding, sizing and counting of enclosed objects. This system presents the first silicon retina capable of centroiding and sizing multiple objects in true parallel fashion. Based on a novel distributed algorithm, this approach uses the input image to enclose a feedback loop to realize a data-driven pulsating action. The sensor provides a resolution of 48 /spl times/ 48 pixels with a 85 /spl mu/m/spl times/85 /spl mu/m pixel footprint and has been measured to consume 243 /spl mu/W at 1.8-V supply, achieving an equivalent computational efficiency of 724.64 MIPS/mW with a 500-/spl mu/s process time.     

Does TFT mobility impact pixel size in AMOLED backplanes?

Recent advances in organic light emitting diode (OLED) device efficiencies are making the amorphous silicon (a-Si) backplane a viable solution for a large range of display sizes. This paper presents the possibilities and design challenges of a-Si active-matrix organic light-emitting-diode (AMOLED) backplanes for applications ranging from small full color cell phone displays to HDTV screens. An analytical model for the minimum pixel-area, and hence the maximum resolution for both bottom and top emitting AMOLED architectures is presented in terms of the a-Si thin-film transistor (TFT) device parameters, the process design-rules, and the pixel circuit parameters. It is established that the lower device mobility of a-Si TFTs is no longer the limiting factor. For instance, in a 20' W/SXGA panel with full color red-green-blue subpixels, the state-of-the-art TFT processes yield a square pixel size of /spl sim/266 /spl mu/m. Further, quantitative analysis of charge-injection/charge-feedthrough error in the pixel, and the maximum allowable leakage current for the TFT is also presented.     

Arrays of AC-excited, silicon microdischarge devices as large as 40 000 (200/spl times/200) pixels: electrical and optical characteristics for operation in neon

Electrical characteristics of arrays of (50 /spl mu/m)/sup 2/ Si microplasma devices operating in 500-900 Torr of Ne are presented. Arrays as large as 200/spl times/200 pixels have been AC-excited at frequencies of 5-20 kHz and all exhibit reproducible ignition voltages and lifetimes. At 700 Torr, the power consumed per pixel for a 200/spl times/200 pixel array is 85/spl plusmn/2 /spl mu/W, 190/spl plusmn/2 /spl mu/W, and 290/spl plusmn/2 /spl mu/W for excitation frequencies of 5, 10, and 15 kHz, respectively, and 5.5, 12.0, and 17.8 mA, respectively, of total current (RMS) drawn by the array.     

A new CMOS pixel structure for low-dark-current and large-array-size still imager applications

A pixel structure for still CMOS imager application called the pseudoactive pixel sensor (PAPS) is proposed and analyzed in this paper. It has the advantages of a low dark current, high signal-to-noise ratio, and a high fill factor over the conventional passive pixel sensor imager or active pixel sensor imager. The readout circuit called the zero-bias column buffer-direct-injection structure is also proposed to suppress both the dark current of the photodiode and the leakage current of row switches by keeping both biases of photodiode and the parasitic p-n junction in the column bus at or near zero voltage. The improved double delta sampling circuits are also used to suppress fixed pattern noise, clock feedthrough noise, and channel charge injection. An experimental chip of the proposed PAPS CMOS imager with the format of 352/spl times/288 (CIF) has been fabricated by using a 0.25-/spl mu/m single-poly-five-level-metal (1P5M) n-well CMOS process. The pixel size is 5.8 /spl mu/m/spl times/5.8 /spl mu/m. The pixel readout speed is from 100 kHz to 10 MHz, corresponding to the maximum frame rate above 30 frames/s. The proposed still CMOS imager has a fill factor of 58%, chip size of 3660 /spl mu/m/spl times/3500 /spl mu/m, and power dissipation of 24 mW under the power supply of 3.3 V. The experimental chip has successfully demonstrated the function of the proposed new PAPS structure. It can be applied in the design of large-array-size still CMOS imager systems with a low dark current and high resolution.     

Estimation of polarization crosstalk at a micro-bend in Si-photonic wire waveguide

The singlemode Si-photonic wire waveguide allows sharp bends, which significantly expands the design flexibility of optical devices and circuits. Here, the suppression of the polarization crosstalk at a sharp bend will be an important issue, since a large crosstalk affects the performance of devices and circuits. In this study, the three-dimensional (3-D) finite-difference time-domain (FDTD) simulation showed that the crosstalk at a 90/spl deg/-bend with a radius of 0.35-1.75 /spl mu/m is less than -25 dB at a wavelength of 1.55 /spl mu/m. In the experiment, the crosstalk from TE-like to TM-like polarization was evaluated to be -13 dB to -10 dB. This large value was explained by a small tilt of waveguide sidewalls, which seriously increased the crosstalk. In addition, it was found in the calculation that some combinations of bends increase or decrease the crosstalk, and that a U-shape bend is the most effective for the suppression of the crosstalk.