电迁移引起的倒装芯片互连失效

采用倒装芯片组装菊花链器件研究了高电流密度条件下Al互连的失效问题,分析了不同电迁移条件下,由于金属原子的迁移造成的Al互连微结构的变化。在9.7×105A/cm2电流密度强度条件下,钝化窗口位置的Al原子发生电迁移,在电子风力的作用下,Al原子沿电子流方向扩散进入Al互连层下方的焊料中。同时,随着电流加载时间的延长,化学位梯度和内部应力的作用致使焊料成分向Al互连金属扩散,Al互连金属层形成空洞的同时其成分发生变化。     

铜互连电迁移失效的研究与进展

Cu/低k互连的电迁移失效与互连材料、工艺、结构和测试条件都有着密切的联系。论述了近年来铜互连电迁移可靠性的研究进展,讨论了电迁移的基本原理、失效现象及其相关机制和微效应以及主导失效的机制——界面扩散等,同时探讨了改善铜互连电迁移性能的各种方法,主要有铜合金、增加金属覆盖层及等离子体表面处理等方法,并指出了Cu互连电迁移可靠性研究有待解决的问题。     

Cu互连应力迁移失效有限元分析

为研究铜互连系统中各因素对残余应力及应力迁移失效的影响,建立了三维有限元模型,用ANSYs软件分析计算了Cu互连系统中的残余应力分布情况,并对比分析了不同结构、位置及层间介质材料的互连系统中的残余应力及应力梯度.残余应力在金属线中通孔正下方M2互连顶端最小,在通孔内部达到极大值,应力梯度在Cu M2互连顶端通孔拐角底部位置达到极大值.双通孔结构相对单通孔结构应力分布更为均匀,应力梯度更小.结果表明,空洞最易形成位置由应力和应力梯度的大小共同决定,应力极大值随通孔直径和层间介质介电常数的减小而下降,随线宽和重叠区面积的减小而上升.应力梯度随通孔直径、层间介质介电常数和重叠区面积的减小而下降,随线宽减小而上升.     

VLSI多层互连可靠性第一部分：电迁移失效（一）

一、引言电迁移是指导电材料在电流的作用下产生的物质输运现象，它是引起集成电路失效的一种重要机制。在大电流密度下，由于电迁移作用，可能出现下列导致电路失效的现象：1互连导线中形成空洞，使电阻增加。2空洞贯穿导线的横截面，使电路开路。3形成晶须造成线间或层间短路。4晶须穿破钝化层，形成腐蚀隐患。在电迁移研究中面临着许多难题，影响电迁移的因素十分复杂，其中包括金属的种类、金属股形成条件和结晶结构；金属层间介质和钝化层的种类及淀积条件；电路工作时的电流密度和环境温度；衬底表面形貌；合金效应和尺寸效应等。其次…     

电子封装微互连中的电迁移

 随着电子产品不断向微型化和多功能化发展,电子封装微互连中的电迁移问题日益突出,已成为影响产品可靠性和耐久性的重要因素.本文在回顾铝、铜及其合金互连引线中电迁移问题的基础上,对目前微电子封装领域广泛采用的倒装芯片互连焊点结构中电迁移问题的几个方面进行了阐述和评价,其中包括电流拥挤效应、焦耳热效应、极化效应、金属间化合物、多种负载交替或耦合作用下的电迁移以及电迁移寿命预测等.     

菊花链Cu/Cu3Sn/Cu互连凸点电迁移仿真研究

多物理场耦合作用下产生的电迁移现象成为影响键合结构可靠性的关键问题。建立了菊花链键合封装结构的三维有限元模型,研究了电-热-力交互作用下键合结构的温度分布、电流密度分布及应力分布。发现在连接线与凸点相连的位置容易发生电流聚集效应,从而导致此处出现温度升高及热应力增大的现象。此外,仿真分析了2～12 mV输入电压和20～100μm凸点间距对键合结构的电迁移失效的影响。发现对于20μm间距的凸点,输入电压超过8 mV时会发生电迁移失效。对于间距超过40μm的凸点,输入电压超过4 mV时会发生电迁移失效。结果表明,20μm间距的凸点电迁移可靠性高,为凸点结构设计及电迁移的实验研究提供了参考。     

VLSI多层互连可靠性第一部分 电迁移失效（二）

4．几何形状导线的几何形状一尺寸、转角数目、台阶覆盖以及同一条线上宽度的变化对电迁移特性也有重要的影响。其中尺寸的影响在前面已经讨论过了，下面就其它几个方面进行讨论。转角会使电迁移寿命减小，图14显示了MTF与转角个数关系的实验结果。实验还发现，失效多出现在转角的上游（即电子流流来的方向））1～3pm处。早期认为，这种现象是由于在转请处出现电流聚集（crow山叩），使局部电流密度加大，进而使离子流散度加大造成的。但F．Jeuland等人通过计算机模拟发现”’‘，在转角处出现的是局部冷点而不是局部热点（如因15）。这是…     

集成电路互连引线电迁移的研究进展

随着大规模集成电路的不断发展,电迁移引起的集成电路可靠性问题日益凸现.本文介绍了电迁移的基本理论,综述了集成电路互连引线电迁移的研究进展.研究表明,互连引线的尺寸、形状和微观组织结构对电迁移有重要影响;温度、电流密度、应力梯度、合金元素及工作电流模式等也对电迁移寿命有重要影响.同时指出了电迁移研究亟待解决的问题.     

直流和脉冲电镀Cu互连线的性能比较

针对先进纳米Cu互连技术的要求,比较了直流和脉冲两种电镀条件下Cu互连线的性能以及电阻率、织构系数、晶粒大小和表面粗糙度的变化.实验结果表明,在相同电流密度条件下,脉冲电镀所得Cu镀层电阻率较低,表面粗糙度较小,表面晶粒尺寸和晶粒密度较大,而直流电镀所得镀层(111)晶面的择优程度优于脉冲.在超大规模集成电路Cu互连技术中,脉冲电镀将有良好的研究应用前景.     

Electromigration Failure Mechanism in Sn-Cu Solder Alloys with OSP Cu Surface Finish

Organic solderable preservative (OSP) has been adopted as the Cu substrate surface finish in flip-chip solder joints for many years. In this study, the electromigration behavior of lead-free Sn-Cu solder alloys with thin-film under bump metallization and OSP surface finish was investigated. The results showed that severe damage occurred on the substrate side (cathode side), whereas the damage on the chip side (cathode side) was not severe. The damage on the substrate side included void formation, copper dissolution, and formation of intermetallic compounds (IMCs). The OSP Cu interface on the substrate side became the weakest point in the solder joint even when thin-film metallization was used on the chip side. Three-dimensional simulations were employed to investigate the current density distribution in the area between the OSP Cu surface finish and the solder. The results indicated that the current density was higher along the periphery of the bonding area between the solder and the Cu pad, consistent with the area of IMC and void formation in our experimental results.     

Electromigration properties of electroless plated Cu metallization

The electromigration properties of electroless plated copper films have been evaluated under DC stress conditions. The formation of microvoids and the diffusion of copper through the seed layer caused an increase of the line resistance in the initial stage of the stressing. The current density dependence and the activation energy of the lifetime were determined     

Electromigration studies on Sn(Cu) alloy lines

The Cu alloying effect in the Sn(Cu) solder line has been studied. The Sn0.7Cu solder line has the most serious electromigration (EM) damage compared to pure Sn and Sn3.0Cu solder lines. The dominant factor for the fast EM rate in Sn0.7Cu could be attributed to the relatively small grain size and the low critical stress, i.e., the yielding stress of the Sn0.7Cu solder line. Also, we found that the shortest Sn0.7Cu solder line, 250 μm, has the most serious EM damage among three solder lines of different lengths. The back stress induced by EM might not play a significant role on the EM test of long solder lines. A new failure mode of EM test was observed; EM under an external tensile stress. The external stress is superimposed on the stress profile induced by EM. As a result, the hillock formation was retarded at the anode side, and void formation was enhanced at the cathode.     

磁控溅射的TaN薄膜的扩散阻挡性能

用反应磁控溅射方法在SiO2/Si(100)衬底和Cu薄膜间溅射一层TaN阻挡层,测试不同N气分压及热处理温度下Cu/TaN/SiO2/Si薄膜的显微结构和电阻特性.同时利用微细加工技术加工了镂空的Cu互连叉指测试结构,研究了TaN薄膜在镂空的铜互连结构中的扩散阻挡性能.结果发现,在退火温度不超过400 ℃时,薄膜电阻率均低于80μΩ·cm,而当溅射N分压超过10%,退火温度超过400℃时,薄膜电阻率很快上升.低N气分压下(≤10%)溅射时,即使退火温度达到600 ℃,薄膜电阻基本不变.     

基于弹性分组环的多环互联研究

现有的弹性分组环协议无法实现多环互联。提出了一种基于弹性分组环多环互联的数据转发和自动拓扑发现的实现方案,该方案充分利用弹性分组环协议草案中的扩展帧格式,采用类似多协议标签交换(MPLS)的一次路由、多次交换的思想,实现了跨环数据在多环互联弹性分组环中的高速传输,并且与现有的RPR协议之间有着良好的兼容性。     

Cu互连及其关键工艺技术研究现状

低介电常数材料和低电阻率金属的使用可以有效地降低互连线引起的延时.Cu因其具有比Al及Al合金更低的电阻率和更高的抗电迁移能力而成为新一代互连材料.论述了Cu互连技术的工艺过程及其研究发展现状.对Cu互连技术中的阻挡层材料、电化学镀Cu技术以及化学机械抛光技术等一系列关键工艺技术进行系统的分析和讨论.     

Cu CMP工艺对薄膜介电常数的影响机制

研究了使用不同研磨液的Cu CMP工艺对超低介电常数(ULK)薄膜介电常数k值的影响.实验结果表明经过Cu CMP工艺,ULK薄膜的介电常数k均有不同程度的增加.XPS成分分析结果表明,ULK薄膜表面C含量的增加是造成介电常数k值升高的主要原因.这主要是由于CMP工艺中,化学品溶液进入多孔的ULK薄膜.而退火工艺可以使得化学品挥发,从而使ULK薄膜表面C含量降低,由此介电常数k基本上得以恢复.初步建立了Cu CMP工艺对介电常数k影响的物理模型.根据模型计算的k结果为2.75,与实测值2.8基本符合.     

Electromigration on void formation of Sn3Ag1.5Cu FCBGA solder joints

The electromigration on void formation and failure mechanism of FCBGA packages under a current density of 1 × 10⁴ A/cm² and an environmental temperature of 150 °C was investigated. Two solder/substrate combinations of Sn3Ag1.5Cu with Cu-OSP and Cu/Ni/Au were examined. A conservative failure criterion was adopted to predict the failure of package, and SEM was used to observe in situ microstructural change and failure modes.Failure was mainly attributed to void occupation along UBM/solder interfaces by the side of cathode chip of bumps with downward electron flow. The current crowding was the cause for void initiation from the entrance corner of electron flow. Two specific void locations were identified at IMC/solder and UBM/IMC interfaces, and both can co-exist in the same specimen but in different bumps. No coupling mode of void was found. Since there is a discrepancy of diffusion rate between solder and IMC layers, current density results in more voids between them. A current density of 1 × 10⁴ A/cm² was found as a dominant factor that was high enough for void pattern at IMC/solder interface. However, the void formation at the UBM/IMC interface was generally induced by the UBM consumption due to the high temperature of 150 °C that dominates the void morphology crucially at UBM/IMC interface.     

Discussion on the Mechanism of Electromigration from the Perspective of Electromagnetism

The mechanism of electromigration is discussed from the perspective of electromagnetism, rather than from the traditional view of momentum exchange owing to collisions between electrons and diffusing ions. It is suggested that, from the perspective of conservation of momentum, the momentum transferred to the diffusing ions is related to the Maxwell stress, and the effective charge is proportional to the density of the net charge within the volume element. It is also suggested that, from Poynting’s theorem, the energy associated with electromigration is related to the work done by the electric field, and the conversion of the nonelectrostatic energy from the electric power source into the chemical energy of the diffusion system. From both perspectives, the effective driving force can be shown to have a square dependence on the current density. Therefore, it is suggested that the effective charge number is linearly related to the current density.     

Electromigration study in SnAg3.8Cu0.7 solder joints on Ti/Cr-Cu/Cu under-bump metallization

This paper investigates the electromigration-induced failures of SnAg3.8Cu0.7 flip-chip solder joints. An under-bump metallization (UBM) of a Ti/Cr-Cu/Cu trilayer was deposited on the chip side, and a Cu/Ni(P)/Au pad was deposited on the BT board side. Electromigration damages were observed in the bumps under a current density of 2×10⁴ A/cm² and 1×10⁴ A/cm² at 100°C and 150°C. The failures were found to be at the cathode/chip side, and the current crowding effect played an important role in the failures. Copper atoms were found to move in the direction of the electron flow to form intermetallic compounds (IMCs) at the interface of solder and pad metallization as a result of current stressing.