基于注意力机制与文本信息的用户关系抽取

随着社交媒体的发展,用户之间的关系网络对于社交媒体的分析有很大的帮助。因此,该文主要研究用户好友关系检测。以往的关于用户好友关系抽取的研究主要基于社交媒体上的结构化信息,比如其他好友关系,用户的不同属性等。但是,很多时候用户本身并没有大量的好友信息存在,同时也不一定有很多确定的属性。因此,我们希望基于用户发表的文本信息来对用户关系进行预测。不同于以往的潜在好友推荐算法,该文提出了一种基于注意力机制以及长短时记忆网络(long short-term memory,LSTM)的好友关系预测模型,将好友之间的评论分开处理,通过分析用户之间的评论来判断是否具备一定的好友关系。该模型将好友双方信息拼接后的结果作为输入,并将注意力机制应用于LSTM的输出。实验表明,用户之间的评论对于好友关系预测确实有较大的实际意义,该文提出的模型较之于多个基准系统的效果,取得了明显的提升。在不加入任何其它非文本特征的情况下,实验结果的准确率达到了77%。     

基于射频技术的无刷同步电机励磁电流的检测

无刷同步电机的励磁系统对励磁电流的测量是制约该励磁方式发展的一大障碍。设计了一个射频系统可以用来解决同步电机的励磁电流的测量问题。该系统可以方便地检测到同步电机励磁机的整流二极管的工作状态并且可以动态地显示励磁电流，极大地方便了运行人员做出判断，而且结构简单、方便实用。     

变频器调速装置节能浅析

1概述 近十多年来,随着电力电子技术、微电子技术及现代控制理论的发展,变频调速技术已经广泛地用于交流电动机的速度控制,其最主要的特点是具有高效率的驱动性能及良好的控制特性.它是一种高新技术电力节能装置,它通过改变（降低）电源工作频率,来降低动力设备（电机）的转速,减少设备的输出功率,达到输出功率与工作负荷的最佳匹配,实现节能目的,有效地提高了经济效益和产品质量.几乎可以说,有电动机的地方就有变频器,在一切需要进行速度控制的场合,变频器以其操作方便、体积小、控制性能高而获得广泛应用.     

Inhibition of microbial growth in ready‐to‐eat food stored at ambient temperature by modified atmosphere packaging

This study was undertaken to develop a modified atmosphere package to control microbial growth in ready‐to‐eat (RTE) products stored at ambient temperature. Ethanol and/or limonene associated with modified atmosphere (CO₂ : O₂ : N₂ = 30% : 5% : 65%) was used to inhibit the growth of total air‐borne microorganisms and Escherichia coli in RTE products stored at 25°C. The results indicated that 0.05% ethanol vapour in the headspace was effective to inhibit the growth of air‐borne microorganisms and E. coli at 25°C for 72 h in a model study, and the effectiveness was related to ethanol content. Both 73 ppm limonene and 0.05% ethanol vapour enhanced the bacteriostatic effect of modified atmosphere in RTE sushi roll products, and no off‐flavour was detected using this formulated gas; however, no significant inhibitory effect was observed for RTE cold noodle products. This study concludes that combinations of carbon dioxide, ethanol or limonene vapours are effective to inhibit microbial growth in RTE food at ambient temperature, and the outcome may be due to the hurdle effect. Copyright © 2003 John Wiley & Sons, Ltd.     

High-performance and power-efficient CMOS comparators

Several design techniques for high-performance and power-efficient CMOS comparators are proposed. First, the comparator is based on the priority-encoding (PE) algorithm, and the dynamic circuit technique developed specifically for the priority encoder can be applied. Second, the PE function and the subsequent logic functions are merged and efficiently realized in the multiple output domino logic (MODL) to result in a shortened logic depth. The circuit in MODL CMOS is also compact and power efficient because few transistors are needed. Third, the multilevel look-ahead technique is used to shorten the path of priority-token propagation. Finally, the circuit is realized with a latch-based two-stage pipelined structure, and the comparison function is partitioned into two parts, with each part executed in each half of the clock cycle in a delay-balanced manner. Post-layout simulation results show that a 64-b comparator designed with the proposed techniques in a 3-V 0.6-/spl mu/m CMOS technology is 16% faster, 50% smaller, and 79% more power efficient as compared with the all-n-transistor comparator, which is the fastest among the conventional comparators. Measurement results of the test chip conform with simulation results and prove the feasibility of the proposed techniques.     

针对不同地质目标的叠前时间偏移成像解释评价

随着计算机硬件和地震勘探成像技术的发展，叠前时间偏移正逐步替代常规的NMO加DMO加叠后时间偏移成为地震数据成像处理方法的主流。但对于不同的地质目标，叠前时间偏移的成像效果是否优于常规NMO加DMO加叠后时间偏移的成像效果呢？为此，从地震数据成像处理方法、处理流程和处理参数等方面进行了讨论，并基于某地区三维数据常规处理结果和叠前时间偏移处理结果，针对不同地质目标进行了剖析与评价。认为：叠前时间偏移成像的垂向分辨率较常规处理明显降低，但对于空间波阻抗变化明显的河流和断层，叠前时间偏移成像的空间分辨率要高于常规处理；对于小于1／4波长的叠置薄储层，叠前时间偏移成像的垂向和空间分辨率低于常规处理结果。     

A 1.5-V 45-mW direct-conversion WCDMA receiver IC in 0.13-/spl mu/m CMOS

A 2-GHz direct-conversion receiver for wide-band code division multiple access (WCDMA) is presented. It includes two low-noise amplifiers (LNAs), an I/Q demodulator, and two sixth-order baseband channel select filters with programmable gain. Quadrature local oscillator (LO) signals are generated on chip in a frequency divider flip-flop. An external interstage filter between the LNAs rejects transmitter leakage to relax demodulator linearity requirements. A low-voltage demodulator topology improves linearity as well as demodulator output pole accuracy. The active-RC baseband filter uses a programmable servo loop for offset compensation and provides an adjacent channel rejection of 39 dB. Programmable gain over 71-dB range in 1-dB steps is merged with the filter to maximize dynamic range. An automatic on-chip frequency calibration scheme provides better than 1.5% corner frequency accuracy. The receiver is integrated in a 0.13-/spl mu/m CMOS process with metal-insulator-metal (MIM) capacitors. Measured receiver performance includes a 6.5-dB noise figure, IIP2 of +27 dBm, and IIP3 of -8.6 dBm. Power consumption is 45 mW.     

Synthesis of amphiphilic magnetic microspheres by dispersion copolymerization of styrene and poly(ethylene oxide) macromonomer

Amphiphilic magnetic microspheres ranging in diameter from 5 to 100 µm were prepared by dispersion copolymerization of styrene and poly(ethylene oxide) vinylbenzyl (PEO‐VB) macromonomer (MPEO) in the presence of Fe₃O₄ magnetic fluid. The effects of various polymerization parameters on the average particle size were systematically investigated. The average particle size was found to increase with increasing styrene concentration and initiator concentration. It also increased with decreasing stabilizer concentration and molecular weight of MPEO. The content of the hydroxyl groups localized in the microspheres ranged from 0.01 to 0.2 mmol g^?1. © 2003 Society of Chemical Industry     

Analysis and architecture design of variable block-size motion estimation for H.264/AVC

Variable block-size motion estimation (VBSME) has become an important video coding technique, but it increases the difficulty of hardware design. In this paper, we use inter-/intra-level classification and various data flows to analyze the impact of supporting VBSME in different hardware architectures. Furthermore, we propose two hardware architectures that can support traditional fixed block-size motion estimation as well as VBSME with less chip area overhead compared to previous approaches. By broadcasting reference pixel rows and propagating partial sums of absolute differences (SADs), the first design has the fewer reference pixel registers and a shorter critical path. The second design utilizes a two-dimensional distortion array and one adder tree with the reference buffer that can maximize the data reuse between successive searching candidates. The first design is suitable for low resolution or a small search range, and the second design has advantages of supporting a high degree of parallelism and VBSME. Finally, we propose an eight-parallel SAD tree with a shared reference buffer for H.264/AVC integer motion estimation (IME). Its processing ability is eight times of the single SAD tree, but the reference buffer size is only doubled. Moreover, the most critical issue of H.264 IME, which is huge memory bandwidth, is overcome. We are able to save 99.9% off-chip memory bandwidth and 99.22% on-chip memory bandwidth. We demonstrate a 720-p, 30-fps solution at 108 MHz with 330.2k gate count and 208k bits on-chip memory.