Investigation of HgCdTe p-n device structures grown by liquid-phase epitaxy

The microstructure of p-n device structures grown by liquid-phase epitaxy (LPE) on CdZnTe substrates has been evaluated using transmission electron microscopy (TEM). The devices consisted of thick (∼21-μm) n-type layers and thin (∼1.6-μm) p-type layers, with final CdTe (∼0.5 μm) passivation layers. Initial observations revealed small defects, both within the n-type layer (doped with 8×10¹⁴/cm³ of In) and also within the p-type layer but at a much reduced level. These defects were not visible, however, in cross-sectional samples prepared by ion milling with the sample held at liquid nitrogen temperature. Only isolated growth defects were observed in samples having low indium doping levels (2×10¹⁴/cm³). The CdTe passivation layers were generally columnar and polycrystalline, and interfaces with the p-type HgCdTe layers were uneven. No obvious structural changes were apparent in the region of the CdTe/HgCdTe interfaces as a result of annealing at 250°C.     

Hall effect characterization of LPE HgCdTe P/n heterojunctions

The field and temperature dependence of the Hall coefficient has been used to simultaneously extract information about the p and n layers in very long wave length infrared P/n HgCdTe heterojunctions. The field dependence allows the effects of high mobility electrons to be separated from those of low mobility holes. The higher the magnetic field, the higher the sensitivity to the parameters of the P layer. For a maximum magnetic field of 8000 gauss, the hole sheet concentration must be at least five times the electron sheet concentration to obtain accurate results for the P layer. This criterion is satisfied for typical liquid phase epitaxy (LPE) heterostructures. The analysis determines the hole sheet resistance (concentration times mobility), rather than the hole concentration or mobility separately. Independent knowledge of the P layer thickness and the relationship between hole concentration and resistivity are needed to convert the Hall measurement results to hole concentrations. Analysis of the field-dependent Hall data is complicated by the finding that at least three electrons of different mobilities are needed to fit the field dependence of the Hall coefficient in n-type LPE HgCdTe layers. These results are consistent with previous conclusions that electrons with different mobilities are needed to model bulk n-HgCdTe, and with a range of mobilities in the graded composition interface between the LPE layer and CdTe substrate. Consistent results are obtained for the concentrations and mobilities of the three types of electrons in the n-HgCdTe layer with and without the P layer present. N and P type carrier concentrations are also consistent with dopant concentrations measured by secondary ion mass spectroscopy.     

Efficiency Enhancement in Organic Photovoltaic Cells: Consequences of Optimizing Series Resistance

Here, means to enhance power conversion efficiency (PCE or η) in bulk‐heterojunction (BHJ) organic photovoltaic (OPV) cells by optimizing the series resistance (R_s)—also known as the cell internal resistance—are studied. It is shown that current state‐of‐the‐art BHJ OPVs are approaching the limit for which efficiency can be improved via R_s reduction alone. This evaluation addresses OPVs based on a poly(3‐hexylthiophene):6,6‐phenyl C₆₁‐butyric acid methyl ester (P3HT:PCBM) active layer, as well as future high‐efficiency OPVs (η > 10%). A diode‐based modeling approach is used to assess changes in R_s. Given that typical published P3HT:PCBM test cells have relatively small areas (～0.1 cm²), the analysis is extended to consider efficiency losses for larger area cells and shows that the transparent anode conductivity is then the dominant materials parameter affecting R_s efficiency losses. A model is developed that uses cell sizes and anode conductivities to predict current–voltage response as a function of resistive losses. The results show that the losses due to R_s remain minimal until relatively large cell areas (>0.1 cm²) are employed. Finally, R_s effects on a projected high‐efficiency OPV scenario are assessed, based on the goal of cell efficiencies >10%. Here, R_s optimization effects remain modest; however, there are now more pronounced losses due to cell size, and it is shown how these losses can be mitigated by using higher conductivity anodes.     

A highly robust process integration with scaled ONO interpolydielectrics for embedded nonvolatile memory applications

We have developed a process sequence for a flash EEPROM memory embedded in an advanced microcontroller circuit. This process simultaneously forms a thick top oxide on the interpoly ONO dielectric in the memory array and a stacked gate-oxide for the logic transistors. We have fabricated one-transistor, flash bit-cells with good data retention characteristics that incorporate a 17 nm ONO film along with high-quality stacked gate oxides     

Impurity study of CdZnTe substrates used for LPE HgCdTe

Impurites were tracked from raw material purification through to CdZnTe processing in an effort to identify the sources of elements which impact on IR photodetector performance. Chemical analyses by GDMS and ZCGFAA effectively showed the levels of impurities introduced into CdZnTe substrate material from the manufacturing processes. A new purification process (ISDZR) for raw materials was developed, resulting in improved CdZnTe substrate purity. Substrate CU contamination was found to have detrimental effects on LPE layer and device electrical properties for lightly doped HgCdTe.     

Combustion Synthesized Zinc Oxide Electron‐Transport Layers for Efficient and Stable Perovskite Solar Cells

Perovskite solar cells (PSCs) have advanced rapidly with power conversion efficiencies (PCEs) now exceeding 22%. Due to the long diffusion lengths of charge carriers in the photoactive layer, a PSC device architecture comprising an electron‐ transporting layer (ETL) is essential to optimize charge flow and collection for maximum performance. Here, a novel approach is reported to low temperature, solution‐processed ZnO ETLs for PSCs using combustion synthesis. Due to the intrinsic passivation effects, high crystallinity, matched energy levels, ideal surface topography, and good chemical compatibility with the perovskite layer, this combustion‐derived ZnO enables PCEs approaching 17–20% for three types of perovskite materials systems with no need for ETL doping or surface functionalization.     

Benzodithiophene Hole‐Transporting Materials for Efficient Tin‐Based Perovskite Solar Cells

Developing efficient interfacial hole transporting materials (HTMs) is crucial for achieving high‐performance Pb‐free Sn‐based halide perovskite solar cells (PSCs). Here, a new series of benzodithiophene (BDT)‐based organic small molecules containing tetra‐ and di‐triphenyl amine donors prepared via a straightforward and scalable synthetic route is reported. The thermal, optical, and electrochemical properties of two BDT‐based molecules are shown to be structurally and energetically suitable to serve as HTMs for Sn‐based PSCs. It is reported here that ethylenediammonium/formamidinium tin iodide solar cells using BDT‐based HTMs deliver a champion power conversion efficiency up to 7.59%, outperforming analogous reference solar cells using traditional and expensive HTMs. Thus, these BDT‐based molecules are promising candidates as HTMs for the fabrication of high‐performance Sn‐based PSCs.     

A Novel Stress Characterization Technique for the Development of Low-Stress Ohmic Contacts to HgCdTe

HgCdTe material intended for long-wavelength infrared detection is particularly susceptible to damage from stress. As a result, an ideal ohmic contact needs to have good adhesion and low specific contact resistance. The contact should act as a diffusion barrier and induce the least amount of stress in the underlying material. In this paper we present a set of stress measurements from different ohmic contact materials deposited on short- and long-wavelength HgCdTe films grown by liquid-phase epitaxy (LPE). Using a new experimental technique we remove the substrate and measure the stress induced on single- and multilayered HgCdTe cantilevers. To interpret our results, we develop a theoretical model that describes the physics of elastic deformation in HgCdTe layers. Our model is based on classical thin-plate bending theory and explicitly takes into account the realistic boundary conditions that are present in the experimental setup by using a variational approach.     

Composition and thickness control of thin LPE HgCdTe layers using x-ray diffraction

Double-axis x-ray rocking curve measurements have been used to nondestructively characterize the composition profile of HgCdTe heterojunction photodiode structures grown by liquid phase epitaxy (LPE). In particular, the thickness and composition profile of the thin graded-composition cap layer are determined through an empirical correlation between rocking curve parameters and composition profiles measured by SIMS. Spatial maps of cap layer thickness and composition are generated from automated measurements of x-ray rocking curves across a wafer. X-ray mapping has been instrumental in improving the spatial uniformity of cap layers and in maintaining control of the growth process in Hg-rich LPE dipping reactors.     

Low-frequency noise in TaSiN/HfO/sub 2/ nMOSFETs and the effect of stress-relieved preoxide interfacial layer

Low-frequency noise characteristics are reported for TaSiN-gated n-channel MOSFETs with atomic-layer deposited HfO/sub 2/ on thermal SiO/sub 2/ with stress-relieved preoxide (SRPO) pretreatment. For comparison, control devices were also included with chemical SiO/sub 2/ resulting from standard Radio Corporation of America clean process. The normalized noise spectral density values for these devices are found to be lower when compared to reference poly Si gate stack with similar HfO/sub 2/ dielectric. Consequently, a lower oxide trap density of /spl sim/4/spl times/10/sup 17/ cm/sup -3/eV/sup -1/ is extracted compared to over 3/spl times/10/sup 18/ cm/sup -3/eV/sup -1/ values reported for poly Si devices indicating an improvement in the high-/spl kappa/ and interfacial layer quality. In fact, this represents the lowest trap density values reported to date on HfO/sub 2/ MOSFETs. The peak electron mobility measured on the SRPO devices is over 330 cm/sup 2//V/spl middot/s, much higher than those for equivalent poly Si or metal gate stacks. In addition, the devices with SRPO SiO/sub 2/ are found to exhibit at least /spl sim/10% higher effective mobility than RCA devices, notwithstanding the differences in the high-/spl kappa/ and interfacial layer thicknesses. The lower Coulomb scattering coefficient obtained from the noise data for the SRPO devices imply that channel carriers are better screened due to the presence of SRPO SiO/sub 2/, which, in part, contributes to the mobility improvement.