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1.
Far-infrared reflection spectra of dielectric ceramics, BaSm2 Ti5 O14 , BaTi4 O9 , and some pcrovskites such as Ba(Zn1/3 Nb2/3 )O3 , have been measured at room temperature using a Fourier transform infrared spectrometer in order to investigate the effect of the crystal structure on the dielectric properties. As for perovskites, Sr(Zn1/3 Nb2/3 )O3 and Sr(Mg1/3 Nb2/3 )O3 , in which B site ions are ordered, were also measured. Reflectance data were analyzed by means of a factorized form of dielectric functions instead of the classical dispersion theory, and all of the spectra were well fitted. The values of dielectric constants and tan δ calculated from the reflectance data were in good agreement with resonant cavity measurements at 5 GHz. Furthermore, results of this study have shown that the main contribution to the microwave dielectric properties is caused by low-frequency optically active modes located at 50 to about 300 cm−1 , and for perovskite structures it is suggested that the ordering of B site ions is significant in obtaining low dielectric losses. 相似文献
2.
Moritoshi Yasunaga Noriyuki Aibe Yoshiki Yamaguchi Yorihisa Yamamoto Takaaki Awano Ikuo Yoshihara 《Artificial Life and Robotics》2008,12(1-2):219-222
Watching and tracking an object while seeing a much wider view is one of advantages of the eye system. We proposed and developed
a tracking camera system that mimics the eyes by using double-lens modules. In the system, a wide view is captured through
the wide-lens module, while the target in it is tracked and magnified through the telescopic lens module. Electronic circuits
for tracking control are implemented onto the reconfigurable VLSI or FPGA in order to embed the parallelism in the tracking
algorithm into the hardware. A successfully developed FPGA-based prototype performs high-speed tracking at the video-rate.
This work was present in part at the 12th International Symposium on Artificial Life and Robotics, Oita, Japan, January 25–27,
2007 相似文献
3.
Theoretical analysis of the spatial phase-matching loci for second-harmonic generation and multiwave-mixing interactions 总被引:1,自引:0,他引:1
We report a theoretical analysis on spatial noncolinear phase matching of multiwave mixing and its application to a second-harmonic-generation (SHG) experiment. From the numeric calculations, the noncolinear phase-matching properties in general situations were determined. The theory gives the applicability for all noncolinear phase matching. Fine coincidences between theoretical calculations and observed spatial loci on noncollinear phase-matching SHG were confirmed. Relations that allow the calculation of the noncollinear phase-matching angle for any case of SHG are established. As an example, the noncolinear phase-matched SHG pattern on a screen is calculated numerically in the case of SHG of 1064 nm from a Nd:YAG laser under the phase-matched condition for two organic nonlinear crystals: 1-(2-thienyl)-3-(4-methyphenyl) propene-1 (TC-28), which is biaxial, and (2-furyl) methacrylic anhydride (FMA), which is uniaxial. Experimental results compared quite favorably with the theoretical analysis. Noncolinear phase matching may be of great practical interest in optical multiwave-mixing processes, such as optical parametric oscillation and optical parametric amplification. This technique also can be used for the measurement of crystal optical constants. 相似文献
4.
We present numerically verified a posteriori estimates of the norms of inverse operators for linear parabolic differential equations. In case that the corresponding elliptic operator is not coercive, existing methods for a priori estimates of the inverse operators are not accurate and, usually, exponentially increase in time variable. We propose a new technique for obtaining the estimates of the inverse operator by using the finite dimensional approximation and error estimates. It enables us to obtain very sharp bounds compared with a priori estimates. We will give some numerical examples which confirm the actual effectiveness of our method. 相似文献
5.
This paper first reviews the earthquakes that occurred since 1995 and then outlines the significant lessons learnt from disasters. The discussion then goes into the induced development of engineering practices that were triggered by those disasters. It is clear that major development occurred in design philosophies, soil improvement, and facilities for research. The last section of this paper addresses the compound effects of earthquakes and rainfall that may make the extent of the disasters worse. 相似文献
6.
Okamura H. Toyoshima H. Takeda K. Oguri T. Nakamura S. Takada M. Imai K. Kinoshita Y. Yoshida H. Yamazaki T. 《Solid-State Circuits, IEEE Journal of》1995,30(11):1196-1202
While an ECL-CMOS SRAM can achieve both ultra high speed and high density, it consumes a lot of power and cannot be applied to low power supply voltage applications. This paper describes an NTL (Non Threshold Logic)-CMOS SRAM macro that consists of a PMOS access transistor CMOS memory cell, an NTL decoder with an on-chip voltage generator, and an automatic bit line signal voltage swing controller. A 32 Kb SRAM macro, which achieves a 1 ns access time at 2.5 V power supply and consumes a mere 1 W, has been developed on a 0.4 μm BiCMOS technology 相似文献
7.
Madihian M. Bak E. Yoshida H. Hirabayashi H. Imai K. Kinoshita Y. Yamazaki T. Desclos L. 《Solid-State Circuits, IEEE Journal of》1997,32(4):521-525
This paper concerns the design consideration, fabrication process, and performance results for an ultra-broadband, low-voltage, low-power, BiCMOS-based transceiver chip for cellular-satellite-LAN wireless communication networks. The transceiver chip incorporates an RF amplifier, a Gilbert down-mixer, and an IF amplifier in the receive path, and an IF amplifier, a Gilbert up-mixer, and an RF amplifier in the transmit path. For an RF frequency in the 1-10 GHz band and an IF frequency in the 100-1000 MHz band, the developed transceiver chip consumes less than 60 mW at 2 V, to yield a downconversion gain of 40 dB at 1 GHz and 10 dB at 10 GHz and an upconversion gain of 42 dB at 1 GHz and 11 dB at 10 GHz. To avoid possible start-up problems caused during “stand-by” to “enable” mode transition, a simple switching technique is employed for enabling either the receive or the transmit path, by changing the value of a reference voltage applied to both the down- and the up-mixers. While the developed transceiver chip exhibits the best performance for a dc supply voltage of 2 V, it shows a graceful degradation for a ±0.15 V voltage deviation. The transceiver's chip size is 1.04 mm×1.04 mm 相似文献
8.
Okamura H. Atsumo T. Takeda K. Takada M. Imai K. Kinoshita Y. Yamazaki T. 《Solid-State Circuits, IEEE Journal of》1996,31(1):84-90
A BiCMOS logic circuit with very small input capacitance has been developed, which operates at low supply voltages. A High-beta BiCMOS (Hβ-BiCMOS) gate circuit which fully utilizes the bipolar transistor features achieves 10 times the speed of a CMOS gate circuit with the same input capacitance and operating at 3.3 V supply voltage. In order to lower the minimum supply voltage of Hβ-BiCMOS, a BiCMOS circuit configuration using a charge pump to pull up the output high level of the BiCMOS gate circuit is proposed. By introducing a BiCMOS charge pump, Hβ-BiCMOS achieves very high speed operation at sub-2.0 V supply voltage. It has also been demonstrated that only a very small number of charge pump circuits are required to drive a large number of Hβ-BiCMOS gate circuits 相似文献
9.
Nozaki T. Tanaka T. Kijiya Y. Kinoshita E. Tsuchiya T. Hayashi Y. 《Solid-State Circuits, IEEE Journal of》1991,26(4):497-501
A 1 Mb 5 V-only EEPROM (electrically erasable programmable ROM) with metal-oxide-nitride-oxide-semiconductor (MONOS) memory cells specifically designed for a semiconductor disk application is described. The memory has high endurance to write/erase cycles and a relatively low programming voltage of ±9 V. These advantages result from the structure and the characteristics of the MONOS memory cell. A newly developed dual-gate-type MONOS memory cell has a small unit cell area of 18.4 μm2 with 1.2 μm lithography, and the die size of the fabricated chip is 5.3 mm×6.3 mm. A new programming scheme called multiblock erase solved the problem of slow programming speed. A programming speed of up to 1.1 μs/B equivalent (140 ms/chip) was obtained 相似文献
10.
H. Toda Y. Furukawa T. Kinoshita Y. Kodama A. Hasegawa 《Photonics Technology Letters, IEEE》1997,9(10):1415-1417
We discuss the properties of comb-like dispersion profiled fiber (CDPF) for an optical soliton transmission. It is found that the CDPF in which the standard single-mode fiber is placed both at the first and at the end of each section is more suitable to reduce dispersive waves if chirp-free transform limited optical pulse is used as a light source. A 10-ps optical soliton transmission experiment is performed in such a CDPF over 1000 km with the amplifier spacing of 80 km that corresponds to 3.1 times the dispersion distance. 相似文献